DE69700532D1 - Verfahren und vorrichtung zur faltungskodierung und -dekodierung von datenblöcken - Google Patents
Verfahren und vorrichtung zur faltungskodierung und -dekodierung von datenblöckenInfo
- Publication number
- DE69700532D1 DE69700532D1 DE69700532T DE69700532T DE69700532D1 DE 69700532 D1 DE69700532 D1 DE 69700532D1 DE 69700532 T DE69700532 T DE 69700532T DE 69700532 T DE69700532 T DE 69700532T DE 69700532 D1 DE69700532 D1 DE 69700532D1
- Authority
- DE
- Germany
- Prior art keywords
- decoding
- data blocks
- folding coding
- coding
- folding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0059—Convolutional codes
-
- E—FIXED CONSTRUCTIONS
- E05—LOCKS; KEYS; WINDOW OR DOOR FITTINGS; SAFES
- E05B—LOCKS; ACCESSORIES THEREFOR; HANDCUFFS
- E05B15/00—Other details of locks; Parts for engagement by bolts of fastening devices
- E05B15/02—Striking-plates; Keepers; Bolt staples; Escutcheons
- E05B15/0205—Striking-plates, keepers, staples
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/23—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using convolutional codes, e.g. unit memory codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2771—Internal interleaver for turbo codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2957—Turbo codes and decoding
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2957—Turbo codes and decoding
- H03M13/296—Particular turbo code structure
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2957—Turbo codes and decoding
- H03M13/2978—Particular arrangement of the component decoders
- H03M13/2984—Particular arrangement of the component decoders using less component decoders than component codes, e.g. multiplexed decoders and scheduling thereof
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2957—Turbo codes and decoding
- H03M13/299—Turbo codes with short blocks
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2957—Turbo codes and decoding
- H03M13/2993—Implementing the return to a predetermined state, i.e. trellis termination
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2957—Turbo codes and decoding
- H03M13/2996—Tail biting
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0045—Arrangements at the receiver end
- H04L1/0052—Realisations of complexity reduction techniques, e.g. pipelining or use of look-up tables
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0064—Concatenated codes
- H04L1/0066—Parallel concatenated codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
- H03M13/2707—Simple row-column interleaver, i.e. pure block interleaving
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0041—Arrangements at the transmitter end
- H04L1/0043—Realisations of complexity reduction techniques, e.g. use of look-up tables
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0067—Rate matching
- H04L1/0068—Rate matching by puncturing
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9604485A FR2747255B1 (fr) | 1996-04-03 | 1996-04-03 | Procede et dispositif de codage convolutif de blocs de donnees, et procede et dispositif de decodage correspondants |
PCT/FR1997/000607 WO1997038495A1 (fr) | 1996-04-03 | 1997-04-03 | Procede et dispositif de codage convolutif de blocs de donnees, et procede et dispositif de decodage correspondants |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69700532D1 true DE69700532D1 (de) | 1999-10-21 |
DE69700532T2 DE69700532T2 (de) | 2000-05-04 |
Family
ID=9491075
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69700532T Expired - Lifetime DE69700532T2 (de) | 1996-04-03 | 1997-04-03 | Verfahren und vorrichtung zur faltungskodierung und -dekodierung von datenblöcken |
Country Status (6)
Country | Link |
---|---|
US (1) | US6119264A (de) |
EP (1) | EP0891656B1 (de) |
JP (1) | JP3791013B2 (de) |
DE (1) | DE69700532T2 (de) |
FR (1) | FR2747255B1 (de) |
WO (1) | WO1997038495A1 (de) |
Families Citing this family (76)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19736625C1 (de) * | 1997-08-22 | 1998-12-03 | Siemens Ag | Verfahren zur Datenübertragung auf Übertragungskanälen in einem digitalen Übertragungssystem |
CN100466502C (zh) * | 1998-04-18 | 2009-03-04 | 三星电子株式会社 | 通信系统的信道编码方法 |
FR2785741B1 (fr) | 1998-11-09 | 2001-01-26 | Canon Kk | Dispositif et procede de codage et d'entrelacement pour des turbocodes series ou hybrides |
FR2785744B1 (fr) | 1998-11-09 | 2001-01-26 | Canon Kk | Procede et dispositif de codage de sequences de donnees, procede et dispositif de decodage associes |
FR2785743A1 (fr) * | 1998-11-09 | 2000-05-12 | Canon Kk | Dispositif et procede d'adaptation des turbocodeurs et des decodeurs associes a des sequences de longueur variable |
US6625234B1 (en) * | 1998-12-10 | 2003-09-23 | Nortel Networks Limited | Efficient implementations of proposed turbo code interleavers for third generation code division multiple access |
KR100296028B1 (ko) | 1998-12-31 | 2001-09-06 | 윤종용 | 이동통신시스템에서 이득 조절 장치를 가지는 복호기 |
WO2000052834A1 (fr) * | 1999-02-26 | 2000-09-08 | Fujitsu Limited | Turbodecodeur et appareil d'entrelacement / desentrelacement |
EP1919088A1 (de) * | 1999-03-01 | 2008-05-07 | Fujitsu Limited | Turbodekodierer |
US6543013B1 (en) * | 1999-04-14 | 2003-04-01 | Nortel Networks Limited | Intra-row permutation for turbo code |
KR100300306B1 (ko) * | 1999-05-28 | 2001-09-26 | 윤종용 | 무선통신 시스템에서 채널 적응형 맵 채널 복호 장치 및 방법 |
US6400290B1 (en) | 1999-11-29 | 2002-06-04 | Altera Corporation | Normalization implementation for a logmap decoder |
AU4710501A (en) | 1999-12-03 | 2001-06-18 | Broadcom Corporation | Interspersed training for turbo coded modulation |
AU4515801A (en) | 1999-12-03 | 2001-06-18 | Broadcom Corporation | Viterbi slicer for turbo codes |
EP1170872A3 (de) * | 2000-07-06 | 2003-06-04 | Capacity Research Digital Communication Technology Inc. | Kode und iterativ dekodierbare Kodestruktur, Kodierer, Kodierungsverfahren sowie dazugehöriger Dekoder und Dekodierungsverfahren |
US6944803B2 (en) | 2000-07-06 | 2005-09-13 | Her Majesty The Queen In Right Of Canada, As Represented By The Minister Of Industry Through The Communications Research Centre Canada | Code structure, encoder, encoding method, and associated decoder and decoding method and iteratively decodable code structure, encoder, encoding method, and associated iterative decoder and iterative decoding method |
EP1364479B1 (de) | 2000-09-01 | 2010-04-28 | Broadcom Corporation | Satellitenempfänger und entsprechendes verfahren |
EP1329025A1 (de) * | 2000-09-05 | 2003-07-23 | Broadcom Corporation | Quasi-fehlerfreie kommunikation unter verwendung von turbokoden |
US7242726B2 (en) | 2000-09-12 | 2007-07-10 | Broadcom Corporation | Parallel concatenated code with soft-in soft-out interactive turbo decoder |
US7383485B2 (en) * | 2000-09-12 | 2008-06-03 | Broadcom Corporation | Fast min*- or max*-circuit in LDPC (low density parity check) decoder |
US7360146B1 (en) | 2002-08-15 | 2008-04-15 | Broadcom Corporation | Inverse function of min*:min*- (inverse function of max*:max*-) |
US6518892B2 (en) | 2000-11-06 | 2003-02-11 | Broadcom Corporation | Stopping criteria for iterative decoding |
FR2822315B1 (fr) * | 2001-03-19 | 2003-06-06 | Mitsubishi Electric Inf Tech | Procede et dispositif d'optimisation, sous contrainte de performances, de la taille de blocs de donnees codees |
US7010052B2 (en) * | 2001-04-16 | 2006-03-07 | The Ohio University | Apparatus and method of CTCM encoding and decoding for a digital communication system |
WO2003023977A1 (fr) * | 2001-08-28 | 2003-03-20 | Linkair Communications,Inc. | Procede et dispositif emetteur en diversite |
EP1317070A1 (de) * | 2001-12-03 | 2003-06-04 | Mitsubishi Electric Information Technology Centre Europe B.V. | Verfahren zur Erlangung eines Fehlerkorrekturkodes mit gewünschten Parametern aus einem Blockturbokode |
AU2002231682A1 (en) * | 2001-12-10 | 2003-06-23 | Telefonaktiebolaget Lm Ericsson (Publ) | Methods and apparati for rate matching and decoding |
US7509563B2 (en) | 2002-05-06 | 2009-03-24 | Actelis Networks (Israel) Ltd. | Flexible forward error correction |
US6954832B2 (en) * | 2002-05-31 | 2005-10-11 | Broadcom Corporation | Interleaver for iterative decoder |
US7472335B1 (en) | 2002-05-31 | 2008-12-30 | Broadcom Corporation | Symbol by symbol variable code rate capable communication device |
US7657822B2 (en) * | 2002-05-31 | 2010-02-02 | Broadcom Corporation | True bit level decoding of TTCM (turbo trellis code modulation) of variable rates and signal constellations |
US7032164B2 (en) * | 2002-05-31 | 2006-04-18 | Broadcom Corporation | Efficient design to calculate extrinsic information for soft-in-soft-out (SISO) decoder |
US7093187B2 (en) * | 2002-05-31 | 2006-08-15 | Broadcom Corporation | Variable code rate and signal constellation turbo trellis coded modulation codec |
US7321633B1 (en) | 2002-05-31 | 2008-01-22 | Broadcom Corporation | Determination of variable code rates for a rate control sequence |
US7065695B2 (en) * | 2002-05-31 | 2006-06-20 | Broadcom Corporation | Metric calculation design for variable code rate decoding of broadband trellis, TCM, or TTCM |
US7188301B1 (en) | 2002-05-31 | 2007-03-06 | Broadcom Corporation | Parallel concatenated turbo code modulation encoder |
US7085985B2 (en) * | 2002-05-31 | 2006-08-01 | Broadcom Corporation | Close two constituent trellis of a turbo encoder within the interleave block |
US7107512B2 (en) * | 2002-05-31 | 2006-09-12 | Broadcom Corporation | TTCM decoder design |
US7137059B2 (en) * | 2002-11-20 | 2006-11-14 | Broadcom Corporation | Single stage implementation of min*, max*, min and /or max to perform state metric calculation in SISO decoder |
US7210092B1 (en) | 2002-05-31 | 2007-04-24 | Broadcom Corporation | Symbol by symbol variable constellation type and/or mapping capable communication device |
US7062700B2 (en) * | 2002-05-31 | 2006-06-13 | Broadcom Corporation | 16 QAM and 16 APSK TTCM (Turbo Trellis Coded Modulation) with minimum bandwidth efficiency of 3 bit/s/Hz using a rate 2/4 constituent encoder |
US7111226B1 (en) | 2002-05-31 | 2006-09-19 | Broadcom Corporation | Communication decoder employing single trellis to support multiple code rates and/or multiple modulations |
US7729373B2 (en) * | 2002-07-02 | 2010-06-01 | Broadcom Corporation | Modified range requests enabling bandwidth requests and state of health reporting |
US7694210B2 (en) * | 2002-07-31 | 2010-04-06 | Broadcom Corporation | Turbo-coding DOCSIS information for satellite communication |
US7447985B2 (en) * | 2002-08-15 | 2008-11-04 | Broadcom Corporation | Efficient design to implement min**/min**- or max**/max**- functions in LDPC (low density parity check) decoders |
US7409628B2 (en) * | 2002-08-15 | 2008-08-05 | Broadcom Corporation | Efficient design to implement LDPC (Low Density Parity Check) decoder |
US7178080B2 (en) * | 2002-08-15 | 2007-02-13 | Texas Instruments Incorporated | Hardware-efficient low density parity check code for digital communications |
US7395487B2 (en) * | 2002-08-15 | 2008-07-01 | Broadcom Corporation | Common circuitry supporting both bit node and check node processing in LDPC (Low Density Parity Check) decoder |
US7738596B2 (en) * | 2002-09-13 | 2010-06-15 | Broadcom Corporation | High speed data service via satellite modem termination system and satellite modems |
US7765577B2 (en) | 2002-12-27 | 2010-07-27 | Broadcom Corporation | Turbo coding for upstream and downstream transmission in cable systems |
US7239667B2 (en) * | 2003-03-18 | 2007-07-03 | Broadcom Corporation | 8 PSK rotationally invariant turbo trellis coded modulation without parallel transitions |
US7139959B2 (en) * | 2003-03-24 | 2006-11-21 | Texas Instruments Incorporated | Layered low density parity check decoding for digital communications |
US7221714B2 (en) | 2003-05-12 | 2007-05-22 | Broadcom Corporation | Non-systematic and non-linear PC-TCM (Parallel Concatenate Trellis Coded Modulation) |
US7340669B2 (en) * | 2005-03-11 | 2008-03-04 | Via Telecom Co., Ltd. | Memory efficient streamlined transmitter with a multiple instance hybrid ARQ |
US7447984B2 (en) | 2005-04-01 | 2008-11-04 | Broadcom Corporation | System correcting random and/or burst errors using RS (Reed-Solomon) code, turbo/LDPC (Low Density Parity Check) code and convolutional interleave |
US7447981B2 (en) * | 2005-04-01 | 2008-11-04 | Broadcom Corporation | System correcting random and/or burst errors using RS (Reed-Solomon) code, turbo/LDPC (Low Density Parity Check) code and convolutional interleave |
US8091009B2 (en) * | 2006-03-23 | 2012-01-03 | Broadcom Corporation | Symbol by symbol map detection for signals corrupted by colored and/or signal dependent noise |
US7689896B2 (en) * | 2006-06-21 | 2010-03-30 | Broadcom Corporation | Minimal hardware implementation of non-parity and parity trellis |
US20080092018A1 (en) * | 2006-09-28 | 2008-04-17 | Broadcom Corporation, A California Corporation | Tail-biting turbo code for arbitrary number of information bits |
US8074155B2 (en) * | 2006-09-28 | 2011-12-06 | Broadcom Corporation | Tail-biting turbo coding to accommodate any information and/or interleaver block size |
US8065587B2 (en) | 2006-10-10 | 2011-11-22 | Broadcom Corporation | Reduced complexity ARP (almost regular permutation) interleaves providing flexible granularity and parallelism adaptable to any possible turbo code block size |
US7882416B2 (en) * | 2006-10-10 | 2011-02-01 | Broadcom Corporation | General and algebraic-constructed contention-free memory mapping for parallel turbo decoding with algebraic interleave ARP (almost regular permutation) of all possible sizes |
US7831894B2 (en) | 2006-10-10 | 2010-11-09 | Broadcom Corporation | Address generation for contention-free memory mappings of turbo codes with ARP (almost regular permutation) interleaves |
US7827473B2 (en) | 2006-10-10 | 2010-11-02 | Broadcom Corporation | Turbo decoder employing ARP (almost regular permutation) interleave and arbitrary number of decoding processors |
US20080133997A1 (en) * | 2006-12-01 | 2008-06-05 | Broadcom Corporation, A California Corporation | Turbo decoder employing ARP (almost regular permutation) interleave and inverse thereof as de-interleave |
US7975203B2 (en) | 2007-01-17 | 2011-07-05 | Broadcom Corporation | Quadratic polynomial permutation (QPP) interleaver providing hardware savings and flexible granularity adaptable to any possible turbo code block size |
US8065588B2 (en) | 2007-01-17 | 2011-11-22 | Broadcom Corporation | Formulaic flexible collision-free memory accessing for parallel turbo decoding with quadratic polynomial permutation (QPP) interleave |
US7992075B2 (en) * | 2007-03-19 | 2011-08-02 | Intel Corporation | Arrangements for encoding and decoding digital data |
AU2008230844B2 (en) * | 2007-03-27 | 2011-06-09 | Shell Internationale Research Maatschappij B.V. | Wellbore communication, downhole module, and method for communicating |
US20080256424A1 (en) * | 2007-04-13 | 2008-10-16 | Broadcom Corporation | Information bit puncturing for turbo coding with parameter selectable rate matching tailored to lower eb/no without degrading bler (block error rate) performance |
US8904265B2 (en) * | 2007-05-02 | 2014-12-02 | Broadcom Corporation | Optimal period rate matching for turbo coding |
US8069387B2 (en) * | 2007-07-16 | 2011-11-29 | Broadcom Corporation | Turbo coding having combined turbo de-padding and rate matching de-padding |
US8069400B2 (en) * | 2007-08-13 | 2011-11-29 | Broadcom Corporation | Optimal circular buffer rate matching for turbo code |
DE102007053091A1 (de) * | 2007-11-07 | 2009-05-14 | Rohde & Schwarz Gmbh & Co. Kg | Verfahren und Vorrichtung zur Decodierung von faltungscodierten Signalen |
JP2013523043A (ja) | 2010-03-22 | 2013-06-13 | エルアールディシー システムズ、エルエルシー | ソースデータセットの完全性を識別及び保護する方法 |
US11082157B2 (en) | 2019-10-29 | 2021-08-03 | Ciena Corporation | Assessing operating conditions of a receiver in a communication network based on forward error correction decoding properties |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4293951A (en) * | 1979-03-16 | 1981-10-06 | Communications Satellite Corporation | Method and apparatus for encoding/decoding a convolutional code to a periodic convolutional code block |
FR2675971B1 (fr) * | 1991-04-23 | 1993-08-06 | France Telecom | Procede de codage correcteur d'erreurs a au moins deux codages convolutifs systematiques en parallele, procede de decodage iteratif, module de decodage et decodeur correspondants. |
FR2675968B1 (fr) * | 1991-04-23 | 1994-02-04 | France Telecom | Procede de decodage d'un code convolutif a maximum de vraisemblance et ponderation des decisions, et decodeur correspondant. |
-
1996
- 1996-04-03 FR FR9604485A patent/FR2747255B1/fr not_active Expired - Lifetime
-
1997
- 1997-04-03 DE DE69700532T patent/DE69700532T2/de not_active Expired - Lifetime
- 1997-04-03 EP EP97919481A patent/EP0891656B1/de not_active Expired - Lifetime
- 1997-04-03 JP JP53591497A patent/JP3791013B2/ja not_active Expired - Lifetime
- 1997-04-03 US US09/155,819 patent/US6119264A/en not_active Expired - Lifetime
- 1997-04-03 WO PCT/FR1997/000607 patent/WO1997038495A1/fr active IP Right Grant
Also Published As
Publication number | Publication date |
---|---|
JP2000508849A (ja) | 2000-07-11 |
WO1997038495A1 (fr) | 1997-10-16 |
EP0891656A1 (de) | 1999-01-20 |
US6119264A (en) | 2000-09-12 |
EP0891656B1 (de) | 1999-09-15 |
DE69700532T2 (de) | 2000-05-04 |
FR2747255A1 (fr) | 1997-10-10 |
JP3791013B2 (ja) | 2006-06-28 |
FR2747255B1 (fr) | 1998-07-10 |
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