DE69710031T2 - Verfahren zur Übertragung einer Halbleiterschicht mittels Silizium-auf-Isolator (SOI) Technologie - Google Patents

Verfahren zur Übertragung einer Halbleiterschicht mittels Silizium-auf-Isolator (SOI) Technologie

Info

Publication number
DE69710031T2
DE69710031T2 DE69710031T DE69710031T DE69710031T2 DE 69710031 T2 DE69710031 T2 DE 69710031T2 DE 69710031 T DE69710031 T DE 69710031T DE 69710031 T DE69710031 T DE 69710031T DE 69710031 T2 DE69710031 T2 DE 69710031T2
Authority
DE
Germany
Prior art keywords
semiconductor layer
image
substrate
silicon
soi
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69710031T
Other languages
English (en)
Other versions
DE69710031D1 (de
Inventor
Kiyofumi Sakaguchi
Takao Yonehara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Publication of DE69710031D1 publication Critical patent/DE69710031D1/de
Application granted granted Critical
Publication of DE69710031T2 publication Critical patent/DE69710031T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H01L21/3226—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering of silicon on insulator
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H01L21/3225—Thermally inducing defects using oxygen present in the silicon body for intrinsic gettering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76259—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along a porous layer
DE69710031T 1996-11-15 1997-11-14 Verfahren zur Übertragung einer Halbleiterschicht mittels Silizium-auf-Isolator (SOI) Technologie Expired - Lifetime DE69710031T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30454196 1996-11-15

Publications (2)

Publication Number Publication Date
DE69710031D1 DE69710031D1 (de) 2002-03-14
DE69710031T2 true DE69710031T2 (de) 2002-07-18

Family

ID=17934251

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69710031T Expired - Lifetime DE69710031T2 (de) 1996-11-15 1997-11-14 Verfahren zur Übertragung einer Halbleiterschicht mittels Silizium-auf-Isolator (SOI) Technologie

Country Status (12)

Country Link
US (1) US5966620A (de)
EP (1) EP0843344B1 (de)
KR (1) KR100279332B1 (de)
CN (1) CN1079989C (de)
AT (1) ATE212476T1 (de)
AU (1) AU722796B2 (de)
CA (1) CA2221100C (de)
DE (1) DE69710031T2 (de)
ES (1) ES2171252T3 (de)
MY (1) MY124554A (de)
SG (1) SG65697A1 (de)
TW (1) TW483162B (de)

Families Citing this family (182)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0694960B1 (de) * 1994-07-25 2002-07-03 Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno - CoRiMMe Verfahren zur lokalen Reduzierung der Ladungsträgerlebensdauer
TW374196B (en) 1996-02-23 1999-11-11 Semiconductor Energy Lab Co Ltd Semiconductor thin film and method for manufacturing the same and semiconductor device and method for manufacturing the same
EP0851513B1 (de) * 1996-12-27 2007-11-21 Canon Kabushiki Kaisha Herstellungsverfahren eines Halbleiter-Bauelements und Herstellungsverfahren einer Solarzelle
US6756289B1 (en) 1996-12-27 2004-06-29 Canon Kabushiki Kaisha Method of producing semiconductor member and method of producing solar cell
SG71094A1 (en) 1997-03-26 2000-03-21 Canon Kk Thin film formation using laser beam heating to separate layers
CA2233096C (en) 1997-03-26 2003-01-07 Canon Kabushiki Kaisha Substrate and production method thereof
CA2233127C (en) * 1997-03-27 2004-07-06 Canon Kabushiki Kaisha Method and apparatus for separating composite member using fluid
JPH10275905A (ja) * 1997-03-31 1998-10-13 Mitsubishi Electric Corp シリコンウェーハの製造方法およびシリコンウェーハ
US6146979A (en) 1997-05-12 2000-11-14 Silicon Genesis Corporation Pressurized microbubble thin film separation process using a reusable substrate
US20070122997A1 (en) * 1998-02-19 2007-05-31 Silicon Genesis Corporation Controlled process and resulting device
US8835282B2 (en) * 1997-05-12 2014-09-16 Silicon Genesis Corporation Controlled process and resulting device
US6033974A (en) 1997-05-12 2000-03-07 Silicon Genesis Corporation Method for controlled cleaving process
US6291313B1 (en) 1997-05-12 2001-09-18 Silicon Genesis Corporation Method and device for controlled cleaving process
EP0995227A4 (de) * 1997-05-12 2000-07-05 Silicon Genesis Corp Kontrolliertes spaltungsverfahren
JPH1126733A (ja) 1997-07-03 1999-01-29 Seiko Epson Corp 薄膜デバイスの転写方法、薄膜デバイス、薄膜集積回路装置，アクティブマトリクス基板、液晶表示装置および電子機器
US6548382B1 (en) 1997-07-18 2003-04-15 Silicon Genesis Corporation Gettering technique for wafers made using a controlled cleaving process
JPH11168106A (ja) * 1997-09-30 1999-06-22 Fujitsu Ltd 半導体基板の処理方法
JP3451908B2 (ja) * 1997-11-05 2003-09-29 信越半導体株式会社 Ｓｏｉウエーハの熱処理方法およびｓｏｉウエーハ
US6686623B2 (en) 1997-11-18 2004-02-03 Semiconductor Energy Laboratory Co., Ltd. Nonvolatile memory and electronic apparatus
FR2773261B1 (fr) * 1997-12-30 2000-01-28 Commissariat Energie Atomique Procede pour le transfert d'un film mince comportant une etape de creation d'inclusions
US6171982B1 (en) * 1997-12-26 2001-01-09 Canon Kabushiki Kaisha Method and apparatus for heat-treating an SOI substrate and method of preparing an SOI substrate by using the same
US6418999B1 (en) 1997-12-26 2002-07-16 Cannon Kabushiki Kaisha Sample separating apparatus and method, and substrate manufacturing method
US6331208B1 (en) * 1998-05-15 2001-12-18 Canon Kabushiki Kaisha Process for producing solar cell, process for producing thin-film semiconductor, process for separating thin-film semiconductor, and process for forming semiconductor
JP3697106B2 (ja) 1998-05-15 2005-09-21 キヤノン株式会社 半導体基板の作製方法及び半導体薄膜の作製方法
JP2000012864A (ja) 1998-06-22 2000-01-14 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法
US6291326B1 (en) 1998-06-23 2001-09-18 Silicon Genesis Corporation Pre-semiconductor process implant and post-process film separation
US6423614B1 (en) * 1998-06-30 2002-07-23 Intel Corporation Method of delaminating a thin film using non-thermal techniques
JP3358550B2 (ja) * 1998-07-07 2002-12-24 信越半導体株式会社 Ｓｏｉウエーハの製造方法ならびにこの方法で製造されるｓｏｉウエーハ
JP3385972B2 (ja) * 1998-07-10 2003-03-10 信越半導体株式会社 貼り合わせウェーハの製造方法および貼り合わせウェーハ
US6271101B1 (en) * 1998-07-29 2001-08-07 Semiconductor Energy Laboratory Co., Ltd. Process for production of SOI substrate and process for production of semiconductor device
DE19837944A1 (de) * 1998-08-21 2000-02-24 Asea Brown Boveri Verfahren zur Fertigung eines Halbleiterbauelements
JP4476390B2 (ja) 1998-09-04 2010-06-09 株式会社半導体エネルギー研究所 半導体装置の作製方法
EP0989616A3 (de) * 1998-09-22 2006-05-10 Canon Kabushiki Kaisha Verfahren und Vorrichtung zur Herstellung einer photoelektrischen Umwandlungsvorrichtung
US6391743B1 (en) * 1998-09-22 2002-05-21 Canon Kabushiki Kaisha Method and apparatus for producing photoelectric conversion device
JP2000124092A (ja) * 1998-10-16 2000-04-28 Shin Etsu Handotai Co Ltd 水素イオン注入剥離法によってｓｏｉウエーハを製造する方法およびこの方法で製造されたｓｏｉウエーハ
KR100312820B1 (ko) * 1998-10-17 2002-02-19 한상배 발효슬러지를이용하는고도하폐수처리방법
KR100314744B1 (ko) * 1998-10-17 2002-02-19 한상배 유기성폐기물을이용하는질소·인제거방법
JP2000349264A (ja) 1998-12-04 2000-12-15 Canon Inc 半導体ウエハの製造方法、使用方法および利用方法
US6331473B1 (en) * 1998-12-29 2001-12-18 Seiko Epson Corporation SOI substrate, method for making the same, semiconductive device and liquid crystal panel using the same
US20040229443A1 (en) * 1998-12-31 2004-11-18 Bower Robert W. Structures, materials and methods for fabrication of nanostructures by transposed split of ion cut materials
EP1039513A3 (de) * 1999-03-26 2008-11-26 Canon Kabushiki Kaisha Verfahren zur Herstellung einer SOI-Scheibe
US6171965B1 (en) 1999-04-21 2001-01-09 Silicon Genesis Corporation Treatment method of cleaved film for the manufacture of substrates
US6204151B1 (en) * 1999-04-21 2001-03-20 Silicon Genesis Corporation Smoothing method for cleaved films made using thermal treatment
US6287941B1 (en) 1999-04-21 2001-09-11 Silicon Genesis Corporation Surface finishing of SOI substrates using an EPI process
US6881644B2 (en) * 1999-04-21 2005-04-19 Silicon Genesis Corporation Smoothing method for cleaved films made using a release layer
FR2795866B1 (fr) * 1999-06-30 2001-08-17 Commissariat Energie Atomique Procede de realisation d'une membrane mince et structure a membrane ainsi obtenue
US6221740B1 (en) 1999-08-10 2001-04-24 Silicon Genesis Corporation Substrate cleaving tool and method
US6500732B1 (en) 1999-08-10 2002-12-31 Silicon Genesis Corporation Cleaving process to fabricate multilayered substrates using low implantation doses
US6242324B1 (en) * 1999-08-10 2001-06-05 The United States Of America As Represented By The Secretary Of The Navy Method for fabricating singe crystal materials over CMOS devices
WO2001011930A2 (en) * 1999-08-10 2001-02-15 Silicon Genesis Corporation A cleaving process to fabricate multilayered substrates using low implantation doses
US6263941B1 (en) 1999-08-10 2001-07-24 Silicon Genesis Corporation Nozzle for cleaving substrates
US6653209B1 (en) 1999-09-30 2003-11-25 Canon Kabushiki Kaisha Method of producing silicon thin film, method of constructing SOI substrate and semiconductor device
JP3943782B2 (ja) * 1999-11-29 2007-07-11 信越半導体株式会社 剥離ウエーハの再生処理方法及び再生処理された剥離ウエーハ
TW508690B (en) 1999-12-08 2002-11-01 Canon Kk Composite member separating method, thin film manufacturing method, and composite member separating apparatus
US6544862B1 (en) * 2000-01-14 2003-04-08 Silicon Genesis Corporation Particle distribution method and resulting structure for a layer transfer process
FR2811807B1 (fr) * 2000-07-12 2003-07-04 Commissariat Energie Atomique Procede de decoupage d'un bloc de materiau et de formation d'un film mince
JP3556916B2 (ja) * 2000-09-18 2004-08-25 三菱電線工業株式会社 半導体基材の製造方法
FR2817395B1 (fr) 2000-11-27 2003-10-31 Soitec Silicon On Insulator Procede de fabrication d'un substrat notamment pour l'optique, l'electronique ou l'optoelectronique et substrat obtenu par ce procede
FR2894990B1 (fr) * 2005-12-21 2008-02-22 Soitec Silicon On Insulator Procede de fabrication de substrats, notamment pour l'optique,l'electronique ou l'optoelectronique et substrat obtenu selon ledit procede
US6420243B1 (en) * 2000-12-04 2002-07-16 Motorola, Inc. Method for producing SOI wafers by delamination
US6887753B2 (en) * 2001-02-28 2005-05-03 Micron Technology, Inc. Methods of forming semiconductor circuitry, and semiconductor circuit constructions
US6699770B2 (en) * 2001-03-01 2004-03-02 John Tarje Torvik Method of making a hybride substrate having a thin silicon carbide membrane layer
FR2823596B1 (fr) * 2001-04-13 2004-08-20 Commissariat Energie Atomique Substrat ou structure demontable et procede de realisation
FR2823599B1 (fr) 2001-04-13 2004-12-17 Commissariat Energie Atomique Substrat demomtable a tenue mecanique controlee et procede de realisation
DE10131249A1 (de) * 2001-06-28 2002-05-23 Wacker Siltronic Halbleitermat Verfahren zur Herstellung eines Films oder einer Schicht aus halbleitendem Material
US6555451B1 (en) 2001-09-28 2003-04-29 The United States Of America As Represented By The Secretary Of The Navy Method for making shallow diffusion junctions in semiconductors using elemental doping
FR2830983B1 (fr) * 2001-10-11 2004-05-14 Commissariat Energie Atomique Procede de fabrication de couches minces contenant des microcomposants
US6593212B1 (en) 2001-10-29 2003-07-15 The United States Of America As Represented By The Secretary Of The Navy Method for making electro-optical devices using a hydrogenion splitting technique
WO2003046993A1 (fr) * 2001-11-29 2003-06-05 Shin-Etsu Handotai Co.,Ltd. Procede de production de plaquettes soi
JP2003168789A (ja) * 2001-11-29 2003-06-13 Shin Etsu Handotai Co Ltd Ｓｏｉウェーハの製造方法
JP2003204048A (ja) * 2002-01-09 2003-07-18 Shin Etsu Handotai Co Ltd Ｓｏｉウエーハの製造方法及びｓｏｉウエーハ
US6562127B1 (en) 2002-01-16 2003-05-13 The United States Of America As Represented By The Secretary Of The Navy Method of making mosaic array of thin semiconductor material of large substrates
US6607969B1 (en) 2002-03-18 2003-08-19 The United States Of America As Represented By The Secretary Of The Navy Method for making pyroelectric, electro-optical and decoupling capacitors using thin film transfer and hydrogen ion splitting techniques
JP3968566B2 (ja) * 2002-03-26 2007-08-29 日立電線株式会社 窒化物半導体結晶の製造方法及び窒化物半導体ウエハ並びに窒化物半導体デバイス
US6767749B2 (en) 2002-04-22 2004-07-27 The United States Of America As Represented By The Secretary Of The Navy Method for making piezoelectric resonator and surface acoustic wave device using hydrogen implant layer splitting
KR100511656B1 (ko) * 2002-08-10 2005-09-07 주식회사 실트론 나노 에스오아이 웨이퍼의 제조방법 및 그에 따라 제조된나노 에스오아이 웨이퍼
WO2004019403A2 (en) * 2002-08-26 2004-03-04 S.O.I.Tec Silicon On Insulator Technologies Mechanical recycling of a wafer comprising a buffer layer, after having taken a layer therefrom
US7008857B2 (en) * 2002-08-26 2006-03-07 S.O.I.Tec Silicon On Insulator Technologies S.A. Recycling a wafer comprising a buffer layer, after having separated a thin layer therefrom
JP2004103600A (ja) * 2002-09-04 2004-04-02 Canon Inc 基板及びその製造方法
TWI242796B (en) * 2002-09-04 2005-11-01 Canon Kk Substrate and manufacturing method therefor
JP2004103855A (ja) * 2002-09-10 2004-04-02 Canon Inc 基板及びその製造方法
JP2004103946A (ja) * 2002-09-11 2004-04-02 Canon Inc 基板及びその製造方法
US8187377B2 (en) 2002-10-04 2012-05-29 Silicon Genesis Corporation Non-contact etch annealing of strained layers
US7176108B2 (en) * 2002-11-07 2007-02-13 Soitec Silicon On Insulator Method of detaching a thin film at moderate temperature after co-implantation
FR2847075B1 (fr) * 2002-11-07 2005-02-18 Commissariat Energie Atomique Procede de formation d'une zone fragile dans un substrat par co-implantation
FR2848336B1 (fr) * 2002-12-09 2005-10-28 Commissariat Energie Atomique Procede de realisation d'une structure contrainte destinee a etre dissociee
KR100504180B1 (ko) * 2003-01-29 2005-07-28 엘지전자 주식회사 질화물 화합물 반도체의 결정성장 방법
US20050124137A1 (en) * 2003-05-07 2005-06-09 Canon Kabushiki Kaisha Semiconductor substrate and manufacturing method therefor
FR2856844B1 (fr) 2003-06-24 2006-02-17 Commissariat Energie Atomique Circuit integre sur puce de hautes performances
FR2857953B1 (fr) 2003-07-21 2006-01-13 Commissariat Energie Atomique Structure empilee, et procede pour la fabriquer
FR2857983B1 (fr) * 2003-07-24 2005-09-02 Soitec Silicon On Insulator Procede de fabrication d'une couche epitaxiee
US7538010B2 (en) * 2003-07-24 2009-05-26 S.O.I.Tec Silicon On Insulator Technologies Method of fabricating an epitaxially grown layer
FR2861497B1 (fr) 2003-10-28 2006-02-10 Soitec Silicon On Insulator Procede de transfert catastrophique d'une couche fine apres co-implantation
CN100489569C (zh) 2003-10-28 2009-05-20 株式会社半导体能源研究所 制作光学膜的方法
US7542197B2 (en) * 2003-11-01 2009-06-02 Silicon Quest Kabushiki-Kaisha Spatial light modulator featured with an anti-reflective structure
CN100583193C (zh) 2003-11-28 2010-01-20 株式会社半导体能源研究所 制造显示设备的方法
US7772087B2 (en) * 2003-12-19 2010-08-10 Commissariat A L'energie Atomique Method of catastrophic transfer of a thin film after co-implantation
EP2256786A1 (de) * 2004-01-15 2010-12-01 Japan Science and Technology Agency Prozess zur Herstellung von Einkristall-Dünnfilm und Einkristall-Dünnfilmeinrichtung
EP1605504B1 (de) * 2004-06-10 2011-05-25 S.O.I. Tec Silicon on Insulator Technologies S.A. Verfahren für das Herstellen eines SOI Wafers
CN101027768B (zh) * 2004-09-21 2010-11-03 S.O.I.Tec绝缘体上硅技术公司 根据避免气泡形成和限制粗糙度的条件来进行共注入步骤的薄层转移方法
US7402520B2 (en) * 2004-11-26 2008-07-22 Applied Materials, Inc. Edge removal of silicon-on-insulator transfer wafer
US7282425B2 (en) * 2005-01-31 2007-10-16 International Business Machines Corporation Structure and method of integrating compound and elemental semiconductors for high-performance CMOS
JP2008535232A (ja) * 2005-03-29 2008-08-28 エス． オー． アイ． テック シリコン オン インシュレーター テクノロジーズ 完全ハイブリッドｓｏｉ型多層構造
US8324660B2 (en) 2005-05-17 2012-12-04 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
US9153645B2 (en) 2005-05-17 2015-10-06 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
FR2886051B1 (fr) 2005-05-20 2007-08-10 Commissariat Energie Atomique Procede de detachement d'un film mince
US7262112B2 (en) * 2005-06-27 2007-08-28 The Regents Of The University Of California Method for producing dislocation-free strained crystalline films
KR101329388B1 (ko) 2005-07-26 2013-11-14 앰버웨이브 시스템즈 코포레이션 다른 액티브 영역 물질의 집적회로 집적을 위한 솔루션
FR2889887B1 (fr) 2005-08-16 2007-11-09 Commissariat Energie Atomique Procede de report d'une couche mince sur un support
US20070054467A1 (en) * 2005-09-07 2007-03-08 Amberwave Systems Corporation Methods for integrating lattice-mismatched semiconductor structure on insulators
US7638842B2 (en) 2005-09-07 2009-12-29 Amberwave Systems Corporation Lattice-mismatched semiconductor structures on insulators
FR2891281B1 (fr) 2005-09-28 2007-12-28 Commissariat Energie Atomique Procede de fabrication d'un element en couches minces.
US7456080B2 (en) * 2005-12-19 2008-11-25 Corning Incorporated Semiconductor on glass insulator made using improved ion implantation process
JP5064695B2 (ja) * 2006-02-16 2012-10-31 信越化学工業株式会社 Ｓｏｉ基板の製造方法
JP5128781B2 (ja) * 2006-03-13 2013-01-23 信越化学工業株式会社 光電変換素子用基板の製造方法
US7863157B2 (en) * 2006-03-17 2011-01-04 Silicon Genesis Corporation Method and structure for fabricating solar cells using a layer transfer process
US7777250B2 (en) 2006-03-24 2010-08-17 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures and related methods for device fabrication
FR2899378B1 (fr) * 2006-03-29 2008-06-27 Commissariat Energie Atomique Procede de detachement d'un film mince par fusion de precipites
US8098515B2 (en) * 2006-07-07 2012-01-17 The Regents Of The University Of California Spin injection device having semiconductor-ferromagnetic-semiconductor structure and spin transistor
EP2062290B1 (de) 2006-09-07 2019-08-28 Taiwan Semiconductor Manufacturing Company, Ltd. Defektreduzierung durch kontrolle des aspektverhältnisses
US8993410B2 (en) 2006-09-08 2015-03-31 Silicon Genesis Corporation Substrate cleaving under controlled stress conditions
US9362439B2 (en) 2008-05-07 2016-06-07 Silicon Genesis Corporation Layer transfer of films utilizing controlled shear region
US8293619B2 (en) 2008-08-28 2012-10-23 Silicon Genesis Corporation Layer transfer of films utilizing controlled propagation
US7811900B2 (en) 2006-09-08 2010-10-12 Silicon Genesis Corporation Method and structure for fabricating solar cells using a thick layer transfer process
WO2008039534A2 (en) * 2006-09-27 2008-04-03 Amberwave Systems Corporation Quantum tunneling devices and circuits with lattice- mismatched semiconductor structures
US7799592B2 (en) 2006-09-27 2010-09-21 Taiwan Semiconductor Manufacturing Company, Ltd. Tri-gate field-effect transistors formed by aspect ratio trapping
WO2008051503A2 (en) 2006-10-19 2008-05-02 Amberwave Systems Corporation Light-emitter-based devices with lattice-mismatched semiconductor structures
JP2008153411A (ja) * 2006-12-18 2008-07-03 Shin Etsu Chem Co Ltd Ｓｏｉ基板の製造方法
FR2910179B1 (fr) 2006-12-19 2009-03-13 Commissariat Energie Atomique PROCEDE DE FABRICATION DE COUCHES MINCES DE GaN PAR IMPLANTATION ET RECYCLAGE D'UN SUBSTRAT DE DEPART
FR2912258B1 (fr) * 2007-02-01 2009-05-08 Soitec Silicon On Insulator "procede de fabrication d'un substrat du type silicium sur isolant"
FR2912259B1 (fr) * 2007-02-01 2009-06-05 Soitec Silicon On Insulator Procede de fabrication d'un substrat du type "silicium sur isolant".
US8237151B2 (en) 2009-01-09 2012-08-07 Taiwan Semiconductor Manufacturing Company, Ltd. Diode-based devices and methods for making the same
US9508890B2 (en) 2007-04-09 2016-11-29 Taiwan Semiconductor Manufacturing Company, Ltd. Photovoltaics on silicon
US7825328B2 (en) 2007-04-09 2010-11-02 Taiwan Semiconductor Manufacturing Company, Ltd. Nitride-based multi-junction solar cell modules and methods for making the same
US8304805B2 (en) 2009-01-09 2012-11-06 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor diodes fabricated by aspect ratio trapping with coalesced films
US8329541B2 (en) 2007-06-15 2012-12-11 Taiwan Semiconductor Manufacturing Company, Ltd. InP-based transistor fabrication
KR101093588B1 (ko) 2007-09-07 2011-12-15 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 멀티-정션 솔라 셀
JP5463017B2 (ja) * 2007-09-21 2014-04-09 株式会社半導体エネルギー研究所 基板の作製方法
JP5464843B2 (ja) * 2007-12-03 2014-04-09 株式会社半導体エネルギー研究所 Ｓｏｉ基板の作製方法
FR2925221B1 (fr) 2007-12-17 2010-02-19 Commissariat Energie Atomique Procede de transfert d'une couche mince
WO2009084287A1 (ja) * 2007-12-27 2009-07-09 Sharp Kabushiki Kaisha 半導体装置およびその製造方法
US8481845B2 (en) * 2008-02-05 2013-07-09 Gtat Corporation Method to form a photovoltaic cell comprising a thin lamina
US8129613B2 (en) * 2008-02-05 2012-03-06 Twin Creeks Technologies, Inc. Photovoltaic cell comprising a thin lamina having low base resistivity and method of making
US8563352B2 (en) * 2008-02-05 2013-10-22 Gtat Corporation Creation and translation of low-relief texture for a photovoltaic cell
JP5297219B2 (ja) 2008-02-29 2013-09-25 信越化学工業株式会社 単結晶薄膜を有する基板の製造方法
CN101521155B (zh) * 2008-02-29 2012-09-12 信越化学工业株式会社 制备具有单晶薄膜的基板的方法
FR2928775B1 (fr) * 2008-03-11 2011-12-09 Soitec Silicon On Insulator Procede de fabrication d'un substrat de type semiconducteur sur isolant
EP2105957A3 (de) * 2008-03-26 2011-01-19 Semiconductor Energy Laboratory Co., Ltd. Verfahren zur Herstellung eines SOI-Substrats und Verfahren zur Herstellung einer Halbleitervorrichtung
US8183667B2 (en) 2008-06-03 2012-05-22 Taiwan Semiconductor Manufacturing Co., Ltd. Epitaxial growth of crystalline material
US8274097B2 (en) 2008-07-01 2012-09-25 Taiwan Semiconductor Manufacturing Company, Ltd. Reduction of edge effects from aspect ratio trapping
US8981427B2 (en) 2008-07-15 2015-03-17 Taiwan Semiconductor Manufacturing Company, Ltd. Polishing of small composite semiconductor materials
US8330126B2 (en) 2008-08-25 2012-12-11 Silicon Genesis Corporation Race track configuration and method for wafering silicon solar substrates
EP2528087B1 (de) 2008-09-19 2016-06-29 Taiwan Semiconductor Manufacturing Company, Ltd. Formierung von Geräten durch übermässiges Wachstum der Epitaxialschicht
US20100072515A1 (en) 2008-09-19 2010-03-25 Amberwave Systems Corporation Fabrication and structures of crystalline material
CN102239538A (zh) * 2008-09-24 2011-11-09 S.O.I.探测硅绝缘技术公司 形成经松弛半导体材料层、半导体结构、装置的方法及包含经松弛半导体材料层、半导体结构、装置的工程衬底
US8253211B2 (en) 2008-09-24 2012-08-28 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor sensor structures with reduced dislocation defect densities
US20100081251A1 (en) * 2008-09-29 2010-04-01 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing soi substrate
SG160302A1 (en) * 2008-09-29 2010-04-29 Semiconductor Energy Lab Method for manufacturing semiconductor substrate
EP2345060B1 (de) 2008-10-30 2013-12-04 Soitec Verfahren zur bildung von schichten aus halbleitermaterial mit verringerter gitterverspannung und entworfene substrate damit
US8637383B2 (en) 2010-12-23 2014-01-28 Soitec Strain relaxation using metal materials and related structures
JP4821834B2 (ja) * 2008-10-31 2011-11-24 株式会社村田製作所 圧電性複合基板の製造方法
US8198172B2 (en) * 2009-02-25 2012-06-12 Micron Technology, Inc. Methods of forming integrated circuits using donor and acceptor substrates
WO2010114956A1 (en) 2009-04-02 2010-10-07 Taiwan Semiconductor Manufacturing Company, Ltd. Devices formed from a non-polar plane of a crystalline material and method of making the same
US8329557B2 (en) 2009-05-13 2012-12-11 Silicon Genesis Corporation Techniques for forming thin films by implantation with reduced channeling
FR2947098A1 (fr) * 2009-06-18 2010-12-24 Commissariat Energie Atomique Procede de transfert d'une couche mince sur un substrat cible ayant un coefficient de dilatation thermique different de celui de la couche mince
JP5643509B2 (ja) * 2009-12-28 2014-12-17 信越化学工業株式会社 応力を低減したｓｏｓ基板の製造方法
US20110207306A1 (en) * 2010-02-22 2011-08-25 Sarko Cherekdjian Semiconductor structure made using improved ion implantation process
US8349626B2 (en) * 2010-03-23 2013-01-08 Gtat Corporation Creation of low-relief texture for a photovoltaic cell
US8377799B2 (en) * 2010-03-31 2013-02-19 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing SOI substrate
JP5429200B2 (ja) * 2010-05-17 2014-02-26 株式会社村田製作所 複合圧電基板の製造方法および圧電デバイス
US8558195B2 (en) 2010-11-19 2013-10-15 Corning Incorporated Semiconductor structure made using improved pseudo-simultaneous multiple ion implantation process
US8008175B1 (en) 2010-11-19 2011-08-30 Coring Incorporated Semiconductor structure made using improved simultaneous multiple ion implantation process
US8196546B1 (en) 2010-11-19 2012-06-12 Corning Incorporated Semiconductor structure made using improved multiple ion implantation process
CN103700662B (zh) * 2013-12-09 2017-02-15 京东方科技集团股份有限公司 一种承载基板和柔性显示器件制作方法
FR3024280A1 (fr) * 2014-07-25 2016-01-29 Soitec Silicon On Insulator Procede de detachement d'une couche utile
CN106992140A (zh) * 2016-01-20 2017-07-28 沈阳硅基科技有限公司 一种采用激光裂片技术制备soi硅片的方法
CN109148317B (zh) * 2017-06-15 2022-05-10 沈阳硅基科技有限公司 用于激光裂片技术制备soi硅片的机台
US10340290B2 (en) 2017-09-15 2019-07-02 Globalfoundries Inc. Stacked SOI semiconductor devices with back bias mechanism
WO2019209492A1 (en) * 2018-04-27 2019-10-31 Globalwafers Co., Ltd. Light assisted platelet formation facilitating layer transfer from a semiconductor donor substrate
CN109904065B (zh) * 2019-02-21 2021-05-11 中国科学院上海微系统与信息技术研究所 异质结构的制备方法
CN111799365B (zh) * 2020-06-29 2022-03-25 上海新硅聚合半导体有限公司 基于同一衬底制备不同厚度薄膜的方法及其结构、及应用器件
CN113764542A (zh) * 2021-08-31 2021-12-07 天津大学 一种氦离子注入提升硅基探测器红外响应的方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4727047A (en) * 1980-04-10 1988-02-23 Massachusetts Institute Of Technology Method of producing sheets of crystalline material
JPH0414705A (ja) * 1990-05-07 1992-01-20 Toyobo Co Ltd 透明導電膜およびその製造方法
JP2608351B2 (ja) * 1990-08-03 1997-05-07 キヤノン株式会社 半導体部材及び半導体部材の製造方法
CA2048339C (en) * 1990-08-03 1997-11-25 Takao Yonehara Semiconductor member and process for preparing semiconductor member
TW211621B (de) * 1991-07-31 1993-08-21 Canon Kk
FR2681472B1 (fr) * 1991-09-18 1993-10-29 Commissariat Energie Atomique Procede de fabrication de films minces de materiau semiconducteur.
DE69333619T2 (de) * 1992-01-30 2005-09-29 Canon K.K. Herstellungsverfahren für Halbleitersubstrate
FR2715501B1 (fr) * 1994-01-26 1996-04-05 Commissariat Energie Atomique Procédé de dépôt de lames semiconductrices sur un support.
JP3257580B2 (ja) * 1994-03-10 2002-02-18 キヤノン株式会社 半導体基板の作製方法
JP3542376B2 (ja) * 1994-04-08 2004-07-14 キヤノン株式会社 半導体基板の製造方法
JP3381443B2 (ja) * 1995-02-02 2003-02-24 ソニー株式会社 基体から半導体層を分離する方法、半導体素子の製造方法およびｓｏｉ基板の製造方法
CN1132223C (zh) * 1995-10-06 2003-12-24 佳能株式会社 半导体衬底及其制造方法

Also Published As

Publication number Publication date
MY124554A (en) 2006-06-30
DE69710031D1 (de) 2002-03-14
TW483162B (en) 2002-04-11
CA2221100C (en) 2003-01-21
AU722796B2 (en) 2000-08-10
SG65697A1 (en) 1999-06-22
CN1183635A (zh) 1998-06-03
KR100279332B1 (ko) 2001-01-15
KR19980042471A (ko) 1998-08-17
EP0843344B1 (de) 2002-01-23
AU4518297A (en) 1998-05-21
ATE212476T1 (de) 2002-02-15
EP0843344A1 (de) 1998-05-20
ES2171252T3 (es) 2002-09-01
CA2221100A1 (en) 1998-05-15
US5966620A (en) 1999-10-12
CN1079989C (zh) 2002-02-27

Similar Documents

Publication Publication Date Title
DE69710031T2 (de) Verfahren zur Übertragung einer Halbleiterschicht mittels Silizium-auf-Isolator (SOI) Technologie
ATE166747T1 (de) Verfahren zur herstellung eines halbleitersubstrates
ATE195610T1 (de) Verfahren zur herstellung eines halbleiterkörpers
SG67458A1 (en) Process for producing semiconductor article
ATE266258T1 (de) Verfahren zur herstellung eines halbleitergegenstands
ATE263429T1 (de) Verfahren zur herstellung eines halbleitergegenstands
EP0793263A3 (de) Verfahren zur Herstellung von Halbleitersubstraten
US7465646B2 (en) Methods for fabricating a wafer structure having a strained silicon utility layer
TW346670B (en) Fabrication process and fabrication apparatus of SOI substrate
EP1347505A3 (de) Verfahren zur Vorbereitung einer Halbleitervorrichtung unter Verwendung der Ätzlösung
DE69432784D1 (de) Verfahren zur Herstellung eines Halbleitersubstrats
ATE259098T1 (de) Verfahren zur herstellung eines soi-substrats
CA2233115A1 (en) Semiconductor substrate and method of manufacturing the same
EP0867921A3 (de) Substrat und Verfahren zu dessen Herstellung
JPS6417421A (en) Method of building up wafer on insulation
ATE275761T1 (de) Halbleitersubstrat und verfahren zu dessen herstellung
EP0779650A3 (de) Verfahren zur Herstellung eines SOI-Substrates
EP0771025A3 (de) Verfahren zur Herstellung von isolierenden Bereichen aus Oxid in einem SOI-Substrat

Legal Events

Date Code Title Description
8364 No opposition during term of opposition