DE69711678D1 - Lookup-tabellen mit zweitfunktion als schieberegister - Google Patents

Lookup-tabellen mit zweitfunktion als schieberegister

Info

Publication number
DE69711678D1
DE69711678D1 DE69711678T DE69711678T DE69711678D1 DE 69711678 D1 DE69711678 D1 DE 69711678D1 DE 69711678 T DE69711678 T DE 69711678T DE 69711678 T DE69711678 T DE 69711678T DE 69711678 D1 DE69711678 D1 DE 69711678D1
Authority
DE
Germany
Prior art keywords
function
lookup tables
sliding register
register
sliding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69711678T
Other languages
English (en)
Other versions
DE69711678T2 (de
Inventor
J Bauer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xilinx Inc
Original Assignee
Xilinx Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xilinx Inc filed Critical Xilinx Inc
Publication of DE69711678D1 publication Critical patent/DE69711678D1/de
Application granted granted Critical
Publication of DE69711678T2 publication Critical patent/DE69711678T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/1733—Controllable logic circuits
    • H03K19/1735—Controllable logic circuits by wiring, e.g. uncommitted logic arrays
    • H03K19/1736—Controllable logic circuits by wiring, e.g. uncommitted logic arrays in which the wiring can be modified
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17724—Structural details of logic blocks
    • H03K19/17728—Reconfigurable logic blocks, e.g. lookup tables
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17736—Structural details of routing resources
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17748—Structural details of configuration resources
    • H03K19/17768—Structural details of configuration resources for security
DE69711678T 1996-11-22 1997-06-16 Lookup-tabellen mit zweitfunktion als schieberegister Expired - Lifetime DE69711678T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/754,421 US5889413A (en) 1996-11-22 1996-11-22 Lookup tables which double as shift registers
PCT/US1997/009314 WO1998023033A1 (en) 1996-11-22 1997-06-16 Lookup tables which double as shift registers

Publications (2)

Publication Number Publication Date
DE69711678D1 true DE69711678D1 (de) 2002-05-08
DE69711678T2 DE69711678T2 (de) 2002-09-26

Family

ID=25034725

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69711678T Expired - Lifetime DE69711678T2 (de) 1996-11-22 1997-06-16 Lookup-tabellen mit zweitfunktion als schieberegister

Country Status (5)

Country Link
US (3) US5889413A (de)
EP (1) EP0940012B1 (de)
JP (1) JP3871718B2 (de)
DE (1) DE69711678T2 (de)
WO (1) WO1998023033A1 (de)

Families Citing this family (104)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6427156B1 (en) 1997-01-21 2002-07-30 Xilinx, Inc. Configurable logic block with AND gate for efficient multiplication in FPGAS
US5920202A (en) * 1997-02-26 1999-07-06 Xilinx, Inc. Configurable logic element with ability to evaluate five and six input functions
US6396303B1 (en) 1997-02-26 2002-05-28 Xilinx, Inc. Expandable interconnect structure for FPGAS
US6201410B1 (en) 1997-02-26 2001-03-13 Xilinx, Inc. Wide logic gate implemented in an FPGA configurable logic element
US5963050A (en) 1997-02-26 1999-10-05 Xilinx, Inc. Configurable logic element with fast feedback paths
JPH11328947A (ja) * 1998-05-18 1999-11-30 Nec Corp 大規模ｆｉｆｏ回路
GB9900432D0 (en) * 1999-01-08 1999-02-24 Xilinx Inc Linear feedback shift register in a progammable gate array
US6191614B1 (en) * 1999-04-05 2001-02-20 Xilinx, Inc. FPGA configuration circuit including bus-based CRC register
US6426761B1 (en) * 1999-04-23 2002-07-30 Internation Business Machines Corporation Information presentation system for a graphical user interface
US6292019B1 (en) * 1999-05-07 2001-09-18 Xilinx Inc. Programmable logic device having configurable logic blocks with user-accessible input multiplexers
US6507211B1 (en) 1999-07-29 2003-01-14 Xilinx, Inc. Programmable logic device capable of preserving user data during partial or complete reconfiguration
US6499045B1 (en) 1999-10-21 2002-12-24 Xilinx, Inc. Implementation of a two-dimensional wavelet transform
US6268742B1 (en) 2000-01-12 2001-07-31 Xilinx, Inc. Tap and matched filter arrangement
US6539508B1 (en) 2000-03-15 2003-03-25 Xilinx, Inc. Methods and circuits for testing programmable logic
US6356110B1 (en) 2000-04-03 2002-03-12 Altera Corporation San Jose Ca Multifunction memory array in a programmable logic device
US6462577B1 (en) 2000-04-28 2002-10-08 Altera Corporation Configurable memory structures in a programmable logic device
US6857043B1 (en) * 2000-04-28 2005-02-15 Altera Corporation Shift register implementations of first-in/first-out memories utilizing a double increment gray code counter
US6411124B2 (en) 2000-04-28 2002-06-25 Altera Corporation Programmable logic device logic modules with shift register capabilities
US6278289B1 (en) 2000-05-01 2001-08-21 Xilinx, Inc. Content-addressable memory implemented using programmable logic
US6445209B1 (en) 2000-05-05 2002-09-03 Xilinx, Inc. FPGA lookup table with NOR gate write decoder and high speed read decoder
US6529040B1 (en) * 2000-05-05 2003-03-04 Xilinx, Inc. FPGA lookup table with speed read decoder
US6373279B1 (en) 2000-05-05 2002-04-16 Xilinx, Inc. FPGA lookup table with dual ended writes for ram and shift register modes
US6791366B1 (en) * 2000-06-28 2004-09-14 Cypress Semiconductor Corp. Circuit for implementing product term inputs
US6348812B1 (en) * 2000-07-05 2002-02-19 Elan Research Dynamic programmable logic array that can be reprogrammed and a method of use
ATE387880T1 (de) * 2000-07-10 2008-03-15 Uni Charm Corp Reinigungsartikel
US6724810B1 (en) 2000-11-17 2004-04-20 Xilinx, Inc. Method and apparatus for de-spreading spread spectrum signals
US6684235B1 (en) 2000-11-28 2004-01-27 Xilinx, Inc. One-dimensional wavelet system and method
EP1233517B1 (de) 2001-02-09 2012-04-18 Sicronic Remote KG, LLC System zur schnellen Konfiguration einer programmierbaren logischen Vorrichtung
US6646465B2 (en) 2001-02-09 2003-11-11 Stmicroelectronics Ltd. Programmable logic device including bi-directional shift register
US6384627B1 (en) 2001-02-16 2002-05-07 Xilinx, Inc. Logic block used as dynamically configurable logic function
US6388466B1 (en) * 2001-04-27 2002-05-14 Xilinx, Inc. FPGA logic element with variable-length shift register capability
US6466505B1 (en) 2001-05-02 2002-10-15 Cypress Semiconductor Corp. Flexible input structure for an embedded memory
US7051153B1 (en) 2001-05-06 2006-05-23 Altera Corporation Memory array operating as a shift register
US7038489B2 (en) * 2001-06-15 2006-05-02 Stmicroelectronics Ltd. Method for sharing configuration data for high logic density on chip
US7127697B1 (en) 2001-08-07 2006-10-24 Xilinx, Inc. Methods of utilizing programmable logic devices having localized defects in application-specific products
JP4317013B2 (ja) * 2001-08-07 2009-08-19 ザイリンクス インコーポレイテッド プログラマブルロジックデバイスのための特定用途向け検査方法
US6664808B2 (en) 2001-08-07 2003-12-16 Xilinx, Inc. Method of using partially defective programmable logic devices
JP3879461B2 (ja) * 2001-09-05 2007-02-14 日立電線株式会社 配線基板及びその製造方法
EP1440512A1 (de) * 2001-10-29 2004-07-28 Leopard Logic, Inc. Programmierbare schnittstelle für kerne von am einsatzort programmierbaren gate-arrays
US6556042B1 (en) 2002-02-20 2003-04-29 Xilinx, Inc. FPGA with improved structure for implementing large multiplexers
DE10208618A1 (de) * 2002-02-27 2003-09-04 Bosch Gmbh Robert Digitale Verzögerungsleitung
JP2003297932A (ja) * 2002-03-29 2003-10-17 Toshiba Corp 半導体装置
US6876227B2 (en) * 2002-03-29 2005-04-05 Parama Networks, Inc. Simplifying the layout of printed circuit boards
US6970012B2 (en) * 2002-06-10 2005-11-29 Xilinx, Inc. Programmable logic device having heterogeneous programmable logic blocks
US7028281B1 (en) * 2002-07-12 2006-04-11 Lattice Semiconductor Corporation FPGA with register-intensive architecture
US7143295B1 (en) 2002-07-18 2006-11-28 Xilinx, Inc. Methods and circuits for dedicating a programmable logic device for use with specific designs
US6760899B1 (en) 2002-08-08 2004-07-06 Xilinx, Inc. Dedicated resource placement enhancement
KR20050059081A (ko) 2002-08-29 2005-06-17 코닌클리즈케 필립스 일렉트로닉스 엔.브이. 재구성가능 전자 장치
EP1563508A2 (de) * 2002-08-29 2005-08-17 Koninklijke Philips Electronics N.V. Elektronische einrichtung mit datenspeichereinrichtung
DE60235888D1 (de) * 2002-09-12 2010-05-20 St Microelectronics Asia Pseudo- Zweidimensionaler Speicher mit wahlfreiem Zugriff
US6971083B1 (en) * 2002-11-13 2005-11-29 Altera Corporation Method for programming programmable logic device with blocks that perform multiplication and other arithmetic functions
US7093084B1 (en) 2002-12-03 2006-08-15 Altera Corporation Memory implementations of shift registers
US6924664B2 (en) * 2003-08-15 2005-08-02 Kilopass Technologies, Inc. Field programmable gate array
US20110064214A1 (en) * 2003-09-09 2011-03-17 Ternarylogic Llc Methods and Apparatus in Alternate Finite Field Based Coders and Decoders
US8577026B2 (en) 2010-12-29 2013-11-05 Ternarylogic Llc Methods and apparatus in alternate finite field based coders and decoders
US20070098160A1 (en) * 2005-11-03 2007-05-03 Peter Lablans SCRAMBLING AND SELF-SYNCHRONIZING DESCRAMBLING METHODS FOR BINARY AND NON-BINARY DIGITAL SIGNALS NOT USING LFSRs
US7216277B1 (en) 2003-11-18 2007-05-08 Xilinx, Inc. Self-repairing redundancy for memory blocks in programmable logic devices
US7119575B1 (en) * 2004-01-12 2006-10-10 Altera Corporation Logic cell with improved multiplexer, barrel shifter, and crossbarring efficiency
US7084665B1 (en) 2004-07-22 2006-08-01 Altera Corporation Distributed random access memory in a programmable logic device
US7075333B1 (en) 2004-08-24 2006-07-11 Xilinx, Inc. Programmable circuit optionally configurable as a lookup table or a wide multiplexer
US7543212B2 (en) * 2004-09-13 2009-06-02 Idaho Research Foundation, Inc. Low-density parity-check (LDPC) encoder
US7394708B1 (en) 2005-03-18 2008-07-01 Xilinx, Inc. Adjustable global tap voltage to improve memory cell yield
US7205790B1 (en) 2005-06-14 2007-04-17 Xilinx, Inc. Programmable integrated circuit providing efficient implementations of wide logic functions
US7253658B1 (en) 2005-06-14 2007-08-07 Xilinx, Inc. Integrated circuit providing direct access to multi-directional interconnect lines in a general interconnect structure
US7265576B1 (en) 2005-06-14 2007-09-04 Xilinx, Inc. Programmable lookup table with dual input and output terminals in RAM mode
US7276934B1 (en) 2005-06-14 2007-10-02 Xilinx, Inc. Integrated circuit with programmable routing structure including diagonal interconnect lines
US7218139B1 (en) 2005-06-14 2007-05-15 Xilinx, Inc. Programmable integrated circuit providing efficient implementations of arithmetic functions
US7804719B1 (en) 2005-06-14 2010-09-28 Xilinx, Inc. Programmable logic block having reduced output delay during RAM write processes when programmed to function in RAM mode
US7256612B1 (en) 2005-06-14 2007-08-14 Xilinx, Inc. Programmable logic block providing carry chain with programmable initialization values
US7193433B1 (en) 2005-06-14 2007-03-20 Xilinx, Inc. Programmable logic block having lookup table with partial output signal driving carry multiplexer
US7202697B1 (en) 2005-06-14 2007-04-10 Xilinx, Inc. Programmable logic block having improved performance when functioning in shift register mode
US7375552B1 (en) 2005-06-14 2008-05-20 Xilinx, Inc. Programmable logic block with dedicated and selectable lookup table outputs coupled to general interconnect structure
US7233168B1 (en) * 2005-06-14 2007-06-19 Xilinx, Inc. Methods of setting and resetting lookup table memory cells
US7215138B1 (en) 2005-06-14 2007-05-08 Xilinx, Inc. Programmable lookup table with dual input and output terminals in shift register mode
US7268587B1 (en) 2005-06-14 2007-09-11 Xilinx, Inc. Programmable logic block with carry chains providing lookahead functions of different lengths
US7274214B1 (en) 2005-06-14 2007-09-25 Xilinx, Inc. Efficient tile layout for a programmable logic device
US20070088997A1 (en) * 2005-09-26 2007-04-19 Peter Lablans Generation and self-synchronizing detection of sequences using addressable memories
DE102005048525A1 (de) * 2005-10-07 2007-04-12 Micronas Gmbh Schaltungsarchitektur für eine integrierte Schaltung
US8832326B1 (en) * 2005-11-01 2014-09-09 Xilinx, Inc. Circuit and method for ordering data words
US7463056B1 (en) 2005-12-12 2008-12-09 Xilinx, Inc. Writeable shift register lookup table in FPGA with SRAM memory cells in lookup table reprogrammed by writing after initial configuration
US7391236B2 (en) * 2005-12-27 2008-06-24 Altera Corporation Distributed memory in field-programmable gate array integrated circuit devices
US7378868B2 (en) * 2006-01-19 2008-05-27 Altera Corporation Modular I/O bank architecture
US7576562B1 (en) * 2006-06-19 2009-08-18 The United States Of America As Represented By The United States National Aeronautics And Space Administration Diagnosable structured logic array
US7979607B2 (en) * 2009-02-27 2011-07-12 Honeywell International Inc. Cascadable high-performance instant-fall-through synchronous first-in-first-out (FIFO) buffer
JP2010257280A (ja) 2009-04-27 2010-11-11 Renesas Electronics Corp シリアル制御装置、半導体装置及びシリアルデータの転送方法
CA2769249C (en) 2009-07-30 2014-11-18 Ivax International B.V. Dose counter for a metered-dose inhaler
US8081010B1 (en) 2009-11-24 2011-12-20 Ics, Llc Self restoring logic
US8476927B2 (en) 2011-04-29 2013-07-02 Semiconductor Energy Laboratory Co., Ltd. Programmable logic device
CN103259524A (zh) * 2012-02-17 2013-08-21 京微雅格（北京）科技有限公司 一种采用快速级连结构的集成电路
US9779784B2 (en) * 2014-10-29 2017-10-03 Micron Technology, Inc. Apparatuses and methods for performing logical operations using sensing circuitry
US9824024B1 (en) * 2014-10-31 2017-11-21 Altera Corporation Configurable storage blocks with embedded first-in first-out and delay line circuitry
CN104681092B (zh) * 2015-02-12 2017-11-10 无锡中微亿芯有限公司 基于可编程存储单元的移位寄存器结构
EP3157172B1 (de) * 2015-10-15 2018-11-28 Menta System und verfahren zum testen und konfigurieren eines fpga
EP3157171B1 (de) 2015-10-15 2020-06-03 Menta Logische blockarchitektur für ein programmierbares gate-array
US9940995B1 (en) 2017-01-31 2018-04-10 Intel Corporation Methods and apparatus for reusing lookup table random-access memory (LUTRAM) elements as configuration random-access memory (CRAM) elements
US10074409B2 (en) 2017-01-31 2018-09-11 Intel Corporation Configurable storage blocks having simple first-in first-out enabling circuitry
US11114138B2 (en) 2017-09-15 2021-09-07 Groq, Inc. Data structures with multiple read ports
US11243880B1 (en) 2017-09-15 2022-02-08 Groq, Inc. Processor architecture
US11868804B1 (en) 2019-11-18 2024-01-09 Groq, Inc. Processor instruction dispatch configuration
US11360934B1 (en) 2017-09-15 2022-06-14 Groq, Inc. Tensor streaming processor architecture
US11170307B1 (en) 2017-09-21 2021-11-09 Groq, Inc. Predictive model compiler for generating a statically scheduled binary with known resource constraints
US11204976B2 (en) 2018-11-19 2021-12-21 Groq, Inc. Expanded kernel generation
US11165428B1 (en) * 2019-07-18 2021-11-02 Groq, Inc. Circuits and methods for updating lookup tables
US20210326284A1 (en) * 2021-06-25 2021-10-21 Intel Corporation At-speed burst sampling for user registers

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US34363A (en) * 1862-02-11 Improvement in machinery for cleaning cotton
US4870302A (en) * 1984-03-12 1989-09-26 Xilinx, Inc. Configurable electrical circuit having configurable logic elements and configurable interconnects
USRE34363E (en) * 1984-03-12 1993-08-31 Xilinx, Inc. Configurable electrical circuit having configurable logic elements and configurable interconnects
US4821233A (en) * 1985-09-19 1989-04-11 Xilinx, Incorporated 5-transistor memory cell with known state on power-up
US4967107A (en) * 1989-05-12 1990-10-30 Plus Logic, Inc. Programmable logic expander
US5343406A (en) * 1989-07-28 1994-08-30 Xilinx, Inc. Distributed memory architecture for a configurable logic array and method for using distributed memory
US5212652A (en) * 1989-08-15 1993-05-18 Advanced Micro Devices, Inc. Programmable gate array with improved interconnect structure
US5267187A (en) * 1990-05-10 1993-11-30 Xilinx Inc Logic structure and circuit for fast carry
US5325109A (en) * 1990-12-27 1994-06-28 Calcomp Inc. Method and apparatus for manipulation of pixel data in computer graphics
JP2764360B2 (ja) * 1992-05-18 1998-06-11 三菱電機株式会社 並／直列変換回路、直／並列変換回路およびそれらを含むシステム
US5291079A (en) * 1992-07-23 1994-03-01 Xilinx, Inc. Configuration control unit for programming a field programmable gate array and reading array status
US5414377A (en) * 1992-12-21 1995-05-09 Xilinx, Inc. Logic block with look-up table for configuration and memory
US5352940A (en) * 1993-05-27 1994-10-04 Altera Corporation Ram convertible look-up table based macrocell for PLDs
US5386156A (en) * 1993-08-27 1995-01-31 At&T Corp. Programmable function unit with programmable fast ripple logic
US5349250A (en) * 1993-09-02 1994-09-20 Xilinx, Inc. Logic structure and circuit for fast carry
US5394031A (en) * 1993-12-08 1995-02-28 At&T Corp. Apparatus and method to improve programming speed of field programmable gate arrays
US5442306A (en) * 1994-09-09 1995-08-15 At&T Corp. Field programmable gate array using look-up tables, multiplexers and decoders
US5787007A (en) * 1996-01-30 1998-07-28 Xilinx, Inc. Structure and method for loading RAM data within a programmable logic device
US5694056A (en) * 1996-04-01 1997-12-02 Xilinx, Inc. Fast pipeline frame full detector

Also Published As

Publication number Publication date
US6262597B1 (en) 2001-07-17
US6118298A (en) 2000-09-12
DE69711678T2 (de) 2002-09-26
US5889413A (en) 1999-03-30
WO1998023033A1 (en) 1998-05-28
JP2001504657A (ja) 2001-04-03
EP0940012B1 (de) 2002-04-03
EP0940012A1 (de) 1999-09-08
JP3871718B2 (ja) 2007-01-24

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