DE69719239T2 - Hardware-Anordnung zur optimierten Vorausholung von Befehlen und Daten - Google Patents

Hardware-Anordnung zur optimierten Vorausholung von Befehlen und Daten

Info

Publication number
DE69719239T2
DE69719239T2 DE69719239T DE69719239T DE69719239T2 DE 69719239 T2 DE69719239 T2 DE 69719239T2 DE 69719239 T DE69719239 T DE 69719239T DE 69719239 T DE69719239 T DE 69719239T DE 69719239 T2 DE69719239 T2 DE 69719239T2
Authority
DE
Germany
Prior art keywords
fetching
commands
data
hardware arrangement
optimized pre
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69719239T
Other languages
English (en)
Other versions
DE69719239D1 (de
Inventor
David R Emberson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sun Microsystems Inc
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Application granted granted Critical
Publication of DE69719239D1 publication Critical patent/DE69719239D1/de
Publication of DE69719239T2 publication Critical patent/DE69719239T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3802—Instruction prefetching
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0862—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3824—Operand accessing
    • G06F9/383—Operand prefetching
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/60—Details of cache memory
    • G06F2212/6028—Prefetching based on hints or prefetch instructions
DE69719239T 1996-05-15 1997-05-06 Hardware-Anordnung zur optimierten Vorausholung von Befehlen und Daten Expired - Lifetime DE69719239T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/648,533 US5761468A (en) 1996-05-15 1996-05-15 Hardware mechanism for optimizing instruction and data prefetching by forming augmented prefetch instructions

Publications (2)

Publication Number Publication Date
DE69719239D1 DE69719239D1 (de) 2003-04-03
DE69719239T2 true DE69719239T2 (de) 2003-10-30

Family

ID=24601175

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69719239T Expired - Lifetime DE69719239T2 (de) 1996-05-15 1997-05-06 Hardware-Anordnung zur optimierten Vorausholung von Befehlen und Daten

Country Status (4)

Country Link
US (1) US5761468A (de)
EP (1) EP0810517B1 (de)
JP (1) JP3718319B2 (de)
DE (1) DE69719239T2 (de)

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US7835989B1 (en) 1992-12-09 2010-11-16 Discovery Communications, Inc. Electronic book alternative delivery systems
US7509270B1 (en) 1992-12-09 2009-03-24 Discovery Communications, Inc. Electronic Book having electronic commerce features
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US9053640B1 (en) 1993-12-02 2015-06-09 Adrea, LLC Interactive electronic book
US7861166B1 (en) 1993-12-02 2010-12-28 Discovery Patent Holding, Llc Resizing document pages to fit available hardware screens
US8095949B1 (en) 1993-12-02 2012-01-10 Adrea, LLC Electronic book with restricted access features
US7865567B1 (en) * 1993-12-02 2011-01-04 Discovery Patent Holdings, Llc Virtual on-demand electronic book
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EP0752645B1 (de) * 1995-07-07 2017-11-22 Oracle America, Inc. Abstimmbare Softwaresteuerung von Pufferspeichern einer Harvard-Architektur mittels Vorausladebefehlen
US6173368B1 (en) * 1995-12-18 2001-01-09 Texas Instruments Incorporated Class categorized storage circuit for storing non-cacheable data until receipt of a corresponding terminate signal
US6041393A (en) * 1996-08-23 2000-03-21 Hewlett-Packard Co. Array padding for higher memory throughput in the presence of dirty misses
US5854934A (en) * 1996-08-23 1998-12-29 Hewlett-Packard Company Optimizing compiler having data cache prefetch spreading
US6047363A (en) * 1997-10-14 2000-04-04 Advanced Micro Devices, Inc. Prefetching data using profile of cache misses from earlier code executions
US6202126B1 (en) * 1997-10-24 2001-03-13 Compaq Computer Corporation Victimization of clean data blocks
US5941981A (en) * 1997-11-03 1999-08-24 Advanced Micro Devices, Inc. System for using a data history table to select among multiple data prefetch algorithms
US5964867A (en) * 1997-11-26 1999-10-12 Digital Equipment Corporation Method for inserting memory prefetch operations based on measured latencies in a program optimizer
US5944815A (en) * 1998-01-12 1999-08-31 Advanced Micro Devices, Inc. Microprocessor configured to execute a prefetch instruction including an access count field defining an expected number of access
US6453389B1 (en) * 1999-06-25 2002-09-17 Hewlett-Packard Company Optimizing computer performance by using data compression principles to minimize a loss function
US6651088B1 (en) * 1999-07-20 2003-11-18 Hewlett-Packard Development Company, L.P. Method for reducing coherent misses in shared-memory multiprocessors utilizing lock-binding prefetchs
US6675374B2 (en) 1999-10-12 2004-01-06 Hewlett-Packard Development Company, L.P. Insertion of prefetch instructions into computer program code
US6799263B1 (en) 1999-10-28 2004-09-28 Hewlett-Packard Development Company, L.P. Prefetch instruction for an unpredicted path including a flush field for indicating whether earlier prefetches are to be discarded and whether in-progress prefetches are to be aborted
US6460115B1 (en) * 1999-11-08 2002-10-01 International Business Machines Corporation System and method for prefetching data to multiple levels of cache including selectively using a software hint to override a hardware prefetch mechanism
US6574712B1 (en) * 1999-11-08 2003-06-03 International Business Machines Corporation Software prefetch system and method for predetermining amount of streamed data
US6687807B1 (en) * 2000-04-18 2004-02-03 Sun Microystems, Inc. Method for apparatus for prefetching linked data structures
US7366932B2 (en) 2002-10-30 2008-04-29 Stmicroelectronics, Inc. Method and apparatus to adapt the clock rate of a programmable coprocessor for optimal performance and power dissipation
US7334088B2 (en) * 2002-12-20 2008-02-19 International Business Machines Corporation Page descriptors for prefetching and memory management
US8751753B1 (en) 2003-04-09 2014-06-10 Guillermo J. Rozas Coherence de-coupling buffer
US7636815B1 (en) 2003-04-09 2009-12-22 Klaiber Alexander C System and method for handling direct memory accesses
US8595394B1 (en) * 2003-06-26 2013-11-26 Nvidia Corporation Method and system for dynamic buffering of disk I/O command chains
US8683132B1 (en) * 2003-09-29 2014-03-25 Nvidia Corporation Memory controller for sequentially prefetching data for a processor of a computer system
US8356142B1 (en) 2003-11-12 2013-01-15 Nvidia Corporation Memory controller for non-sequentially prefetching data for a processor of a computer system
US8700808B2 (en) * 2003-12-01 2014-04-15 Nvidia Corporation Hardware support system for accelerated disk I/O
US8356143B1 (en) 2004-10-22 2013-01-15 NVIDIA Corporatin Prefetch mechanism for bus master memory access
US7971002B1 (en) 2005-04-07 2011-06-28 Guillermo Rozas Maintaining instruction coherency in a translation-based computer system architecture
US8356128B2 (en) * 2008-09-16 2013-01-15 Nvidia Corporation Method and system of reducing latencies associated with resource allocation by using multiple arbiters
US8370552B2 (en) * 2008-10-14 2013-02-05 Nvidia Corporation Priority based bus arbiters avoiding deadlock and starvation on buses that support retrying of transactions
US8698823B2 (en) 2009-04-08 2014-04-15 Nvidia Corporation System and method for deadlock-free pipelining
US9569385B2 (en) 2013-09-09 2017-02-14 Nvidia Corporation Memory transaction ordering
US11586440B2 (en) * 2021-06-01 2023-02-21 International Business Machines Corporation Link stack based instruction prefetch augmentation

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US5537573A (en) * 1993-05-28 1996-07-16 Rambus, Inc. Cache system and method for prefetching of data
US5603004A (en) * 1994-02-14 1997-02-11 Hewlett-Packard Company Method for decreasing time penalty resulting from a cache miss in a multi-level cache system
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US5623608A (en) * 1994-11-14 1997-04-22 International Business Machines Corporation Method and apparatus for adaptive circular predictive buffer management
EP0752644A3 (de) * 1995-07-07 2001-08-22 Sun Microsystems, Inc. Speicherverwaltungseinheit zur Vorauswahlsteuerung

Also Published As

Publication number Publication date
EP0810517A3 (de) 1999-11-10
EP0810517B1 (de) 2003-02-26
JP3718319B2 (ja) 2005-11-24
EP0810517A2 (de) 1997-12-03
US5761468A (en) 1998-06-02
DE69719239D1 (de) 2003-04-03
JPH1091437A (ja) 1998-04-10

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