DE69719584D1 - Verfahren zum Programmieren einer Flash-Speicherzelle - Google Patents

Verfahren zum Programmieren einer Flash-Speicherzelle

Info

Publication number
DE69719584D1
DE69719584D1 DE69719584T DE69719584T DE69719584D1 DE 69719584 D1 DE69719584 D1 DE 69719584D1 DE 69719584 T DE69719584 T DE 69719584T DE 69719584 T DE69719584 T DE 69719584T DE 69719584 D1 DE69719584 D1 DE 69719584D1
Authority
DE
Germany
Prior art keywords
programming
memory cell
flash memory
flash
cell
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69719584T
Other languages
English (en)
Other versions
DE69719584T2 (de
Inventor
Byung Jin Ahn
Seob Kim Myong
Jea Chun Ahn
Jea Hyun Sone
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SK Hynix Inc
Original Assignee
Hyundai Electronics Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hyundai Electronics Industries Co Ltd filed Critical Hyundai Electronics Industries Co Ltd
Publication of DE69719584D1 publication Critical patent/DE69719584D1/de
Application granted granted Critical
Publication of DE69719584T2 publication Critical patent/DE69719584T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/32055Deposition of semiconductive layers, e.g. poly - or amorphous silicon layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/788Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881Programmable transistors with only two possible levels of programmation
    • H01L29/7884Programmable transistors with only two possible levels of programmation charging by hot carrier injection
DE69719584T 1996-04-01 1997-04-01 Verfahren zum Programmieren einer Flash-Speicherzelle Expired - Lifetime DE69719584T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1019960009730A KR100217900B1 (ko) 1996-04-01 1996-04-01 플래쉬 메모리 셀의 프로그램 방법
KR9609730 1996-04-01

Publications (2)

Publication Number Publication Date
DE69719584D1 true DE69719584D1 (de) 2003-04-17
DE69719584T2 DE69719584T2 (de) 2004-04-08

Family

ID=19454775

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69719584T Expired - Lifetime DE69719584T2 (de) 1996-04-01 1997-04-01 Verfahren zum Programmieren einer Flash-Speicherzelle

Country Status (8)

Country Link
US (1) US5867426A (de)
EP (1) EP0800179B1 (de)
JP (1) JP2963882B2 (de)
KR (1) KR100217900B1 (de)
CN (1) CN1084931C (de)
DE (1) DE69719584T2 (de)
GB (1) GB2311895B (de)
TW (1) TW334616B (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100207504B1 (ko) * 1996-03-26 1999-07-15 윤종용 불휘발성 메모리소자, 그 제조방법 및 구동방법
KR100276653B1 (ko) 1998-08-27 2001-01-15 윤종용 스프릿 게이트형 불휘발성 메모리 셀의 구동방법 및 이 셀들을구비한 반도체 메모리 장치의 구동방법
KR100293637B1 (ko) 1998-10-27 2001-07-12 박종섭 드레인 전압 펌핑 회로
US6638821B1 (en) * 2002-01-10 2003-10-28 Taiwan Semiconductor Manufacturing Company Flash EEPROM with function of single bit erasing by an application of negative control gate selection
US7057931B2 (en) * 2003-11-07 2006-06-06 Sandisk Corporation Flash memory programming using gate induced junction leakage current
TW200607080A (en) * 2004-08-02 2006-02-16 Powerchip Semiconductor Corp Flash memory cell and fabricating method thereof
US8369155B2 (en) 2007-08-08 2013-02-05 Hynix Semiconductor Inc. Operating method in a non-volatile memory device

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5280446A (en) * 1990-09-20 1994-01-18 Bright Microelectronics, Inc. Flash eprom memory circuit having source side programming
JP3004043B2 (ja) * 1990-10-23 2000-01-31 株式会社東芝 不揮発性半導体メモリ装置
BE1004424A3 (nl) * 1991-01-31 1992-11-17 Imec Inter Uni Micro Electr Transistorstruktuur voor uitwisbare en programmeerbare geheugens.
US5274588A (en) * 1991-07-25 1993-12-28 Texas Instruments Incorporated Split-gate cell for an EEPROM
US5317179A (en) * 1991-09-23 1994-05-31 Integrated Silicon Solution, Inc. Non-volatile semiconductor memory cell
JP2749449B2 (ja) * 1992-12-28 1998-05-13 ユー、シイ−チャン 不揮発性半導体メモリセル
US5324998A (en) * 1993-02-10 1994-06-28 Micron Semiconductor, Inc. Zero power reprogrammable flash cell for a programmable logic device
JP3105109B2 (ja) * 1993-05-19 2000-10-30 株式会社東芝 不揮発性半導体記憶装置
US5349220A (en) * 1993-08-10 1994-09-20 United Microelectronics Corporation Flash memory cell and its operation
US5471422A (en) * 1994-04-11 1995-11-28 Motorola, Inc. EEPROM cell with isolation transistor and methods for making and operating the same
US5511021A (en) * 1995-02-22 1996-04-23 National Semiconductor Corporation Method for programming a single EPROM or flash memory cell to store multiple levels of data that utilizes a forward-biased source-to-substrate junction
US5491657A (en) * 1995-02-24 1996-02-13 Advanced Micro Devices, Inc. Method for bulk (or byte) charging and discharging an array of flash EEPROM memory cells

Also Published As

Publication number Publication date
EP0800179A2 (de) 1997-10-08
KR970072447A (ko) 1997-11-07
TW334616B (en) 1998-06-21
GB9706573D0 (en) 1997-05-21
KR100217900B1 (ko) 1999-09-01
JP2963882B2 (ja) 1999-10-18
GB2311895A (en) 1997-10-08
EP0800179A3 (de) 1999-04-28
JPH1032272A (ja) 1998-02-03
DE69719584T2 (de) 2004-04-08
CN1168539A (zh) 1997-12-24
EP0800179B1 (de) 2003-03-12
US5867426A (en) 1999-02-02
CN1084931C (zh) 2002-05-15
GB2311895B (en) 2001-03-14

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: HOEFER & PARTNER, 81543 MUENCHEN