DE69722079D1 - Ein Mehrrechnersystem mit Anordnung zum Durchführen von Blockkopieroperationen - Google Patents

Ein Mehrrechnersystem mit Anordnung zum Durchführen von Blockkopieroperationen

Info

Publication number
DE69722079D1
DE69722079D1 DE69722079T DE69722079T DE69722079D1 DE 69722079 D1 DE69722079 D1 DE 69722079D1 DE 69722079 T DE69722079 T DE 69722079T DE 69722079 T DE69722079 T DE 69722079T DE 69722079 D1 DE69722079 D1 DE 69722079D1
Authority
DE
Germany
Prior art keywords
arrangement
computer system
block copy
copy operations
performing block
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69722079T
Other languages
English (en)
Other versions
DE69722079T2 (de
Inventor
Erik E Hagersten
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sun Microsystems Inc
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Publication of DE69722079D1 publication Critical patent/DE69722079D1/de
Application granted granted Critical
Publication of DE69722079T2 publication Critical patent/DE69722079T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • G06F15/17337—Direct connection machines, e.g. completely connected computers, point to point communication networks
DE69722079T 1996-07-01 1997-06-27 Ein Mehrrechnersystem mit Anordnung zum Durchführen von Blockkopieroperationen Expired - Fee Related DE69722079T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/674,269 US5892970A (en) 1996-07-01 1996-07-01 Multiprocessing system configured to perform efficient block copy operations
US674269 1996-07-01

Publications (2)

Publication Number Publication Date
DE69722079D1 true DE69722079D1 (de) 2003-06-26
DE69722079T2 DE69722079T2 (de) 2004-04-01

Family

ID=24705970

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69722079T Expired - Fee Related DE69722079T2 (de) 1996-07-01 1997-06-27 Ein Mehrrechnersystem mit Anordnung zum Durchführen von Blockkopieroperationen

Country Status (4)

Country Link
US (3) US5892970A (de)
EP (1) EP0817093B1 (de)
JP (1) JPH10171710A (de)
DE (1) DE69722079T2 (de)

Families Citing this family (87)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5892970A (en) * 1996-07-01 1999-04-06 Sun Microsystems, Inc. Multiprocessing system configured to perform efficient block copy operations
US6088769A (en) * 1996-10-01 2000-07-11 International Business Machines Corporation Multiprocessor cache coherence directed by combined local and global tables
US6021452A (en) * 1997-06-20 2000-02-01 Micron Electronics, Inc. Computer system capable of symmetrical processing
US6243770B1 (en) * 1998-07-21 2001-06-05 Micron Technology, Inc. Method for determining status of multiple interlocking FIFO buffer structures based on the position of at least one pointer of each of the multiple FIFO buffers
US7013305B2 (en) 2001-10-01 2006-03-14 International Business Machines Corporation Managing the state of coupling facility structures, detecting by one or more systems coupled to the coupling facility, the suspended state of the duplexed command, detecting being independent of message exchange
US6345352B1 (en) * 1998-09-30 2002-02-05 Apple Computer, Inc. Method and system for supporting multiprocessor TLB-purge instructions using directed write transactions
US6338122B1 (en) * 1998-12-15 2002-01-08 International Business Machines Corporation Non-uniform memory access (NUMA) data processing system that speculatively forwards a read request to a remote processing node
US6714994B1 (en) * 1998-12-23 2004-03-30 Advanced Micro Devices, Inc. Host bridge translating non-coherent packets from non-coherent link to coherent packets on conherent link and vice versa
US6938094B1 (en) 1999-09-17 2005-08-30 Advanced Micro Devices, Inc. Virtual channels and corresponding buffer allocations for deadlock-free computer system operation
US6360231B1 (en) * 1999-02-26 2002-03-19 Hewlett-Packard Company Transactional memory for distributed shared memory multi-processor computer systems
US6546414B1 (en) * 1999-08-23 2003-04-08 International Business Machines Corporation Method, system and program products for copying coupling facility lock structures
US6546466B1 (en) 1999-08-23 2003-04-08 International Business Machines Corporation Method, system and program products for copying coupling facility cache structures
US6542970B1 (en) 1999-08-23 2003-04-01 International Business Machines Corporation Method, system and program products for copying coupling facility list structures
US6609214B1 (en) * 1999-08-23 2003-08-19 International Business Machines Corporation Method, system and program products for copying coupling facility structures
US6950438B1 (en) 1999-09-17 2005-09-27 Advanced Micro Devices, Inc. System and method for implementing a separate virtual channel for posted requests in a multiprocessor computer system
US6888843B2 (en) * 1999-09-17 2005-05-03 Advanced Micro Devices, Inc. Response virtual channel for handling all responses
US6615375B1 (en) 2000-02-03 2003-09-02 International Business Machines Corporation Method and apparatus for tolerating unrecoverable errors in a multi-processor data processing system
US6973473B1 (en) 2000-05-31 2005-12-06 International Business Machines Corporation Method, system and program products for managing identifiers of components of a clustered environment
US6636949B2 (en) * 2000-06-10 2003-10-21 Hewlett-Packard Development Company, L.P. System for handling coherence protocol races in a scalable shared memory system based on chip multiprocessing
US6826619B1 (en) 2000-08-21 2004-11-30 Intel Corporation Method and apparatus for preventing starvation in a multi-node architecture
US6487643B1 (en) 2000-09-29 2002-11-26 Intel Corporation Method and apparatus for preventing starvation in a multi-node architecture
US6772298B2 (en) 2000-12-20 2004-08-03 Intel Corporation Method and apparatus for invalidating a cache line without data return in a multi-node architecture
US7234029B2 (en) * 2000-12-28 2007-06-19 Intel Corporation Method and apparatus for reducing memory latency in a cache coherent multi-node architecture
US6791412B2 (en) * 2000-12-28 2004-09-14 Intel Corporation Differential amplifier output stage
US6721918B2 (en) 2000-12-29 2004-04-13 Intel Corporation Method and apparatus for encoding a bus to minimize simultaneous switching outputs effect
US20020087766A1 (en) * 2000-12-29 2002-07-04 Akhilesh Kumar Method and apparatus to implement a locked-bus transaction
US20020087775A1 (en) * 2000-12-29 2002-07-04 Looi Lily P. Apparatus and method for interrupt delivery
FR2820850B1 (fr) * 2001-02-15 2003-05-09 Bull Sa Controleur de coherence pour ensemble multiprocesseur, module et ensemble multiprocesseur a architecture multimodule integrant un tel controleur
US6760809B2 (en) 2001-06-21 2004-07-06 International Business Machines Corporation Non-uniform memory access (NUMA) data processing system having remote memory cache incorporated within system memory
US6754782B2 (en) 2001-06-21 2004-06-22 International Business Machines Corporation Decentralized global coherency management in a multi-node computer system
US6658538B2 (en) * 2001-06-21 2003-12-02 International Business Machines Corporation Non-uniform memory access (NUMA) data processing system having a page table including node-specific data storage and coherency control
US6760817B2 (en) 2001-06-21 2004-07-06 International Business Machines Corporation Method and system for prefetching utilizing memory initiated prefetch write operations
US6615322B2 (en) 2001-06-21 2003-09-02 International Business Machines Corporation Two-stage request protocol for accessing remote memory data in a NUMA data processing system
US6654857B2 (en) 2001-06-21 2003-11-25 International Business Machines Corporation Non-uniform memory access (NUMA) computer system having distributed global coherency management
US6711652B2 (en) 2001-06-21 2004-03-23 International Business Machines Corporation Non-uniform memory access (NUMA) data processing system that provides precise notification of remote deallocation of modified data
US6901485B2 (en) 2001-06-21 2005-05-31 International Business Machines Corporation Memory directory management in a multi-node computer system
US6971098B2 (en) 2001-06-27 2005-11-29 Intel Corporation Method and apparatus for managing transaction requests in a multi-node architecture
US6813726B2 (en) 2001-10-01 2004-11-02 International Business Machines Corporation Restarting a coupling facility command using a token from another coupling facility command
US6944787B2 (en) * 2001-10-01 2005-09-13 International Business Machines Corporation System-managed duplexing of coupling facility structures
US6954817B2 (en) * 2001-10-01 2005-10-11 International Business Machines Corporation Providing at least one peer connection between a plurality of coupling facilities to couple the plurality of coupling facilities
US6910158B2 (en) * 2001-10-01 2005-06-21 International Business Machines Corporation Test tool and methods for facilitating testing of duplexed computer functions
US7099935B2 (en) * 2001-10-01 2006-08-29 International Business Machines Corporation Dynamically determining whether to process requests synchronously or asynchronously
US6859866B2 (en) 2001-10-01 2005-02-22 International Business Machines Corporation Synchronizing processing of commands invoked against duplexed coupling facility structures
US7089371B2 (en) * 2002-02-12 2006-08-08 Ip-First, Llc Microprocessor apparatus and method for prefetch, allocation, and initialization of a block of cache lines from memory
US7080210B2 (en) * 2002-02-12 2006-07-18 Ip-First, Llc Microprocessor apparatus and method for exclusive prefetch of a cache line from memory
US7080211B2 (en) * 2002-02-12 2006-07-18 Ip-First, Llc Microprocessor apparatus and method for prefetch, allocation, and initialization of a cache line from memory
US7089368B2 (en) * 2002-02-12 2006-08-08 Ip-First, Llc Microprocessor apparatus and method for exclusively prefetching a block of cache lines from memory
US6598120B1 (en) * 2002-03-08 2003-07-22 International Business Machines Corporation Assignment of building block collector agent to receive acknowledgments from other building block agents
US7111125B2 (en) * 2002-04-02 2006-09-19 Ip-First, Llc Apparatus and method for renaming a data block within a cache
US7054985B2 (en) * 2002-07-23 2006-05-30 Hewlett-Packard Development Company, L.P. Multiple hardware partitions under one input/output hub
US6918023B2 (en) * 2002-09-30 2005-07-12 International Business Machines Corporation Method, system, and computer program product for invalidating pretranslations for dynamic memory removal
US8185602B2 (en) 2002-11-05 2012-05-22 Newisys, Inc. Transaction processing using multiple protocol engines in systems having multiple multi-processor clusters
US7188215B2 (en) * 2003-06-19 2007-03-06 Ip-First, Llc Apparatus and method for renaming a cache line
US7360056B2 (en) 2003-04-04 2008-04-15 Sun Microsystems, Inc. Multi-node system in which global address generated by processing subsystem includes global to local translation information
US20050044174A1 (en) * 2003-04-11 2005-02-24 Sun Microsystems, Inc. Multi-node computer system where active devices selectively initiate certain transactions using remote-type address packets
US7047372B2 (en) * 2003-04-15 2006-05-16 Newisys, Inc. Managing I/O accesses in multiprocessor systems
US7496690B2 (en) * 2003-10-09 2009-02-24 Intel Corporation Method, system, and program for managing memory for data transmission through a network
US7350032B2 (en) 2004-03-22 2008-03-25 Sun Microsystems, Inc. Cache coherency protocol including generic transient states
US7434008B2 (en) * 2004-04-23 2008-10-07 Hewlett-Packard Development Company, L.P. System and method for coherency filtering
US7146484B2 (en) * 2004-06-15 2006-12-05 Hitachi, Ltd. Method and apparatus for caching storage system
US8254411B2 (en) * 2005-02-10 2012-08-28 International Business Machines Corporation Data processing system, method and interconnect fabric having a flow governor
US7404045B2 (en) * 2005-12-30 2008-07-22 International Business Machines Corporation Directory-based data transfer protocol for multiprocessor system
US7502889B2 (en) * 2005-12-30 2009-03-10 Intel Corporation Home node aware replacement policy for caches in a multiprocessor system
US9185160B2 (en) * 2007-02-12 2015-11-10 Oracle America, Inc. Resource reservation protocol over unreliable packet transport
US7941499B2 (en) * 2007-03-06 2011-05-10 Freescale Semiconductor, Inc. Interprocessor message transmission via coherency-based interconnect
US7769853B2 (en) * 2007-06-12 2010-08-03 International Business Machines Corporation Method for automatic discovery of a transaction gateway daemon of specified type
US8365169B1 (en) 2008-01-10 2013-01-29 Hewlett-Packard Development Company, L.P. Migrating a virtual machine across processing cells connected to an interconnect that provides data communication without cache coherency support
US8275963B2 (en) * 2008-02-01 2012-09-25 International Business Machines Corporation Asynchronous memory move across physical nodes with dual-sided communication
US8095758B2 (en) * 2008-02-01 2012-01-10 International Business Machines Corporation Fully asynchronous memory mover
US8245004B2 (en) * 2008-02-01 2012-08-14 International Business Machines Corporation Mechanisms for communicating with an asynchronous memory mover to perform AMM operations
US8015380B2 (en) * 2008-02-01 2011-09-06 International Business Machines Corporation Launching multiple concurrent memory moves via a fully asynchronoous memory mover
US8356151B2 (en) * 2008-02-01 2013-01-15 International Business Machines Corporation Reporting of partially performed memory move
US8327101B2 (en) * 2008-02-01 2012-12-04 International Business Machines Corporation Cache management during asynchronous memory move operations
US8429353B2 (en) * 2008-05-20 2013-04-23 Oracle America, Inc. Distributed home-node hub
US8667504B2 (en) * 2008-06-20 2014-03-04 Netapp, Inc. System and method for achieving high performance data flow among user space processes in storage system
US8234432B2 (en) * 2009-01-26 2012-07-31 Advanced Micro Devices, Inc. Memory structure to store interrupt state for inactive guests
US8312219B2 (en) 2009-03-02 2012-11-13 International Business Machines Corporation Hybrid caching techniques and garbage collection using hybrid caching techniques
US8412911B2 (en) * 2009-06-29 2013-04-02 Oracle America, Inc. System and method to invalidate obsolete address translations
US20110197004A1 (en) 2010-02-05 2011-08-11 Serebrin Benjamin C Processor Configured to Virtualize Guest Local Interrupt Controller
US20130179642A1 (en) * 2012-01-10 2013-07-11 Qualcomm Incorporated Non-Allocating Memory Access with Physical Address
US9009368B2 (en) 2012-10-23 2015-04-14 Advanced Micro Devices, Inc. Interrupt latency performance counters
CN104981854A (zh) 2013-02-11 2015-10-14 格瑞克明尼苏达有限公司 针对流体涂覆机系统的远程监控
US10969805B2 (en) 2013-02-11 2021-04-06 Graco Minnesota Inc. Paint sprayer distributed control and output volume monitoring architectures
JP5936152B2 (ja) * 2014-05-17 2016-06-15 インターナショナル・ビジネス・マシーンズ・コーポレーションＩｎｔｅｒｎａｔｉｏｎａｌ Ｂｕｓｉｎｅｓｓ Ｍａｃｈｉｎｅｓ Ｃｏｒｐｏｒａｔｉｏｎ メモリアクセストレース方法
US11481296B2 (en) * 2018-09-10 2022-10-25 International Business Machines Corporation Detecting configuration errors in multiport I/O cards with simultaneous multi-processing
US10698854B1 (en) 2019-02-27 2020-06-30 International Business Machines Corporation Secure and efficient application data processing
US11449367B2 (en) 2019-02-27 2022-09-20 International Business Machines Corporation Functional completion when retrying a non-interruptible instruction in a bi-modal execution environment

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4493020A (en) * 1980-05-06 1985-01-08 Burroughs Corporation Microprogrammed digital data processor employing microinstruction tasking and dynamic register allocation
US4543627A (en) * 1981-12-14 1985-09-24 At&T Bell Laboratories Internal communication arrangement for a multiprocessor system
US4622631B1 (en) * 1983-12-30 1996-04-09 Recognition Int Inc Data processing system having a data coherence solution
US4704717A (en) * 1986-07-22 1987-11-03 Prime Computer, Inc. Receive message processor for a solicited message packet transfer system
US5025365A (en) * 1988-11-14 1991-06-18 Unisys Corporation Hardware implemented cache coherency protocol with duplicated distributed directories for high-performance multiprocessors
IT1227360B (it) * 1988-11-18 1991-04-08 Honeywell Bull Spa Sistema multiprocessore di elaborazione dati con replicazione di dati globali.
US5117350A (en) * 1988-12-15 1992-05-26 Flashpoint Computer Corporation Memory address mechanism in a distributed memory architecture
US5276828A (en) * 1989-03-01 1994-01-04 Digital Equipment Corporation Methods of maintaining cache coherence and processor synchronization in a multiprocessor system using send and receive instructions
US5297269A (en) * 1990-04-26 1994-03-22 Digital Equipment Company Cache coherency protocol for multi processor computer system
EP0472829A3 (en) * 1990-08-31 1993-01-07 International Business Machines Corporation Multicomputer complex and distributed shared data memory
CA2051029C (en) * 1990-11-30 1996-11-05 Pradeep S. Sindhu Arbitration of packet switched busses, including busses for shared memory multiprocessors
US5303362A (en) * 1991-03-20 1994-04-12 Digital Equipment Corporation Coupled memory multiprocessor computer system including cache coherency management protocols
US5926644A (en) * 1991-10-24 1999-07-20 Intel Corporation Instruction formats/instruction encoding
CA2086691C (en) * 1992-03-30 1997-04-08 David A. Elko Communicating messages between processors and a coupling facility
US5428803A (en) * 1992-07-10 1995-06-27 Cray Research, Inc. Method and apparatus for a unified parallel processing architecture
US5511224A (en) * 1993-02-18 1996-04-23 Unisys Corporation Configurable network using dual system busses with common protocol compatible for store-through and non-store-through cache memories
JP2809961B2 (ja) * 1993-03-02 1998-10-15 株式会社東芝 マルチプロセッサ
US5761739A (en) * 1993-06-08 1998-06-02 International Business Machines Corporation Methods and systems for creating a storage dump within a coupling facility of a multisystem enviroment
JP3042341B2 (ja) * 1994-11-30 2000-05-15 日本電気株式会社 クラスタ結合型マルチプロセッサシステムにおけるローカル入出力制御方法
US5692149A (en) * 1995-03-16 1997-11-25 Samsung Electronics Co., Ltd. Block replacement method in cache only memory architecture multiprocessor
US5710907A (en) * 1995-12-22 1998-01-20 Sun Microsystems, Inc. Hybrid NUMA COMA caching system and methods for selecting between the caching modes
US5680571A (en) * 1995-12-28 1997-10-21 Unisys Corporation Multi-processor data processing system with multiple, separate instruction and operand second level caches
US5892970A (en) * 1996-07-01 1999-04-06 Sun Microsystems, Inc. Multiprocessing system configured to perform efficient block copy operations

Also Published As

Publication number Publication date
EP0817093B1 (de) 2003-05-21
US6332169B1 (en) 2001-12-18
US6760786B2 (en) 2004-07-06
JPH10171710A (ja) 1998-06-26
US20010051977A1 (en) 2001-12-13
EP0817093A1 (de) 1998-01-07
DE69722079T2 (de) 2004-04-01
US5892970A (en) 1999-04-06
US20010037419A1 (en) 2001-11-01

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8339 Ceased/non-payment of the annual fee