DE69732938D1 - Hybrides Speicherzugangsprotokoll in einem Datenverarbeitungssystem mit verteiltem, gemeinsamem Speicher - Google Patents

Hybrides Speicherzugangsprotokoll in einem Datenverarbeitungssystem mit verteiltem, gemeinsamem Speicher

Info

Publication number
DE69732938D1
DE69732938D1 DE69732938T DE69732938T DE69732938D1 DE 69732938 D1 DE69732938 D1 DE 69732938D1 DE 69732938 T DE69732938 T DE 69732938T DE 69732938 T DE69732938 T DE 69732938T DE 69732938 D1 DE69732938 D1 DE 69732938D1
Authority
DE
Germany
Prior art keywords
data processing
processing system
access protocol
distributed shared
memory access
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69732938T
Other languages
English (en)
Other versions
DE69732938T2 (de
Inventor
Erik E Hagersten
Mark Donald Hill
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sun Microsystems Inc
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Application granted granted Critical
Publication of DE69732938D1 publication Critical patent/DE69732938D1/de
Publication of DE69732938T2 publication Critical patent/DE69732938T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0813—Multiuser, multiprocessor or multiprocessing cache systems with a network or matrix configuration
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815—Cache consistency protocols
    • G06F12/0817—Cache consistency protocols using directory methods
    • G06F12/082—Associative directories
DE69732938T 1996-07-01 1997-06-25 Hybrides Speicherzugangsprotokoll in einem Datenverarbeitungssystem mit verteiltem, gemeinsamem Speicher Expired - Lifetime DE69732938T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US673957 1996-07-01
US08/673,957 US5864671A (en) 1996-07-01 1996-07-01 Hybrid memory access protocol for servicing memory access request by ascertaining whether the memory block is currently cached in determining which protocols to be used

Publications (2)

Publication Number Publication Date
DE69732938D1 true DE69732938D1 (de) 2005-05-12
DE69732938T2 DE69732938T2 (de) 2006-02-02

Family

ID=24704771

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69732938T Expired - Lifetime DE69732938T2 (de) 1996-07-01 1997-06-25 Hybrides Speicherzugangsprotokoll in einem Datenverarbeitungssystem mit verteiltem, gemeinsamem Speicher

Country Status (4)

Country Link
US (3) US5864671A (de)
EP (1) EP0818732B1 (de)
JP (1) JPH10177518A (de)
DE (1) DE69732938T2 (de)

Families Citing this family (42)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09204403A (ja) * 1996-01-26 1997-08-05 Hitachi Ltd 並列計算機
US6092155A (en) * 1997-07-10 2000-07-18 International Business Machines Corporation Cache coherent network adapter for scalable shared memory processing systems
US6826651B2 (en) * 1998-05-29 2004-11-30 International Business Machines Corporation State-based allocation and replacement for improved hit ratio in directory caches
US6374331B1 (en) * 1998-12-30 2002-04-16 Hewlett-Packard Company Distributed directory cache coherence multi-processor computer architecture
US6311253B1 (en) * 1999-06-21 2001-10-30 International Business Machines Corporation Methods for caching cache tags
US6651157B1 (en) * 1999-10-15 2003-11-18 Silicon Graphics, Inc. Multi-processor system and method of accessing data therein
AU2001268565A1 (en) * 2000-06-21 2002-01-02 Idt Corporation Method and apparatus for distributing video programs using partial caching
US6699125B2 (en) * 2000-07-03 2004-03-02 Yahoo! Inc. Game server for use in connection with a messenger server
US7146429B2 (en) * 2001-03-16 2006-12-05 The Aerospace Corporation Cooperative adaptive web caching routing and forwarding web content data requesting method
US7555561B2 (en) * 2001-03-19 2009-06-30 The Aerospace Corporation Cooperative adaptive web caching routing and forwarding web content data broadcasting method
US7222220B2 (en) * 2001-05-01 2007-05-22 Sun Microsystems, Inc. Multiprocessing system employing address switches to control mixed broadcast snooping and directory based coherency protocols transparent to active devices
ATE453152T1 (de) * 2001-05-01 2010-01-15 Sun Microsystems Inc Multiprozessorsystem mit gemeinsamem speicher, welches gemischte broadcast-snoop und verzeichnisbasierte kohärenzprotokolle benutzt
US20040128343A1 (en) * 2001-06-19 2004-07-01 Mayer Daniel J Method and apparatus for distributing video programs using partial caching
US6973543B1 (en) 2001-07-12 2005-12-06 Advanced Micro Devices, Inc. Partial directory cache for reducing probe traffic in multiprocessor systems
US6721852B2 (en) 2001-10-17 2004-04-13 Sun Microsystems, Inc. Computer system employing multiple board sets and coherence schemes
US6961827B2 (en) * 2001-11-13 2005-11-01 Sun Microsystems, Inc. Victim invalidation
US6820174B2 (en) * 2002-01-18 2004-11-16 International Business Machines Corporation Multi-processor computer system using partition group directories to maintain cache coherence
US6868485B1 (en) 2002-09-27 2005-03-15 Advanced Micro Devices, Inc. Computer system with integrated directory and processor cache
US7096323B1 (en) 2002-09-27 2006-08-22 Advanced Micro Devices, Inc. Computer system with processor cache that stores remote cache presence information
US8185602B2 (en) 2002-11-05 2012-05-22 Newisys, Inc. Transaction processing using multiple protocol engines in systems having multiple multi-processor clusters
US7225298B2 (en) * 2003-04-11 2007-05-29 Sun Microsystems, Inc. Multi-node computer system in which networks in different nodes implement different conveyance modes
GB2416416B (en) * 2003-04-11 2006-11-22 Sun Microsystems Inc Multi-node computer system implementing global access state dependent transactions
US7801570B2 (en) 2003-04-15 2010-09-21 Ipventure, Inc. Directional speaker for portable electronic device
US7395375B2 (en) * 2004-11-08 2008-07-01 International Business Machines Corporation Prefetch miss indicator for cache coherence directory misses on external caches
US7716411B2 (en) * 2006-06-07 2010-05-11 Microsoft Corporation Hybrid memory device with single interface
US7991963B2 (en) * 2007-12-31 2011-08-02 Intel Corporation In-memory, in-page directory cache coherency scheme
US8479203B2 (en) * 2009-07-24 2013-07-02 International Business Machines Corporation Reducing processing overhead and storage cost by batching task records and converting to audit records
US9164679B2 (en) 2011-04-06 2015-10-20 Patents1, Llc System, method and computer program product for multi-thread operation involving first memory of a first memory class and second memory of a second memory class
US9170744B1 (en) 2011-04-06 2015-10-27 P4tents1, LLC Computer program product for controlling a flash/DRAM/embedded DRAM-equipped system
US9176671B1 (en) 2011-04-06 2015-11-03 P4tents1, LLC Fetching data between thread execution in a flash/DRAM/embedded DRAM-equipped system
US8930647B1 (en) 2011-04-06 2015-01-06 P4tents1, LLC Multiple class memory systems
US9158546B1 (en) 2011-04-06 2015-10-13 P4tents1, LLC Computer program product for fetching from a first physical memory between an execution of a plurality of threads associated with a second physical memory
US9417754B2 (en) 2011-08-05 2016-08-16 P4tents1, LLC User interface system, method, and computer program product
US9477600B2 (en) 2011-08-08 2016-10-25 Arm Limited Apparatus and method for shared cache control including cache lines selectively operable in inclusive or non-inclusive mode
CN102521163B (zh) * 2011-12-08 2014-12-10 华为技术有限公司 目录替换方法及设备
US8812744B1 (en) 2013-03-14 2014-08-19 Microsoft Corporation Assigning priorities to data for hybrid drives
US9626126B2 (en) 2013-04-24 2017-04-18 Microsoft Technology Licensing, Llc Power saving mode hybrid drive access management
US9946495B2 (en) 2013-04-25 2018-04-17 Microsoft Technology Licensing, Llc Dirty data management for hybrid drives
US10613996B2 (en) * 2018-05-03 2020-04-07 Arm Limited Separating completion and data responses for higher read throughput and lower link utilization in a data processing network
US10917198B2 (en) * 2018-05-03 2021-02-09 Arm Limited Transfer protocol in a data processing network
GR20180100189A (el) 2018-05-03 2020-01-22 Arm Limited Δικτυο επεξεργασιας δεδομενων με συμπυκνωση ροης για μεταφορα δεδομενων μεσω streaming
US11163688B2 (en) 2019-09-24 2021-11-02 Advanced Micro Devices, Inc. System probe aware last level cache insertion bypassing

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5151989A (en) * 1987-02-13 1992-09-29 International Business Machines Corporation Directory cache management in a distributed data processing system
US5251308A (en) * 1987-12-22 1993-10-05 Kendall Square Research Corporation Shared memory multiprocessor with data hiding and post-store
US5119481A (en) * 1987-12-22 1992-06-02 Kendall Square Research Corporation Register bus multiprocessor system with shift
US5055999A (en) * 1987-12-22 1991-10-08 Kendall Square Research Corporation Multiprocessor digital data processing system
US5072369A (en) * 1989-04-07 1991-12-10 Tektronix, Inc. Interface between buses attached with cached modules providing address space mapped cache coherent memory access with SNOOP hit memory updates
JPH05210640A (ja) * 1992-01-31 1993-08-20 Hitachi Ltd マルチプロセッサシステム
US5394555A (en) * 1992-12-23 1995-02-28 Bull Hn Information Systems Inc. Multi-node cluster computer system incorporating an external coherency unit at each node to insure integrity of information stored in a shared, distributed memory
JP2809961B2 (ja) * 1993-03-02 1998-10-15 株式会社東芝 マルチプロセッサ
US5511208A (en) * 1993-03-23 1996-04-23 International Business Machines Corporation Locating resources in computer networks having cache server nodes
US5535116A (en) * 1993-05-18 1996-07-09 Stanford University Flat cache-only multi-processor architectures
US5491817A (en) * 1993-05-25 1996-02-13 Bell Communications Research Inc. Linking system and method for accessing directory information about an object in one context when information in another context is known
CA2097540C (en) * 1993-06-01 1998-05-12 William G. O'farrell Accessing remote data objects in a distributed memory environment
US5584007A (en) * 1994-02-09 1996-12-10 Ballard Synergy Corporation Apparatus and method for discriminating among data to be stored in cache
JP3340846B2 (ja) * 1994-07-05 2002-11-05 富士通株式会社 Ａｔｍ−ｌａｎ及びサーバ及びａｔｍアドレス管理方法
US5680576A (en) * 1995-05-05 1997-10-21 Silicon Graphics, Inc. Directory-based coherence protocol allowing efficient dropping of clean-exclusive data
JPH10154100A (ja) * 1996-11-25 1998-06-09 Canon Inc 情報処理システム及び装置及びその制御方法

Also Published As

Publication number Publication date
DE69732938T2 (de) 2006-02-02
EP0818732A2 (de) 1998-01-14
US6243742B1 (en) 2001-06-05
US6496854B1 (en) 2002-12-17
US5864671A (en) 1999-01-26
EP0818732B1 (de) 2005-04-06
EP0818732A3 (de) 1999-03-10
JPH10177518A (ja) 1998-06-30

Similar Documents

Publication Publication Date Title
DE69732938D1 (de) Hybrides Speicherzugangsprotokoll in einem Datenverarbeitungssystem mit verteiltem, gemeinsamem Speicher
DE69509804D1 (de) Datenpaketuebertragung in codemultiplexmehrfachzugriffssystemen
GB2311882B (en) A data processing management system
DE69525531D1 (de) Dataverarbeitungssystem mit ringförmiger Warteschlange in einem Seitenspeicher
DE69835330D1 (de) Überlastungsverwaltung in einem Mehrtorigen-Vermittlungssystem mit gemeinsamen Speicher
GB9604003D0 (en) Data processing system with priority management
IL131924A0 (en) Reservation management in a non-uniform memory access (numa) data processing system
DE69732020D1 (de) Wiedereinordnung von Speicheranforderungen in einem Datenverarbeitungssystem
DE69203525T3 (de) Datenübertragungssystem in einem Fahrzeug.
FR2748834B1 (fr) Systeme de communication permettant une gestion securisee et independante d'une pluralite d'applications par chaque carte utilisateur, carte utilisateur et procede de gestion correspondants
DE69433293D1 (de) Netzwerkübertragungsverfahren für Systeme mit virtuellem Speicher
DE60003387D1 (de) Direktspeicherzugriffssteuerung in einem rechnersystem
DE19983687T1 (de) Verarbeitung geordneter Datenanforderungen an einen Speicher
DE69316955T2 (de) Rechenanlage mit synchronem, dynamischem Speicher
GB2347244B (en) Data transfer in a data processing system
EP0657851A3 (de) Dateiverwaltungssystem für eine Speicherkarte.
DE3483489D1 (de) Speicherzugriffseinrichtung in einem datenverarbeitungssystem.
DE69120362T2 (de) Speicherverwaltung in einem Datenverarbeitungsnetzwerk
DE69203039T2 (de) Datenübertragungssystem in einem Fahrzeug.
DE68926091T2 (de) Speicherverwaltung in Systemen mit Datenpaketbetrieb
DE69724907D1 (de) Entschlusselung von wiederholten daten in einem verschlusselten kommunikationssystem
DE69129842T2 (de) Nachrichtensteuersystem in einem datenübertragungssystem
GB9814528D0 (en) Memory address translation in a data processing system
GB2345770B (en) Data processing memory system
DE69615597T2 (de) Zugriffsvorrichtung für gemeinsamen Speicher

Legal Events

Date Code Title Description
8364 No opposition during term of opposition