DE69823263D1 - Kleinleistungsspeicher mit selektiver Voraufladungsschaltung - Google Patents

Kleinleistungsspeicher mit selektiver Voraufladungsschaltung

Info

Publication number
DE69823263D1
DE69823263D1 DE69823263T DE69823263T DE69823263D1 DE 69823263 D1 DE69823263 D1 DE 69823263D1 DE 69823263 T DE69823263 T DE 69823263T DE 69823263 T DE69823263 T DE 69823263T DE 69823263 D1 DE69823263 D1 DE 69823263D1
Authority
DE
Germany
Prior art keywords
small capacity
precharge circuit
capacity storage
selective precharge
selective
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69823263T
Other languages
English (en)
Other versions
DE69823263T2 (de
Inventor
Robert Rogers
Kuang Kai Chi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Publication of DE69823263D1 publication Critical patent/DE69823263D1/de
Application granted granted Critical
Publication of DE69823263T2 publication Critical patent/DE69823263T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1072—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for memories with random access ports synchronised on clock signal pulse trains, e.g. synchronous memories, self timed memories
DE69823263T 1997-03-31 1998-02-10 Kleinleistungsspeicher mit selektiver Voraufladungsschaltung Expired - Lifetime DE69823263T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US828571 1997-03-31
US08/828,571 US5828610A (en) 1997-03-31 1997-03-31 Low power memory including selective precharge circuit

Publications (2)

Publication Number Publication Date
DE69823263D1 true DE69823263D1 (de) 2004-05-27
DE69823263T2 DE69823263T2 (de) 2005-04-28

Family

ID=25252189

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69823263T Expired - Lifetime DE69823263T2 (de) 1997-03-31 1998-02-10 Kleinleistungsspeicher mit selektiver Voraufladungsschaltung

Country Status (6)

Country Link
US (1) US5828610A (de)
EP (1) EP0869507B1 (de)
JP (1) JP3834996B2 (de)
KR (1) KR19980080431A (de)
CN (1) CN1126104C (de)
DE (1) DE69823263T2 (de)

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US6822904B2 (en) * 2001-01-03 2004-11-23 Micron Technology, Inc. Fast sensing scheme for floating-gate memory cells
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US6466497B1 (en) * 2001-04-17 2002-10-15 Sun Microsystems, Inc. Secondary precharge mechanism for high speed multi-ported register files
US6629194B2 (en) * 2001-05-31 2003-09-30 Intel Corporation Method and apparatus for low power memory bit line precharge
US6510092B1 (en) * 2001-08-30 2003-01-21 Intel Corporation Robust shadow bitline circuit technique for high-performance register files
US6542423B1 (en) * 2001-09-18 2003-04-01 Fujitsu Limited Read port design and method for register array
JP4019021B2 (ja) * 2003-07-14 2007-12-05 日本テキサス・インスツルメンツ株式会社 半導体メモリセル
US7295481B2 (en) * 2003-10-16 2007-11-13 International Business Machines Corporation Power saving by disabling cyclic bitline precharge
KR100555534B1 (ko) * 2003-12-03 2006-03-03 삼성전자주식회사 인액티브 위크 프리차아징 및 이퀄라이징 스킴을 채용한프리차아지 회로, 이를 포함하는 메모리 장치 및 그프리차아지 방법
KR100653686B1 (ko) * 2003-12-31 2006-12-04 삼성전자주식회사 동적 반도체 메모리 장치 및 이 장치의 절전 모드 동작방법
US20070189101A1 (en) * 2005-05-17 2007-08-16 Atmel Corporation Fast read port for register file
US7224635B2 (en) * 2005-03-04 2007-05-29 Atmel Corporation Fast read port for register file
TWI295805B (en) * 2005-04-26 2008-04-11 Via Tech Inc Memory circuit and related method for integrating pre-decode and selective pre-charge
US7483332B2 (en) * 2005-08-11 2009-01-27 Texas Instruments Incorporated SRAM cell using separate read and write circuitry
KR100772708B1 (ko) * 2005-09-28 2007-11-02 주식회사 하이닉스반도체 반도체 메모리 장치
JP4941644B2 (ja) 2005-09-28 2012-05-30 ハイニックス セミコンダクター インク 半導体メモリ装置
US7366047B2 (en) * 2005-11-09 2008-04-29 Infineon Technologies Ag Method and apparatus for reducing standby current in a dynamic random access memory during self refresh
US7724593B2 (en) 2006-07-07 2010-05-25 Rao G R Mohan Memories with front end precharge
US7755961B2 (en) * 2006-07-07 2010-07-13 Rao G R Mohan Memories with selective precharge
CN101542629B (zh) * 2006-07-07 2014-02-26 S.阿夸半导体有限公司 存储器设备和计算系统
US7477551B2 (en) * 2006-11-08 2009-01-13 Texas Instruments Incorporated Systems and methods for reading data from a memory array
KR101274204B1 (ko) * 2007-08-08 2013-06-17 삼성전자주식회사 로컬 입출력 라인의 프리차지 방법 및 그 방법을 이용하는반도체 메모리 장치
US7995409B2 (en) * 2007-10-16 2011-08-09 S. Aqua Semiconductor, Llc Memory with independent access and precharge
US8095853B2 (en) 2007-10-19 2012-01-10 S. Aqua Semiconductor Llc Digital memory with fine grain write operation
US7804728B2 (en) * 2008-08-04 2010-09-28 International Business Machines Corporation Information handling system with SRAM precharge power conservation
US8050114B2 (en) * 2008-10-14 2011-11-01 Arm Limited Memory device having a single pass-gate transistor per bitline column multiplexer coupled to latch circuitry and method thereof
US8320163B2 (en) * 2009-06-10 2012-11-27 Taiwan Semiconductor Manufacturing Company, Ltd. Eight-transistor SRAM memory with shared bit-lines
US8406078B2 (en) * 2010-05-12 2013-03-26 Taiwan Semiconductor Manufacturing Company, Ltd. Memory circuits having a plurality of keepers
US8395960B2 (en) * 2010-05-12 2013-03-12 Taiwan Semiconductor Manufacturing Company, Ltd. Memory circuits having a plurality of keepers
CN102637458B (zh) * 2011-02-11 2015-07-08 台湾积体电路制造股份有限公司 带有多个保持器的存储电路
GB2525904B (en) 2014-05-08 2018-05-09 Surecore Ltd Memory unit
CN105355232B (zh) * 2014-08-19 2018-10-23 中芯国际集成电路制造(上海)有限公司 静态随机存储器
KR101543701B1 (ko) 2014-12-22 2015-08-12 연세대학교 산학협력단 감지 증폭기 및 그를 이용한 반도체 메모리 장치
US10431269B2 (en) * 2015-02-04 2019-10-01 Altera Corporation Methods and apparatus for reducing power consumption in memory circuitry by controlling precharge duration
KR102408572B1 (ko) * 2015-08-18 2022-06-13 삼성전자주식회사 반도체 메모리 장치
CN106653088A (zh) * 2016-10-10 2017-05-10 中国科学院微电子研究所 一种基于动态电阻单元的伪差分式半导体只读存储阵列
US10867668B2 (en) * 2017-10-06 2020-12-15 Qualcomm Incorporated Area efficient write data path circuit for SRAM yield enhancement
CN112102863B (zh) * 2020-09-07 2023-04-25 海光信息技术股份有限公司 静态随机存取存储器控制电路、方法、存储器和处理器
US11640841B2 (en) * 2021-06-30 2023-05-02 Microsoft Technology Licensing, Llc Memory systems including memory arrays employing column read circuits to control floating of column read bit lines, and related methods

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JP2581766B2 (ja) * 1988-06-30 1997-02-12 富士通株式会社 半導体記憶装置
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JP2876830B2 (ja) * 1991-06-27 1999-03-31 日本電気株式会社 半導体記憶装置
KR970011971B1 (ko) * 1992-03-30 1997-08-08 삼성전자 주식회사 반도체 메모리 장치의 비트라인 프리차아지회로
JP2658768B2 (ja) * 1992-10-19 1997-09-30 日本電気株式会社 ダイナミックｒａｍ
US5329174A (en) * 1992-10-23 1994-07-12 Xilinx, Inc. Circuit for forcing known voltage on unconnected pads of an integrated circuit
US5293342A (en) * 1992-12-17 1994-03-08 Casper Stephen L Wordline driver circuit having an automatic precharge circuit
JP2663838B2 (ja) * 1993-07-27 1997-10-15 日本電気株式会社 半導体集積回路装置
JP3573782B2 (ja) * 1993-08-31 2004-10-06 川崎マイクロエレクトロニクス株式会社 連想メモリ
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JP2723015B2 (ja) * 1993-12-01 1998-03-09 日本電気株式会社 半導体記憶装置
US5438548A (en) * 1993-12-10 1995-08-01 Texas Instruments Incorporated Synchronous memory with reduced power access mode
US5400283A (en) * 1993-12-13 1995-03-21 Micron Semiconductor, Inc. RAM row decode circuitry that utilizes a precharge circuit that is deactivated by a feedback from an activated word line driver
JPH07254286A (ja) * 1994-03-16 1995-10-03 Nippon Motorola Ltd 低消費電力半導体メモリ装置
JPH087574A (ja) * 1994-06-21 1996-01-12 Matsushita Electric Ind Co Ltd 低消費電力型スタティックｒａｍ
US5521875A (en) * 1994-12-30 1996-05-28 Vlsi Technology, Inc. Dynamic single-ended sense amp improvement with charge share assist
US5619464A (en) * 1995-06-07 1997-04-08 Advanced Micro Devices, Inc. High performance RAM array circuit employing self-time clock generator for enabling array accessess

Also Published As

Publication number Publication date
EP0869507A2 (de) 1998-10-07
CN1199229A (zh) 1998-11-18
JPH10275476A (ja) 1998-10-13
US5828610A (en) 1998-10-27
KR19980080431A (ko) 1998-11-25
JP3834996B2 (ja) 2006-10-18
EP0869507A3 (de) 1999-12-08
EP0869507B1 (de) 2004-04-21
CN1126104C (zh) 2003-10-29
DE69823263T2 (de) 2005-04-28

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Legal Events

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