DE69908770D1 - Nichtflüchtiges flip flop - Google Patents

Nichtflüchtiges flip flop

Info

Publication number
DE69908770D1
DE69908770D1 DE69908770T DE69908770T DE69908770D1 DE 69908770 D1 DE69908770 D1 DE 69908770D1 DE 69908770 T DE69908770 T DE 69908770T DE 69908770 T DE69908770 T DE 69908770T DE 69908770 D1 DE69908770 D1 DE 69908770D1
Authority
DE
Germany
Prior art keywords
flip flop
volatile flip
volatile
flop
flip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69908770T
Other languages
English (en)
Other versions
DE69908770T2 (de
Inventor
B Gadbois
T Hurst
S Sather
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Technology Inc
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Application granted granted Critical
Publication of DE69908770D1 publication Critical patent/DE69908770D1/de
Publication of DE69908770T2 publication Critical patent/DE69908770T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/161Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165Auxiliary circuits
    • G11C11/1675Writing or programming circuits or methods
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C14/00Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
    • G11C14/0054Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a SRAM cell
    • G11C14/0081Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a SRAM cell and the nonvolatile element is a magnetic RAM [MRAM] element or ferromagnetic cell
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/20Memory cell initialisation circuits, e.g. when powering up or down, memory clear, latent image memory
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356Bistable circuits
    • H03K3/356008Bistable circuits ensuring a predetermined initial state when the supply voltage has been applied; storing the actual state when the supply voltage fails
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/45Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of non-linear magnetic or dielectric devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B61/00Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
    • H10B61/20Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices comprising components having three or more electrodes, e.g. transistors
    • H10B61/22Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices comprising components having three or more electrodes, e.g. transistors of the field-effect transistor [FET] type
DE69908770T 1998-04-14 1999-04-14 Nichtflüchtiges flip flop Expired - Lifetime DE69908770T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/059,871 US6269027B1 (en) 1998-04-14 1998-04-14 Non-volatile storage latch
US59871 1998-04-14
PCT/US1999/008240 WO1999053499A1 (en) 1998-04-14 1999-04-14 Non-volatile storage latch

Publications (2)

Publication Number Publication Date
DE69908770D1 true DE69908770D1 (de) 2003-07-17
DE69908770T2 DE69908770T2 (de) 2004-05-13

Family

ID=22025834

Family Applications (2)

Application Number Title Priority Date Filing Date
DE69908770T Expired - Lifetime DE69908770T2 (de) 1998-04-14 1999-04-14 Nichtflüchtiges flip flop
DE69937259T Expired - Lifetime DE69937259T2 (de) 1998-04-14 1999-04-14 Nichtflüchtiges Speicherregister

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE69937259T Expired - Lifetime DE69937259T2 (de) 1998-04-14 1999-04-14 Nichtflüchtiges Speicherregister

Country Status (6)

Country Link
US (3) US6269027B1 (de)
EP (2) EP1072040B1 (de)
JP (2) JP3810274B2 (de)
AU (1) AU3562399A (de)
DE (2) DE69908770T2 (de)
WO (1) WO1999053499A1 (de)

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US6343032B1 (en) 1999-07-07 2002-01-29 Iowa State University Research Foundation, Inc. Non-volatile spin dependent tunnel junction circuit
US6542000B1 (en) * 1999-07-30 2003-04-01 Iowa State University Research Foundation, Inc. Nonvolatile programmable logic devices
US6493259B1 (en) * 2000-08-14 2002-12-10 Micron Technology, Inc. Pulse write techniques for magneto-resistive memories
US6724654B1 (en) * 2000-08-14 2004-04-20 Micron Technology, Inc. Pulsed write techniques for magneto-resistive memories
JP5100805B2 (ja) * 2000-09-22 2012-12-19 ルネサスエレクトロニクス株式会社 薄膜磁性体記憶装置
US6515895B2 (en) * 2001-01-31 2003-02-04 Motorola, Inc. Non-volatile magnetic register
US6392924B1 (en) * 2001-04-06 2002-05-21 United Microelectronics Corp. Array for forming magnetoresistive random access memory with pseudo spin valve
US6693826B1 (en) 2001-07-30 2004-02-17 Iowa State University Research Foundation, Inc. Magnetic memory sensing method and apparatus
JP4073690B2 (ja) 2001-11-14 2008-04-09 株式会社ルネサステクノロジ 薄膜磁性体記憶装置
JP4278325B2 (ja) * 2001-12-19 2009-06-10 株式会社ルネサステクノロジ 半導体集積回路装置
GB0207307D0 (en) * 2002-03-27 2002-05-08 Koninkl Philips Electronics Nv In-pixel memory for display devices
JP3711459B2 (ja) * 2002-06-05 2005-11-02 松下電器産業株式会社 不揮発性メモリ回路の駆動方法
GB0213420D0 (en) * 2002-06-12 2002-07-24 Koninkl Philips Electronics Nv In-Pixel memory for display devices
UA77303C2 (en) * 2002-06-14 2006-11-15 Pfizer Derivatives of thienopyridines substituted by benzocondensed heteroarylamide useful as therapeutic agents, pharmaceutical compositions and methods for their use
JP3808802B2 (ja) * 2002-06-20 2006-08-16 株式会社東芝 磁気ランダムアクセスメモリ
JP2004023062A (ja) * 2002-06-20 2004-01-22 Nec Electronics Corp 半導体装置とその製造方法
US6754097B2 (en) * 2002-09-03 2004-06-22 Hewlett-Packard Development Company, L.P. Read operations on multi-bit memory cells in resistive cross point arrays
JP4133149B2 (ja) 2002-09-12 2008-08-13 株式会社ルネサステクノロジ 半導体記憶装置
US6714441B1 (en) * 2002-09-17 2004-03-30 Micron Technology, Inc. Bridge-type magnetic random access memory (MRAM) latch
JP2004118921A (ja) 2002-09-25 2004-04-15 Toshiba Corp 磁気ランダムアクセスメモリ
AU2003280582A1 (en) * 2002-11-01 2004-05-25 Matsushita Electric Industrial Co., Ltd. Method for driving non-volatile flip-flop circuit using resistance change element
JP4365576B2 (ja) * 2002-11-22 2009-11-18 Tdk株式会社 磁気メモリデバイスおよび書込電流駆動回路、並びに書込電流駆動方法
JP4294307B2 (ja) 2002-12-26 2009-07-08 株式会社ルネサステクノロジ 不揮発性記憶装置
KR100479810B1 (ko) * 2002-12-30 2005-03-31 주식회사 하이닉스반도체 불휘발성 메모리 장치
US7202645B2 (en) * 2003-01-09 2007-04-10 Audio Note Uk Ltd. Regulated power supply unit
KR101009891B1 (ko) * 2003-01-31 2011-01-20 엔엑스피 비 브이 자기 저항 메모리 셀, 자기 저항 메모리 셀의 매트릭스,자기 저항 메모리 셀의 매트릭스에 값을 기록하는 방법 및자기 저항 메모리 셀 제조 방법
US6956762B2 (en) * 2003-05-23 2005-10-18 Hewlett-Packard Development Company, L.P. Method and system for data communication on a chip
US6976422B2 (en) * 2003-06-06 2005-12-20 Illinois Tool Works, Inc. Strapping machine with automatic strap clearing and reloading
US7029924B2 (en) * 2003-09-05 2006-04-18 Sharp Laboratories Of America, Inc. Buffered-layer memory cell
US7057919B1 (en) 2003-10-31 2006-06-06 Silicon Magnetic Systems Magnetic memory array configuration
JP4159095B2 (ja) 2003-12-03 2008-10-01 インターナショナル・ビジネス・マシーンズ・コーポレーション 磁気記憶装置
US7082053B1 (en) 2003-12-24 2006-07-25 Silicon Magnetic Systems Non-volatile latch with magnetic junctions
US6798690B1 (en) * 2004-01-10 2004-09-28 Honeywell International Inc. Magnetic switching with expanded hard-axis magnetization volume at magnetoresistive bit ends
US7068531B2 (en) * 2004-01-10 2006-06-27 Honeywell International Inc. Bias-adjusted magnetoresistive devices for magnetic random access memory (MRAM) applications
US20070279971A1 (en) * 2004-06-04 2007-12-06 Micron Technology, Inc. Modified pseudo-spin valve (psv) for memory applications
US7339818B2 (en) * 2004-06-04 2008-03-04 Micron Technology, Inc. Spintronic devices with integrated transistors
US7447847B2 (en) * 2004-07-19 2008-11-04 Micron Technology, Inc. Memory device trims
JPWO2006030516A1 (ja) * 2004-09-17 2008-05-08 富士通株式会社 磁気記憶装置及びその製造方法
US7379321B2 (en) * 2005-02-04 2008-05-27 Hitachi Global Storage Technologies Netherlands B.V. Memory cell and programmable logic having ferromagnetic structures exhibiting the extraordinary hall effect
JP4802608B2 (ja) * 2005-08-19 2011-10-26 ソニー株式会社 記憶装置
US7423328B2 (en) * 2005-10-17 2008-09-09 Northern Lights Semiconductor Corp. Method for reducing word line current in magnetoresistive random access memory and structure thereof
US7426133B2 (en) * 2005-10-24 2008-09-16 Honeywell International, Inc. Complementary giant magneto-resistive memory with full-turn word line
US7248496B2 (en) * 2005-11-14 2007-07-24 Honeywell International Inc. MRAM read sequence using canted bit magnetization
US7548452B2 (en) * 2006-03-15 2009-06-16 Honeywell International Inc. MRAM read bit with askew fixed layer
US7746686B2 (en) * 2006-04-21 2010-06-29 Honeywell International Inc. Partitioned random access and read only memory
US7474569B2 (en) * 2006-05-25 2009-01-06 Honeywell International Inc. Two-element magnetic memory cell
US7499313B2 (en) * 2006-06-02 2009-03-03 Honeywell International Inc. Nonvolatile memory with data clearing functionality
JP4231887B2 (ja) 2006-09-28 2009-03-04 株式会社東芝 不揮発ラッチ回路および不揮発性フリップフロップ回路
US8120887B2 (en) * 2007-02-28 2012-02-21 Alpha & Omega Semiconductor, Ltd. MOS transistor triggered transient voltage suppressor to provide circuit protection at a lower voltage
US7447061B1 (en) 2007-03-02 2008-11-04 The United States Of America As Represented By The Secretary Of The Navy Magnetoresistive memory array circuit
US7692954B2 (en) * 2007-03-12 2010-04-06 International Business Machines Corporation Apparatus and method for integrating nonvolatile memory capability within SRAM devices
US20080229269A1 (en) * 2007-03-12 2008-09-18 International Business Machines Corporation Design structure for integrating nonvolatile memory capability within sram devices
WO2009031231A1 (ja) * 2007-09-07 2009-03-12 Renesas Technology Corp. 半導体装置
JP5201487B2 (ja) 2007-12-06 2013-06-05 日本電気株式会社 不揮発性ラッチ回路
JP5392568B2 (ja) 2007-12-14 2014-01-22 日本電気株式会社 不揮発性ラッチ回路及びそれを用いた論理回路
US7760538B1 (en) * 2008-03-04 2010-07-20 Xilinx, Inc. Non-volatile SRAM cell
US7796417B1 (en) * 2008-04-14 2010-09-14 Altera Corporation Memory circuits having programmable non-volatile resistors
US8618870B2 (en) 2009-06-12 2013-12-31 Semiconductor Technology Academic Research Center Voltage characteristic regulating method of latch circuit, voltage characteristic regulating method of semiconductor device, and voltage characteristic regulator of latch circuit
KR101611416B1 (ko) 2009-12-09 2016-04-12 삼성전자주식회사 비휘발성 논리 회로, 상기 비휘발성 논리 회로를 포함하는 집적 회로 및 상기 집적 회로의 동작 방법
US8406064B2 (en) 2010-07-30 2013-03-26 Qualcomm Incorporated Latching circuit
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US8373438B2 (en) 2010-10-29 2013-02-12 Alexander Mikhailovich Shukh Nonvolatile logic circuit
US8681535B2 (en) 2011-06-03 2014-03-25 Alexander Mikhailovich Shukh Nonvolatile latch circuit
TWI429062B (zh) * 2011-06-15 2014-03-01 Ind Tech Res Inst 非揮發性靜態隨機存取式記憶胞以及記憶體電路
US9209196B2 (en) 2011-11-30 2015-12-08 Sharp Kabushiki Kaisha Memory circuit, method of driving the same, nonvolatile storage device using the same, and liquid crystal display device
US8773896B2 (en) 2012-05-18 2014-07-08 Alexander Mikhailovich Shukh Nonvolatile latch circuit
JP6148534B2 (ja) 2013-05-20 2017-06-14 株式会社東芝 不揮発性メモリ
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Also Published As

Publication number Publication date
EP1072040A1 (de) 2001-01-31
US6269027B1 (en) 2001-07-31
EP1072040B1 (de) 2003-06-11
JP3810274B2 (ja) 2006-08-16
DE69908770T2 (de) 2004-05-13
EP1326255B1 (de) 2007-10-03
JP2006155870A (ja) 2006-06-15
WO1999053499A1 (en) 1999-10-21
AU3562399A (en) 1999-11-01
DE69937259T2 (de) 2008-07-17
JP2002511631A (ja) 2002-04-16
EP1326255A2 (de) 2003-07-09
US6175525B1 (en) 2001-01-16
US6147922A (en) 2000-11-14
DE69937259D1 (de) 2007-11-15
EP1326255A3 (de) 2004-06-16

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