EP0520858A1 - Current mirror functioning at low voltages - Google Patents
Current mirror functioning at low voltages Download PDFInfo
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- EP0520858A1 EP0520858A1 EP92401666A EP92401666A EP0520858A1 EP 0520858 A1 EP0520858 A1 EP 0520858A1 EP 92401666 A EP92401666 A EP 92401666A EP 92401666 A EP92401666 A EP 92401666A EP 0520858 A1 EP0520858 A1 EP 0520858A1
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- Prior art keywords
- transistor
- current
- voltage
- current mirror
- mirror
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/26—Current mirrors
- G05F3/262—Current mirrors using field-effect transistors only
Definitions
- the present invention relates to a current mirror electronic circuit, the architecture of which has been established with a view to obtaining good operation at a low voltage close to the lower supply voltage, and a low pass resistance.
- a current mirror electronic circuit the architecture of which has been established with a view to obtaining good operation at a low voltage close to the lower supply voltage, and a low pass resistance.
- the invention is applicable to circuits produced with different types of transistors: in order to clarify the description, the invention will be explained by relying on a circuit in N-MOS transistors, which does not limit the scope of the 'invention.
- I error
- FIG. 2 on the follower branch is added a transistor T3, the gate of which is connected to the reference branch, between the source 1 and T1.
- the transistor T3 is counter-reacted by a simple mirror.
- the voltage excursion of point A, between the load 2 and T3 is limited to some 100 mV + V GS above the "lower" voltage V SS some 100 mV "corresponds to the drop of voltage across T3, and V GS at the voltage drop across T2.
- a transistor T4 added in the reference branch allows T1 to work under the same conditions as T2, by symmetrizing the circuit, because the pair T3 T4 imposes the same voltage at points B and C, improving current copying. But in the two cases of Wilson mirrors, there are two transistors in series in the feedback branch.
- V GS can reach values as high as 4 or 5 volts, while circuits operate at 1 volt.
- V DS sat or V DSS this threshold value, which according to the prior art is too much higher than V SS because there are in the follower branch two transistors T2 and T3 in series, whose pass resistance R on is too high.
- the object of the invention is to obtain that a current mirror operates with a low voltage V DSS , above the supply voltage VSS, so as to be adapted to the circuits which themselves operate under a low potential difference between V DD and V SS , which does not allow the mirror to operate very above V SS .
- Another object of the invention is to produce a current mirror which has a low pass resistance R on in its feedback branch, which is moreover a necessary condition for being able to work at a voltage close to V ss .
- the invention relates to a current mirror operating at low voltage, comprising, in a reference branch, a current source and a first transistor and in an output branch, a load and a second transistor, the gates of these two transistors being joined and controlled from the current source, this mirror being characterized in that it further comprises a voltage feedback circuit which, for a voltage close to the lower supply voltage requires that the first transistor copies, on its drain, the voltage existing on the drain of the second transistor.
- the originality of the mirror of FIG. 5 comes from the fact that it further comprises a voltage feedback circuit, formed by the transistors T5 and T6.
- the transistor T5 is mounted on the reference branch of the simple mirror, between the current source 1 (point D) and the transistor T1. (point C).
- the transistor T6 is mounted in parallel with the load 2, that is to say that its source is connected to the point B common to the load 2 and to T2, and that its drain is joined at the point A to an auxiliary current source 10
- the grids of the transistors T5 and T6 are combined, and controlled from point A.
- a first simple mirror 1 + T1 + T2 is counter-reacted by a second simple mirror 10 + T 6 + T5, mounted symmetrically so that the feedback branch of one constitutes the branch of other's reference. Only the load 2, mounted in parallel on the current source 10 and T6, breaks the symmetry.
- the pair of transistors T5 and T6 constitutes a voltage follower which, if neither of the two transistors is blocked, imposes the same voltage at points B and C, which means that the transistors T1 and T2 of the two branches operate under the same conditions.
- the source 10 supplies a current I ′
- the load 2 is traversed by a current II ′, since the feedback transistor T2 supplies a total current equal to I.
- the feedback produced by T5 and T6 makes it possible to keep the current of constant output, in the load, when V B - V SS ⁇ V DSS (T2) V B being the voltage at point B, defined above, V DSS (T2) being the voltage V DS at saturation for the transistor T2.
- FIG. 8 represents some characteristic curves I (V) of the current mirror according to the invention, for 4 values of V GS different from each other.
- V current mirror
- FIG. 8 represents some characteristic curves I (V) of the current mirror according to the invention, for 4 values of V GS different from each other.
- the corresponding curves of a simple current mirror for the same values of V GS .
- the arrows 11 show the difference which exists between the characteristics of a known mirror (dotted lines) and those of the invention (solid lines). It can be observed that, unlike Wilson mirrors (FIG. 4) for which there is an increase in V DSS compared to a simple mirror, there is according to the invention a reduction in V DSS : the current mirror according to the invention operates at a voltage close to V SS , even if V DS of T2 is less than V DSS .
- the current mirror according to the invention is used as an interface with circuits operating under low voltage, for example TTL, or as a switch with low pass resistance.
Abstract
Description
La présente invention concerne un circuit électronique miroir de courant, dont l'architecture a été établie en vue d'obtenir un bon fonctionnement à une tension faible proche de la tension d'alimentation inférieure, et une faible résistance passante. Par modification d'un miroir de courant connu, auquel on ajoute un circuit de contre-réaction, on conserve le courant de sortie constant quelque soit la tension appliquée aux bornes du miroir de courant selon l'invention.The present invention relates to a current mirror electronic circuit, the architecture of which has been established with a view to obtaining good operation at a low voltage close to the lower supply voltage, and a low pass resistance. By modification of a known current mirror, to which a feedback circuit is added, the output current is kept constant whatever the voltage applied to the terminals of the current mirror according to the invention.
L'invention est applicable à des circuits réalisés avec différents types de transistors: en vue de clarifier l'exposé, l'invention sera expliquée en s'appuyant sur un circuit en transistors N-MOS, ce qui ne limite pas la portée de l'invention.The invention is applicable to circuits produced with different types of transistors: in order to clarify the description, the invention will be explained by relying on a circuit in N-MOS transistors, which does not limit the scope of the 'invention.
En soi, le miroir de courant est bien connu en électronqiue analogique, et le schéma de base en est donné figure 1. De façon très simplifiée, entre deux sources de tension VDD et VSS se trouvent :
- une branche de référence composée d'une source de
courant 1, qui fournit un courant I, et d'un premier transistor T1, - une branche suiveuse ou de recopie composée d'une
charge 2 et d'un second transistor T2. Les grilles de T1 et T2 sont réunies entre elles et de plus à la source decourant 1, de sorte que le courant I′ qui traverse lacharge 2 recopie le courant I de lasource 1.
- a reference branch composed of a
current source 1, which supplies a current I, and of a first transistor T1, - a follower or feedback branch composed of a
load 2 and a second transistor T2. The grids of T1 and T2 are joined together and in addition to thecurrent source 1, so that the current I ′ which flows through theload 2 copies the current I from thesource 1.
En fait, ce type de miroir de courant est entâché d'une erreur (I′ = I) due au gain des transistors, surtout à faible gain. On peut y remédier en réalisant un miroir de Wilson, schématisé en figure 2 : sur la branche suiveuse est ajouté un transistor T3, dont la grille est reliée à la branche de référence, entre la source 1 et T1. Le transistor T3 est contre-réactionné par un miroir simple. Dans ce type de montage, l'excursion en tension du point A, entre la charge 2 et T3, est limitée à quelques 100 mV + VGS au dessus de la tension "inférieure "VSS quelques 100 mV" correspond à la chute de tension à travers T₃, et VGS à la chute de tension à travers T2.In fact, this type of current mirror is marred by an error (I ′ = I) due to the gain of the transistors, especially at low gain. This can be remedied by making a Wilson mirror, shown diagrammatically in FIG. 2: on the follower branch is added a transistor T3, the gate of which is connected to the reference branch, between the
Dans le miroir de Wilson amélioré de la figure 3, un transistor T₄ ajouté dans la branche de référence permet à T₁ de travailler dans les mêmes conditions que T₂, en symétrisant le circuit, parce que la paire T₃ T₄ impose la même tension aux points B et C, améliorant la recopie de courant. Mais dans les deux cas de miroirs de Wilson, il y a deux transistors en série dans la branche de recopie.In the improved Wilson mirror of FIG. 3, a transistor T₄ added in the reference branch allows T₁ to work under the same conditions as T₂, by symmetrizing the circuit, because the pair T₃ T₄ imposes the same voltage at points B and C, improving current copying. But in the two cases of Wilson mirrors, there are two transistors in series in the feedback branch.
Ainsi, les deux types de miroir de Wilson décrits ne fonctionnent que pour des tensions de sorties (en A) supérieures à VSS + VGS + quelques 100 mV, ce qui est une valeur trop élevée dans certains cas, si l'on tient compte que, pour les transistors MOS, VGS peut atteindre des valeurs aussi élevées que 4 ou 5 volts, tandis que des circuits fonctionnent sous 1 volt.Thus, the two types of Wilson mirror described only work for output voltages (in A) greater than V SS + V GS + some 100 mV, which is too high a value in certain cases, if one holds account that, for MOS transistors, V GS can reach values as high as 4 or 5 volts, while circuits operate at 1 volt.
Cette limitation est illustrée par les courbes de la figure 4 qui donnent les caractéristiques courant-tension d'un miroir en fonction de différentes tensions grille-source VGS, pour le transistor de sortie T₂. Les courbes en pointillés telles que 5 correspondent à un miroir de courant simple (fig. 1) et les courbes en trait plein à un miroir de courant Wilson (fig. 2 et 3). On voit que les miroirs Wilson n'atteignent un courant de saturation (donc stable) IDS sat que pour une valeur de VDs plus élevée, en 7, que pour une miroir simple, en 8. Les flèches 9 montrent le décalage qui existe, pour une tension VGS donnée, entre un miroir simple et un miroir Wilson : pour ce dernier type, la recopie est meilleurs, mais au prix d'un VDSS supérieur.This limitation is illustrated by the curves in FIG. 4 which give the current-voltage characteristics of a mirror as a function of different gate-source voltages V GS , for the output transistor T₂. The dotted curves such as 5 correspond to a simple current mirror (fig. 1) and the solid lines curves to a Wilson current mirror (fig. 2 and 3). We see that Wilson mirrors reach a saturation current (therefore stable) I DS sat only for a higher value of V Ds , in 7, than for a simple mirror, in 8. Arrows 9 show the offset that exists , for a given voltage V GS , between a simple mirror and a Wilson mirror: for the latter type, the copying is better, but at the price of a higher V DSS .
On appelle VDS sat ou VDSS cette valeur de seuil, qui selon l'art antérieur est par trop supérieure à VSS parce qu'il y a dans la branche suiveuse deux transistors T₂ et T₃ en série, dont la résistance passante Ron est trop élevée.We call V DS sat or V DSS this threshold value, which according to the prior art is too much higher than V SS because there are in the follower branch two transistors T₂ and T₃ in series, whose pass resistance R on is too high.
L'objet de l'invention est d'obtenir qu'un miroir de courant fonctionne avec une faible tension VDSS, au dessus de la tension d'alimentation VSS, de façon à être adapté aux circuits qui eux-mêmes fonctionnent sous une faible différence de potentiel entre VDD et VSS, ce qui ne permet pas au miroir de fonctionner très au dessus de VSS.The object of the invention is to obtain that a current mirror operates with a low voltage V DSS , above the supply voltage VSS, so as to be adapted to the circuits which themselves operate under a low potential difference between V DD and V SS , which does not allow the mirror to operate very above V SS .
Un autre objet de l'invention est de réaliser un miroir de courant qui ait une faible résistance passante Ron dans sa branche de recopie, ce qui est par ailleurs une condition nécessaire pour pouvoir travailler à une tension proche de Vss.Another object of the invention is to produce a current mirror which has a low pass resistance R on in its feedback branch, which is moreover a necessary condition for being able to work at a voltage close to V ss .
Ces objectifs sont atteints, selon l'invention, au moyen d'un miroir de courant simple, n'ayant qu'un seul transistor dans sa branche de recopie, mais doté d'une contre-réaction en tension qui a la particularité que sa branche qui agit sur la branche de recopie du miroir est en fait en parallèle avec la charge, et non pas en série avec elle .These objectives are achieved, according to the invention, by means of a simple current mirror, having only one transistor in its feedback branch, but provided with a voltage feedback which has the particularity that its branch which acts on the mirror copying branch is in fact in parallel with the load, and not in series with it.
De façon plus précise, l'invention concerne un miroir de courant fonctionnant sous faible tension, comportant, dans une branche de référence, une source de courant et un premier transistor et dans une branche de sortie, une charge et un second transistor, les grilles de ces deux transistors étant réunies et commandées à partir de la source de courant, ce miroir étant caractérisé en ce qu'il comporte en outre un circuit de contre-réaction en tension qui, pour une tension proche de la tension d'alimentation inférieure impose que le premier transistor recopie, sur son drain, la tension existant sur le drain du second transistor.More specifically, the invention relates to a current mirror operating at low voltage, comprising, in a reference branch, a current source and a first transistor and in an output branch, a load and a second transistor, the gates of these two transistors being joined and controlled from the current source, this mirror being characterized in that it further comprises a voltage feedback circuit which, for a voltage close to the lower supply voltage requires that the first transistor copies, on its drain, the voltage existing on the drain of the second transistor.
L'invention sera mieux comprise par la description détaillée qui suit maintenant d'un exemple d'application, appuyée sur les figures jointes en annexes, qui représentent :
- figures 1 à 3 : trois schémas électriques de miroirs de courant simple et de Wilson, connus, exposés précédemment,
- figure 4 : courbes de caractéristiques 1 (V) de ces miroirs connus, pour plusieurs valeurs de tension de grilles
- figure 5 : schéma électrique d'un miroir de courant selon l'invention,
- figure 6 : schéma équivalent du précédant, pour une tension élevée au dessus de VSS
- figures 7 et 8 : courbes de caractéristiques I(V) d'un miroir de courant selon l'invention.
- Figures 1 to 3: three electrical diagrams of simple current and Wilson mirrors, known, exposed previously,
- Figure 4: characteristic curves 1 (V) of these known mirrors, for several values of gate voltage
- Figure 5: electrical diagram of a current mirror according to the invention,
- Figure 6: equivalent diagram of the previous one, for a high voltage above V SS
- Figures 7 and 8: characteristic curves I (V) of a current mirror according to the invention.
La figure 5 représente le schéma électrique d'un miroir de courant selon l'invention. Il comporte, comme élément de base, un miroir de courant simple pour lequel on reconnait, par comparaison avec la figure 1 :
- une branche de référence, composée d'une
source 1, qui fournit un courant I, et d'un premier transistor T1. - une branche de recopie, composée d'une
charge 2 et d'un second transistor T2. Les grilles communes de T1 et T2 sont commandées à partir d'un point D situé entre la source decourant 1 et le transistor T1.
- a reference branch, composed of a
source 1, which supplies a current I, and of a first transistor T1. - a feedback branch, composed of a
load 2 and a second transistor T2. The common gates of T1 and T2 are controlled from a point D located between thecurrent source 1 and the transistor T1.
L'originalité du miroir de la figure 5 vient de ce qu'il comporte en outre un circuit de contre réaction en tension, formé par les transistors T5 et T6. Le transistor T5 est monté sur la branche de référence du miroir simple, entre la source de courant 1 (point D) et le transistor T1. (point C). le transistor T6 est monté en parallèle avec la charge 2, c'est à dire que sa source est connectée au point B commun à la charge 2 et à T2, et que son drain est réuni au point A à une source auxiliaire de courant 10. Les grilles des transistors T5 et T6 sont réunies, et commandées à partir du point A.The originality of the mirror of FIG. 5 comes from the fact that it further comprises a voltage feedback circuit, formed by the transistors T5 and T6. The transistor T5 is mounted on the reference branch of the simple mirror, between the current source 1 (point D) and the transistor T1. (point C). the transistor T6 is mounted in parallel with the
La symétrie du circuit est remarquable : un premier miroir simple 1 + T1 + T2 est contre-réactionné par un second miroir simple 10 + T 6 + T5, montés en symétrique de façon que la branche de recopie de l'un constitue la branche de référence de l'autre. Seule la charge 2, montée en parallèle sur la source de courant 10 et T6, rompt la symétrie. On peut également considérer que la paire de transistors T5 et T6 constitue un suiveur de tension qui, si aucun des deux transistors n'est bloqué, impose la même tension aux points B et C, ce qui signifie que les transistors T1 et T2 des deux branches fonctionnent dans les mêmes conditions.The symmetry of the circuit is remarkable: a first
Si la source 10 fournit un courant I′, la charge 2 est parcourue par un courant I-I′, puisque le transistor de recopie T2 fournit un courant total égal à I. La contre-réaction réalisée par T5 et T6 permet de garder le courant de sortie constant, dans la charge, lorsque
VB étant la tension au point B, défini ci-dessus,
VDSS(T2) étant la tension VDS à saturation pour le transistor T2.If the
V B being the voltage at point B, defined above,
V DSS (T2) being the voltage V DS at saturation for the transistor T2.
Le fonctionnement de ce miroir de courant s'explique en considérant la tension VB au point B, dont on supposera qu'elle diminue progressivement de VDD jusque VSS.
- 1. Lorsque VB = VDD , T₆ est bloqué parce que son VGS = 0 et le point A est tiré vers VDD , par la source auxiliaire 10. T₅ se comporte dans ce cas comme un interrupteur conducteur à faible Ron. Dans ces conditions, le schéma se simplifie et devient celui représenté en figure 6. Si la résistance Ron de l'interrupteur T₅ est suffisamment faible, elle peut être négligée, et le schéma du miroir de courant selon l'invention est équivalent à celui d'un miroir simple, en figure 1.
- 2. Lorsque VB s'abaisse et atteint
courant 10, qui est elle-même réalisée au moyen d'un transistor), le courant I′ débité par lasource 10 est. rétabli et T6 redevient conducteur. Le courant qui traverse lacharge 2 diminue et devient I-I′. Cette diminution du courant dans lacharge 2 ne présente aucun inconvénient, puisque l'objet de l'invention est de travailler très près de l'alimentation négative VSS , et non pas à proximité de l'alimentation positive VDD. - 3. Lorsque VB continue de baisser, et atteint
Considérons alors le comportement de T1 dans la branche de référence, illustré par la figure 7, Lasource de courant 1 impose un courant I, mais T5 + T6 imposent la tension au point C : la caractéristique de T1 se déplace du point P au point P′, sur la figure 7, en baisse puisque par définition VB baisse. Il s'ensuit que la tension de grille de T1 augmente de VGS3 à VGS4, par exemple. Mais, par construction d'un miroir de courant, cette même tension VGS4 est appliquée sur la grille de T2, et le courant de sortie dans lacharge 2 reste constant bien que le transistor T₂ soit entré en fonctionnement ohmique, puisque le point P′ est sur la partie linéaire de la caractéristique I (V) - 4. Si la tension VB continue à diminuer, et donc à se rapprocher de VSS , la tension de grille VGS de T1 continue à augmenter, mais également la tension VD du point D situé entre la
source de courant 1 et le transistor T5. VD est tiré à VDD et lorsqu'il atteint cette valeur, la contre-réaction cesse de fonctionner, et le courant de sortie décroît. Le générateur decourant 1 ne fonctionne plus, ni le miroir de courant, mais néanmoins ce dernier à fonctionné jusqu'à une valeur peu élevée au dessus de VSS.
- 1. When V B = V DD , T₆ is blocked because its V GS = 0 and point A is pulled towards V DD , by the
auxiliary source 10. T₅ behaves in this case like a conductive switch at low R on . Under these conditions, the diagram is simplified and becomes that shown in FIG. 6. If the resistance R on of the switch T₅ is sufficiently low, it can be neglected, and the diagram of the current mirror according to the invention is equivalent to that of a simple mirror, in figure 1. - 2. When V B lowers and reaches
current source 10, which is itself produced by means of a transistor), the current I ′ supplied by thesource 10 is. restored and T6 becomes conductive again. The current flowing through theload 2 decreases and becomes II ′. This reduction in the current in theload 2 presents no drawback, since the object of the invention is to work very close to the negative supply V SS , and not close to the positive supply V DD . - 3. When V B continues to fall, and reaches
Let us then consider the behavior of T1 in the reference branch, illustrated by Figure 7, Thecurrent source 1 imposes a current I, but T5 + T6 impose the voltage at point C: the characteristic of T1 moves from point P to point P ′, in Figure 7, decreasing since by definition V B decreases. It follows that the gate voltage of T1 increases from V GS3 to V GS4 , for example. But, by construction of a current mirror, this same voltage V GS4 is applied to the gate of T2, and the output current in theload 2 remains constant although the transistor T₂ has entered ohmic operation, since the point P ′ Is on the linear part of the characteristic I (V) - 4. If the voltage V B continues to decrease, and therefore to approach V SS , the gate voltage V GS of T1 continues to increase, but also the voltage V D of the point D located between the
current source 1 and the transistor T5. V D is drawn at V DD and when it reaches this value, the feedback stops working, and the output current decreases. Thecurrent generator 1 no longer works, nor the current mirror, but nevertheless the latter has operated up to a low value above V SS .
La figure 8 représente quelques courbes de caractéristiques I (V) du miroir de courant selon l'invention, pour 4 valeurs de VGS différentes entre elles. Sur la même figure sont reportées en pointillés, les courbes correspondantes d'un miroir de courant simple, pour les mêmes valeurs de VGS. Les flêches 11 montrent le décalage qui existe entre les caractéristiques d'un miroir connu (pointillés ) et celles de l'invention (traits pleins), On peut observer que, contrairement aux miroirs Wilson (figure 4) pour lesquels il y a augmentation de VDSS par rapport à un miroir simple, il y a selon l'invention une diminution de VDSS : le miroir de courant selon l'invention fonctionne à une tension proche de VSS, même si VDS de T2 est inférieure a VDSS.FIG. 8 represents some characteristic curves I (V) of the current mirror according to the invention, for 4 values of V GS different from each other. In the same figure are shown in dotted lines, the corresponding curves of a simple current mirror, for the same values of V GS . The
Le miroir de courant selon l'invention est utilisé en interface avec les circuits fonctionnant sous faible tension, par exemple les TTL, ou comme interrupteur à faible résistance passante.The current mirror according to the invention is used as an interface with circuits operating under low voltage, for example TTL, or as a switch with low pass resistance.
L'invention est précisée par les revendications suivantes.The invention is specified by the following claims.
Claims (6)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9108007 | 1991-06-27 | ||
FR9108007A FR2678399B1 (en) | 1991-06-27 | 1991-06-27 | CURRENT MIRROR OPERATING AT LOW VOLTAGE. |
Publications (2)
Publication Number | Publication Date |
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EP0520858A1 true EP0520858A1 (en) | 1992-12-30 |
EP0520858B1 EP0520858B1 (en) | 1995-11-29 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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EP92401666A Expired - Lifetime EP0520858B1 (en) | 1991-06-27 | 1992-06-16 | Current mirror functioning at low voltages |
Country Status (4)
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US (1) | US5252910A (en) |
EP (1) | EP0520858B1 (en) |
DE (1) | DE69206335T2 (en) |
FR (1) | FR2678399B1 (en) |
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CN104684223A (en) * | 2015-03-17 | 2015-06-03 | 无锡中星微电子有限公司 | Led drive circuit |
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US4471292A (en) * | 1982-11-10 | 1984-09-11 | Texas Instruments Incorporated | MOS Current mirror with high impedance output |
US4550284A (en) * | 1984-05-16 | 1985-10-29 | At&T Bell Laboratories | MOS Cascode current mirror |
US4618815A (en) * | 1985-02-11 | 1986-10-21 | At&T Bell Laboratories | Mixed threshold current mirror |
GB2209254A (en) * | 1987-08-29 | 1989-05-04 | Motorola Inc | Current minor amplifier with reduced supply voltage sensitivity |
EP0378452A1 (en) * | 1989-01-11 | 1990-07-18 | STMicroelectronics S.A. | Current mirror circuits |
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DE190518C (en) * | 1906-06-30 | 1907-11-19 | ||
US3936725A (en) * | 1974-08-15 | 1976-02-03 | Bell Telephone Laboratories, Incorporated | Current mirrors |
US4029974A (en) * | 1975-03-21 | 1977-06-14 | Analog Devices, Inc. | Apparatus for generating a current varying with temperature |
JPS562017A (en) * | 1979-06-19 | 1981-01-10 | Toshiba Corp | Constant electric current circuit |
US4300091A (en) * | 1980-07-11 | 1981-11-10 | Rca Corporation | Current regulating circuitry |
GB2214018A (en) * | 1987-12-23 | 1989-08-23 | Philips Electronic Associated | Current mirror circuit arrangement |
GB2228351A (en) * | 1989-02-17 | 1990-08-22 | Philips Electronic Associated | Circuit arrangement for processing sampled analogue electrical signals |
-
1991
- 1991-06-27 FR FR9108007A patent/FR2678399B1/en not_active Expired - Fee Related
-
1992
- 1992-06-16 EP EP92401666A patent/EP0520858B1/en not_active Expired - Lifetime
- 1992-06-16 DE DE69206335T patent/DE69206335T2/en not_active Expired - Fee Related
- 1992-06-26 US US07/904,569 patent/US5252910A/en not_active Expired - Fee Related
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4471292A (en) * | 1982-11-10 | 1984-09-11 | Texas Instruments Incorporated | MOS Current mirror with high impedance output |
US4550284A (en) * | 1984-05-16 | 1985-10-29 | At&T Bell Laboratories | MOS Cascode current mirror |
US4618815A (en) * | 1985-02-11 | 1986-10-21 | At&T Bell Laboratories | Mixed threshold current mirror |
GB2209254A (en) * | 1987-08-29 | 1989-05-04 | Motorola Inc | Current minor amplifier with reduced supply voltage sensitivity |
EP0378452A1 (en) * | 1989-01-11 | 1990-07-18 | STMicroelectronics S.A. | Current mirror circuits |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19612269C1 (en) * | 1996-03-28 | 1997-08-28 | Bosch Gmbh Robert | Current mirror circuit with additional circuit |
CN103324229A (en) * | 2012-03-21 | 2013-09-25 | 广芯电子技术(上海)有限公司 | Constant current source |
Also Published As
Publication number | Publication date |
---|---|
FR2678399B1 (en) | 1993-09-03 |
DE69206335D1 (en) | 1996-01-11 |
FR2678399A1 (en) | 1992-12-31 |
EP0520858B1 (en) | 1995-11-29 |
DE69206335T2 (en) | 1996-04-25 |
US5252910A (en) | 1993-10-12 |
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