EP0720776A1 - Anode d'ecran plat de visualisation - Google Patents
Anode d'ecran plat de visualisationInfo
- Publication number
- EP0720776A1 EP0720776A1 EP95926424A EP95926424A EP0720776A1 EP 0720776 A1 EP0720776 A1 EP 0720776A1 EP 95926424 A EP95926424 A EP 95926424A EP 95926424 A EP95926424 A EP 95926424A EP 0720776 A1 EP0720776 A1 EP 0720776A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- anode
- conductors
- series
- flat display
- strips
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J9/00—Apparatus or processes specially adapted for the manufacture, installation, removal, maintenance of electric discharge tubes, discharge lamps, or parts thereof; Recovery of material from discharge tubes or lamps
- H01J9/20—Manufacture of screens on or from which an image or pattern is formed, picked up, converted or stored; Applying coatings to the vessel
- H01J9/22—Applying luminescent coatings
- H01J9/227—Applying luminescent coatings with luminescent material discontinuously arranged, e.g. in dots or lines
- H01J9/2277—Applying luminescent coatings with luminescent material discontinuously arranged, e.g. in dots or lines by other processes, e.g. serigraphy, decalcomania
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J29/00—Details of cathode-ray tubes or of electron-beam tubes of the types covered by group H01J31/00
- H01J29/02—Electrodes; Screens; Mounting, supporting, spacing or insulating thereof
- H01J29/08—Electrodes intimately associated with a screen on or from which an image or pattern is formed, picked-up, converted or stored, e.g. backing-plates for storage tubes or collecting secondary electrons
- H01J29/085—Anode plates, e.g. for screens of flat panel displays
Definitions
- the present invention relates to a flat display screen anode. It applies more particularly to the production of connections of luminescent elements of an anode of a color screen, such as a microtip color screen.
- FIG. 1 represents the structure of a flat screen with microtips of the type to which the invention relates.
- Such a microtip screen is essentially constituted by a cathode 1 with microtips 2 and a grid 3 for view of holes 4 corresponding to the locations of the microtips 2.
- the cathode 1 is placed opposite a cathode-ray anode.
- nescente 5 including a glass substrate 6 constitutes the screen surface.
- the cathode 1 is organized in columns and is made up, on a glass substrate 10, of cathode conductors organized in meshes from a conductive layer.
- the microtips 2 are produced on a resistive layer 11 deposited on the cathode conductors and are arranged inside the laughing of the meshes defined by the cathode conductors.
- FIG. 1 partially represents the interior of a mesh, the cathode conductors do not appear in this figure.
- the cathode 1 is associated with the grid 3 which is organized in lines. The intersection of a line of the grid 3 and a column of the cathode 1 defines a pixel.
- This device uses the electric field created between the cathode 1 and the grid 3 so that electrons are extracted from the microtips 2 towards phosphor elements 7 of the anode 5.
- the anode 5 is provided with alternating strips of phosphor elements 7, each corresponding to a color (Blue, Red, Green). The strips are separated from each other by an insulator 8.
- the phosphor elements 7 are deposited on electrodes 9, made up of corresponding strips of a transparent conductive layer such as indium tin oxide ( ITO).
- ITO indium tin oxide
- the sets of blue, red and green bands are alternately polarized with respect to the cathode 1, so that the electrons extracted from the microtips 2 of a pixel of the cathode / grid are alternately directed towards the phosphor elements 7 opposite each other colours.
- the command to select the phosphor 7 (the lumino ⁇ phore 7g in FIG. 1) which must be bombarded by the electrons coming from the microtips 2 of the cathode 1 requires selectively controlling the polarization of the phosphor elements 7 of the anode 5, color by color.
- FIG. 2 schematically illustrates a conventional anode structure. This figure partially shows, in perspective, an anode 5, produced according to known techniques. Interconnection tracks 12 and 13 are made for two (7g, 7b) of the three colors of phosphors 7. These tracks are respectively connected to pads 15, 16 intended to be connected, by means of electrical connections 17 and 18 , to a control system (not shown). The connection of the phosphors 7r of the third color is carried out by means of a connector 20 with points 19, on pads 14 provided at one end of each of the strips of phosphors 7r of the corresponding color. The same technique is used for the deposition of the phosphors 7g, 7b, 7r on the strips of anode conductors with which they are associated. In fact, the phosphors 7 are deposited in three successive cataphoresis stages (one per color). We must therefore be able to selectively excite the anode conductor strips associated with each color.
- pin connectors require multiple connections, which complicates the constitution of the anode and affects, in particular, its reliability.
- conventional techniques lead to a high consumption of expensive metals, in particular gold, which is due both to the structure of the anode and to its manufacturing process.
- the object of the present invention is to overcome the drawbacks of existing techniques by proposing a flat display display anode which simplifies the connections between the series of anode conductors and the control system.
- the invention also aims to simplify the manufacture of such an anode, and in particular the deposition of phosphors, by authorizing the use of the same connections whether for the operation of the anode or for the deposition of phosphors .
- the object of the invention is further to propose a process for making such an anode which reduces the consumption of expensive metals.
- the present invention provides a method for producing a flat display screen anode, which comprises the following phases:
- the first phase comprises filling the windows with a conductive material.
- the first phase comprises the following steps: full plate deposition of a layer of anode conductors on a glass substrate; and etching in a line pattern, to form the three series of strips of anode conductors in the layer of anode conductors, and the first two interconnection tracks as well as the pads.
- the method further comprises the step of depositing on at least two sides of the periphery of the plate with a conductive layer.
- the third phase further comprises the step of depositing a conductive filling material in the windows.
- the filling of the windows is obtained by auto-catalytic deposition.
- the third interconnection track and the third connection pad are produced by full plate deposition of an organometallic precursor, irradiation of the latter by means of a laser, and elimination of the precursor not irradiated with an appropriate solvent.
- the fourth phase of depositing the phosphors consists in: perform a cataphoretic deposition in three stages, successively exciting the anode conductor strips of the three colors by means of the electrical connection pads to which the strips are respectively connected.
- the present invention also provides a flat display screen anode, of the type comprising at least three series of alternating parallel strips of anode conductors, comprising for each series of strips of anode conductors, a single electrical connection pad, each pad being made accessible, via conductive tracks from the same surface level of the anode.
- the anode comprises, for each series of strips of anode conductors, an interconnection track of the strips of conductors, provided with a stud, all the studs being arranged on the same side of the anode.
- Figures 1 and 2 which have been described previously, are intended to describe the state of the art and the problem posed;
- Figure 3 shows, in bottom view, a flat screen anode according to the invention;
- Figures 4 to 6 schematically illustrate an embodiment of a first phase of the process for making a flat screen anode, according to the invention;
- FIGS. 7A to 7E represent, diagrammatically, an embodiment of a second phase of the method for realizing a flat screen anode, according to the invention;
- FIGS. 1 and 2 which have been described previously, are intended to describe the state of the art and the problem posed;
- Figures 4 to 6 schematically illustrate an embodiment of a first phase of the process for making a flat screen anode, according to the invention;
- FIGS. 7A to 7E represent, diagrammatically, an embodiment of a second phase of the method for realizing a flat screen anode, according to the invention;
- FIGS. 9A to 9C show, diagrammatically, an embodiment of a fourth and last phase of the method for producing a flat screen anode, according to the invention.
- FIG. 3 schematically represents, in elevation, a flat screen anode 5 according to the invention.
- interconnection tracks 12, 13 and 21 as well as connection pads 15, 16 and 22 are respectively created for each of the three series of anode conductors 9g, 9b and 9r, respectively associated with a color (green, blue, red) of phosphors 7g, 7b, 7r.
- the interconnection tracks are made at two different levels. Two first tracks 12 and 13 are formed directly on or by the material constituting the layer of anode conductors 9. A third track 21 is formed after interposition of an insulating layer 8.
- the phosphors 7g, 7b and 7r are deposited in openings 23 made in this insulating layer 8, directly above the anode conductors 9g, 9b and 9r, in the useful surface of the screen.
- the pads 15, 16 and 22 make it possible not only to activate the series of anode conductors 9g, 9b or 9r desired during the deposit of the phosphors 7, but also to considerably simplify the connections from the anode 5 to the system of ordered. A single pad per color is now sufficient to polarize the anode 5, during the operation of the flat screen.
- FIGS 4 to 6 illustrate an example of implementation of a first phase of the method according to the invention.
- This first phase consists, in particular, of producing anode conductors 9 intended to receive phosphor elements, and two first interconnection tracks of two first series of anode conductors 9g and 9b.
- a layer is deposited on a glass substrate 6 transparent conductor, for example based on indium tin oxide (ITO), intended to constitute anode conductors 9.
- ITO indium tin oxide
- FIG. 5B is a sectional view along the line A- A ', shown in phantom, in the elevation representation of Figure 5A.
- a second step (FIG. 5A and 5B) consists in depositing a conductive layer 24.
- This conductive layer 24 is preferably made up of a fine bonding layer 24A on which a metallic layer 24B is deposited.
- This layer 24 is deposited on at least two edges of the surface of the ITO layer. In practice, this deposition is carried out on three edges so that the three interconnection tracks which will be produced thereafter are found on the same side of the anode 5.
- the width of this layer 24 is such that it does not cover the useful surface of the anode 5. This allows a significant saving of the materials constituting this layer 24.
- Figures 6B, 6C and 6D are sectional views, respectively along lines B-B ', C-C and D-D', shown in phantom, in the elevation representation of Figure 6A.
- the layers 24 and 9 are etched so as to form, at the same time, three series of alternating strips 9g, 9r and 9b of anode conductors, two interconnection tracks 12 and 13 of the first two series 9g, 9b, and pads 14 for each of the bands of the third series 9r.
- a connection pad, respectively 15 and 16 is also formed on each interconnection track 12 and 13.
- the dotted line 24 indicates the inner limit of the layer 24 deposited in the previous step .
- the anode conductor strips 9g and 9b are respectively extended at one of their ends, outside the useful surface of the screen, to be connected to the interconnection track 12 or 13.
- the pads 14, 15 and 16 are preferably brought to the same side of the anode 5.
- anode conductors 9 made of ITO are available, as well as two interconnect tracks. connections 12 and 13, and studs 14, 15, 16 made of metal or other material with high conductivity.
- the metallic layer 24 is not deposited. Then, the structure of strips of anode conductors 9r, 9b, 9g, of tracks interconnection 12, 13, and of pads 14, 15, 16 is formed directly in the transparent conductive layer 9.
- FIGS. 7A to 7E illustrate successive stages of a second phase of the method according to the invention.
- Figure 7A is a sectional view along line C-C indicated in phantom in Figures 6A and 7B.
- Figure 7B is a top view showing part of Figure 6A.
- Figures 7C, 7D, and 7E are respectively sectional views along lines C-C, D-D 'and E-E', shown in phantom in Figure 7B.
- a layer of insulating material 8 is deposited on the stack resulting from the first phase.
- FIGS. 8A to 8F illustrate two stages of a third phase of the method according to the invention. They show sectional views along lines C-C, D-D 'and E-E' of the representation of Figure 7B. Figures 8A and 8D are sectional views along line C-C, Figures 8B and 8E are sectional views along line D-D ', and Figures 8C and 8F are sectional views along line E-E'.
- a filling 28 of all the windows 25, 26 and 27 which have been opened directly above the studs is produced from the stack resulting from the second phase. 15, 16 (figure 8C) and 14 (figure 8B).
- This step consists in carrying out an autocatalytic deposition from a bath containing the metal which it is desired to deposit, in the form of a salt.
- the advantage of such a deposit is that it is selective, is deposited only on the conductive surfaces of windows 25, 26 and 27, without filling the openings 23 whose surface is made of ITO (FIG. 8A). In the application of the invention, such a deposit makes it possible to achieve substantial savings in the material constituting the fillings 28, which is for example gold.
- a second step (FIGS. 8D to 8F) consists in realizing an interconnection track 21 ending in a connection pad 22 (FIG. 8F), anode conductors 9r from the third series of strips. To do this, the apparent surfaces of the fillings 28r are connected together, directly above the studs 14.
- This second step can for example be carried out by means of a full plate deposition of a conductive material 29 which is then etched to form the track 21 and the connection pad 22. This material 29 must be able to be etched selectively with respect to the filling material 28.
- an interconnection track 12, 13 and 21 which, by means of the fillings 28g, 28b and 28r, and the pads 15, 16 and 14, authorizes a single connection without steps for the polarization of the conductors of anode associated with the same color.
- FIGS. 9A to 9C illustrate a fourth and last phase of the method according to the invention, which corresponds to a phase of depositing the phosphors 7. This phase repeats the steps of conventional methods of depositing the phosphors. This deposit of phosphors is carried out in three successive cataphoresis stages.
- Each step corresponds to the deposition of a color of phosphors, by the appropriate excitation of a series of anode conductors 9.
- a first step (FIG. 9A)
- green phosphors 7g in the openings 23 which expose the anode conductors 9g
- this operation is repeated with blue phosphors 7b, exciting the anode conductors 9b via the filling 28b, the connection pad 16 and the interconnection track 13
- red phosphors 7r are deposited, by exciting the anode conductors 9r by means of the connection pad 22, the interconnection track 21, the fillings 28r, and studs 14.
- An anode 5 is thus obtained as shown in FIG. 3.
- the method described above makes it possible to create interconnection tracks of the phosphor strips for each color, which are used both for the deposition of the lumino ⁇ phores, and for the polarization of the anode 5 during the screen operation. This avoids the need for a pin connector, and simplifies the connections between the anode and the control system.
- the method according to the invention is particularly economical in deposition materials.
- Phase 1 :
- Step 1 Full plate deposition on a substrate 6, of a transparent conductive layer 9, for example based on indium tin oxide.
- Step 2 Deposit, for example by screen printing, of a layer of gold (variant 1), of nickel (variant 2), 24B with interposition of a thin bonding layer 24A, for example of chromium, on three sides around the edge of the plate.
- Step 3 Etching of anode conductors 9 organized in three series of bands 9g, 9b and 9r, interconnection tracks 12 and 13 and connection pads 15 and 16 of two first series, as well as studs 14 of the third series. This etching is for example a chemical etching of patterns produced by photolithography.
- Phase 2
- Step 1 Full plate deposition of an insulating layer 8. This is, for example, a chemical vapor deposition (CVD) at ordinary pressure of silicon oxide (Si ⁇ 2> •
- Step 2 Etching of the insulating layer 8, to form apertures 23 for receiving phosphors directly above the anode conductors 9, as well as windows 25,
- This etching is for example carried out by trifluoromethane plasma (CHF3).
- Step 1 Autocatalytic deposition of gold (variant 1), of copper (variant 2) to fill the windows 25, 26 and 27 with a conductive material.
- Variant 1 This deposit is, for example, carried out in a bath based on sulfites (sodium sulfite (Na2S ⁇ 3 ) , disulfite or-sodium (Na3Au (S0 3 ) 2 )) or based on cyanide (KAUCN2) as source of metal ions to be deposited, formaldehyde (HCHO), hypophosphite or others as an agent reducing agent, and ethylenediaminetetracid (EDTA) as a complex of metal ions.
- sulfites sodium sulfite (Na2S ⁇ 3 ) , disulfite or-sodium (Na3Au (S0 3 ) 2 )
- KAUCN2 cyanide
- hypophosphite or others as an agent
- Variant 2 This deposit is for example produced in an alkaline solution based on copper salts (copper sulphates and chlorides) as a source of metal ions to be deposited, of formaldehyde (HCHO) as a reducing agent, and of ethylenediaminetetracid (EDTA) or tartrates as a complex of metal ions.
- copper salts copper sulphates and chlorides
- HCHO formaldehyde
- EDTA ethylenediaminetetracid
- a pH regulator NaOH or others
- additives capable of improving the performance (speed, etc.) of the deposit and the stability of the baths are preferably added to the solutions.
- These additives can be, for example, sodium cyanide (NaCN) in the case of a copper deposition bath, or potassium bromide (KBr), 1-2 diaminoethane, ammonium chloride (NH 4 C1), sodium citrate or others in the case of a gold deposit bath.
- Step 2 Full plate deposition of an organometallic pre-cursor layer 29. Then, localized irradiation of this layer 29 by laser writing, following the layout of an interconnection track 21 of the apparent surfaces of the fillings 28r formed in the windows 27. Finally, elimination of the layer 29 in the places where it has not been irradiated by the laser, by dissolution using an appropriate solvent. The thickness of the elimination obtained is determined by the size of the beam, the power of the laser (for example of the Watt order), the nature of the support of the layer 29, and the speed of the scanning.
- the power of the laser for example of the Watt order
- Variant 1 The organometallic precursor 29 used is a palladium acetate powder (Pd ( ⁇ 3 CO0) 2 ) dissolved in chloroform (HCCI3)).
- Variant 2 The organometallic precursor 29 used is copper formate (Cu (HCOO) 2 ) •
- Phase 4 Phase 4:
- Step 1 Deposit by cataphoresis, with excitation of the anode conductors 9g of the first series, of green phosphors 7g.
- Step 2 Deposition by cataphoresis, with excitation of the anode conductors 9b of the second series, of blue luminopho ⁇ res 7b.
- Step 3 Deposit by cataphoresis, with excitation of the anode conductors 9r of the third series, of red phosphors 7r.
- an autocatalytic deposition step for example of gold or copper, can be inserted between phases 1 and 2 in order to possibly increase the thickness of the interconnection tracks. 12 and 13, prior to the deposition of the insulating layer 8.
- step 2 of phase 1 that is to say the deposition of the layer 24, is produced by laser engraving of an organometallic pre-cursor, such as for example palladium acetate.
- an organometallic pre-cursor such as for example palladium acetate.
- each of the materials or constituents described may be replaced by one or more constituents having characteristics in accordance with their destination.
- each of the deposition or etching methods described may be replaced by an etching (dry or wet) fulfilling the same function.
Abstract
Description
Claims
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9409491 | 1994-07-26 | ||
FR9409491A FR2723254B1 (fr) | 1994-07-26 | 1994-07-26 | Anode d'ecran plat de visualisation |
PCT/FR1995/000997 WO1996003765A1 (fr) | 1994-07-26 | 1995-07-25 | Anode d'ecran plat de visualisation |
Publications (2)
Publication Number | Publication Date |
---|---|
EP0720776A1 true EP0720776A1 (fr) | 1996-07-10 |
EP0720776B1 EP0720776B1 (fr) | 1997-10-08 |
Family
ID=9465935
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP95926424A Expired - Lifetime EP0720776B1 (fr) | 1994-07-26 | 1995-07-25 | Anode d'ecran plat de visualisation |
Country Status (6)
Country | Link |
---|---|
US (1) | US5785570A (fr) |
EP (1) | EP0720776B1 (fr) |
JP (1) | JPH09503337A (fr) |
DE (1) | DE69500841T2 (fr) |
FR (1) | FR2723254B1 (fr) |
WO (1) | WO1996003765A1 (fr) |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6429120B1 (en) | 2000-01-18 | 2002-08-06 | Micron Technology, Inc. | Methods and apparatus for making integrated-circuit wiring from copper, silver, gold, and other metals |
JP3199682B2 (ja) | 1997-03-21 | 2001-08-20 | キヤノン株式会社 | 電子放出装置及びそれを用いた画像形成装置 |
US6211073B1 (en) | 1998-02-27 | 2001-04-03 | Micron Technology, Inc. | Methods for making copper and other metal interconnections in integrated circuits |
US6284656B1 (en) | 1998-08-04 | 2001-09-04 | Micron Technology, Inc. | Copper metallurgy in integrated circuits |
US6288442B1 (en) | 1998-09-10 | 2001-09-11 | Micron Technology, Inc. | Integrated circuit with oxidation-resistant polymeric layer |
US6359328B1 (en) * | 1998-12-31 | 2002-03-19 | Intel Corporation | Methods for making interconnects and diffusion barriers in integrated circuits |
US20020127845A1 (en) * | 1999-03-01 | 2002-09-12 | Paul A. Farrar | Conductive structures in integrated circuits |
FR2797092B1 (fr) * | 1999-07-27 | 2001-09-14 | Commissariat Energie Atomique | Procede de fabrication d'une anode d'un ecran plat de visualisation |
SG94721A1 (en) * | 1999-12-01 | 2003-03-18 | Gul Technologies Singapore Ltd | Electroless gold plated electronic components and method of producing the same |
US6420262B1 (en) | 2000-01-18 | 2002-07-16 | Micron Technology, Inc. | Structures and methods to enhance copper metallization |
US7262130B1 (en) | 2000-01-18 | 2007-08-28 | Micron Technology, Inc. | Methods for making integrated-circuit wiring from copper, silver, gold, and other metals |
US6376370B1 (en) | 2000-01-18 | 2002-04-23 | Micron Technology, Inc. | Process for providing seed layers for using aluminum, copper, gold and silver metallurgy process for providing seed layers for using aluminum, copper, gold and silver metallurgy |
US6423629B1 (en) | 2000-05-31 | 2002-07-23 | Kie Y. Ahn | Multilevel copper interconnects with low-k dielectrics and air gaps |
US6674167B1 (en) | 2000-05-31 | 2004-01-06 | Micron Technology, Inc. | Multilevel copper interconnect with double passivation |
US7220665B2 (en) | 2003-08-05 | 2007-05-22 | Micron Technology, Inc. | H2 plasma treatment |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5828165A (ja) * | 1981-08-13 | 1983-02-19 | Ise Electronics Corp | 螢光表示管の陽極基板 |
JPH0326617Y2 (fr) * | 1984-09-17 | 1991-06-10 | ||
FR2633763B1 (fr) * | 1988-06-29 | 1991-02-15 | Commissariat Energie Atomique | Ecran fluorescent trichrome a micropointes |
FR2633765B1 (fr) * | 1988-06-29 | 1991-09-06 | Commissariat Energie Atomique | Ecran fluorescent a micropointes ayant un nombre reduit de circuits d'adressage et procede d'adressage de cet ecran |
FR2697660B1 (fr) * | 1992-10-29 | 1995-03-03 | Pixel Int Sa | Ecran à adressage matriciel à prise de contacts lignes et colonnes au travers du support. |
FR2725072A1 (fr) * | 1994-09-28 | 1996-03-29 | Pixel Int Sa | Protection electrique d'une anode d'ecran plat de visualisation |
US5578902A (en) * | 1995-03-13 | 1996-11-26 | Texas Instruments Inc. | Field emission display having modified anode stripe geometry |
US5577943A (en) * | 1995-05-25 | 1996-11-26 | Texas Instruments Inc. | Method for fabricating a field emission device having black matrix SOG as an interlevel dielectric |
-
1994
- 1994-07-26 FR FR9409491A patent/FR2723254B1/fr not_active Expired - Fee Related
-
1995
- 1995-07-25 US US08/619,572 patent/US5785570A/en not_active Expired - Fee Related
- 1995-07-25 JP JP8505531A patent/JPH09503337A/ja active Pending
- 1995-07-25 DE DE69500841T patent/DE69500841T2/de not_active Expired - Fee Related
- 1995-07-25 WO PCT/FR1995/000997 patent/WO1996003765A1/fr active IP Right Grant
- 1995-07-25 EP EP95926424A patent/EP0720776B1/fr not_active Expired - Lifetime
Non-Patent Citations (1)
Title |
---|
See references of WO9603765A1 * |
Also Published As
Publication number | Publication date |
---|---|
FR2723254A1 (fr) | 1996-02-02 |
DE69500841D1 (de) | 1997-11-13 |
JPH09503337A (ja) | 1997-03-31 |
FR2723254B1 (fr) | 1996-10-11 |
DE69500841T2 (de) | 1998-02-12 |
WO1996003765A1 (fr) | 1996-02-08 |
EP0720776B1 (fr) | 1997-10-08 |
US5785570A (en) | 1998-07-28 |
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