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Publication numberUS20010018242 A1
Publication typeApplication
Application numberUS 09/796,209
Publication dateAug 30, 2001
Filing dateFeb 28, 2001
Priority dateFeb 29, 2000
Also published asDE10010820C1, EP1129823A2, EP1129823A3, EP1129823B1, US6458712
Publication number09796209, 796209, US 2001/0018242 A1, US 2001/018242 A1, US 20010018242 A1, US 20010018242A1, US 2001018242 A1, US 2001018242A1, US-A1-20010018242, US-A1-2001018242, US2001/0018242A1, US2001/018242A1, US20010018242 A1, US20010018242A1, US2001018242 A1, US2001018242A1
InventorsHans Kramer, Matthias Taubert, Gernot Loibnegger
Original AssigneeHans Kramer, Matthias Taubert, Gernot Loibnegger
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Method for regenerating semiconductor wafers
US 20010018242 A1
Abstract
A process is described for recycling test wafers used for quality control or damaged wafers used in the context of chip production by regenerative removal of the previously applied layers. The method is based on the object of developing a cost-effective, environmentally friendly and time-saving regeneration method. The object is achieved by removing the applied layers by wet blasting using a specific blast material.
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Claims(9)
We claim:
1. A method for regenerating semiconductor wafers used in tests for process and equipment control purposes and for other semiconductor wafers having damaged surfaces, which comprises the steps of:
regenerating a wafer used in circuit fabrication by removing previously applied layers on the wafer, the previously applied layers being removed by wet blasting using a blast material finely distributed in water and having a predetermined and substantially uniform granularity.
2. The method according to
claim 1
, which comprises using a substance having a main constituent selected from the group consisting of silicon dioxide, corundum and mixtures of silicon dioxide and corundum as the blast material.
3. The method according to
claim 1
, which comprises setting the granularity of the blast material to be <100 μm.
4. The method according to
claim 1
, which comprises setting a water pressure of between 2-5 bar.
5. The method according to
claim 1
, which comprises setting a predetermined angle at which the wet blasting with the blast material impinges on a surface of the wafer.
6. The method according to
claim 5
, which comprises setting the predetermined angle at which the wet blasting with the blast material impinges on the surface of the wafer is between 60 and 90 degrees.
7. The method according to
claim 1
, which comprises subsequently subjecting the wafer that has been subjected to the wet blasting to a chemical mechanical polishing process to produce a surface quality required for applied processes in chip production.
8. The method according to
claim 1
, which comprises fine cleaning the wafer.
9. The method according to
claim 8
, which comprises carrying out the fine cleaning step using at least one substance selected from the group consisting of HF, SC1, and SC2.
Description
BACKGROUND OF THE INVENTION FIELD OF THE INVENTION

[0001] The invention relates to a method for regenerating semiconductor wafers which are used in tests for process and equipment control purposes or whose surfaces are damaged to a greater or lesser extent and which are usually composed of silicon. In the context of the fabrication of circuits on semiconductor wafers, the regeneration taking place by removal of the previously applied layers.

[0002] In chip production facilities for fabricating electronic circuits on semiconductor wafers that are preferably composed of silicon, not only the wafers on which the chip structures are produced but also a number of test wafers, usually composed of silicon, pass through the production sequence in order thus to make possible effective process and equipment control. On both wafers, thin layers composed of various materials are applied on the surface, which layers have to satisfy stringent requirements with regard to layer thickness, homogeneity, etc.

[0003] Since layer fabrication with patterning thereof is a very difficult and cost-intensive process, attempts are made to regenerate the test wafers, or alternatively severely damaged wafers, and to return them to the process sequence as test wafers.

[0004] It is known for silicon layers applied on semiconductor wafers to be processed by various chemical etching methods (see German Patent DE 196 24 315 C2 and Published, Non-Prosecuted German Patent Application DE 197 21 493 A1). On the one hand, the technique of chemical etching is predominantly used to eliminate unevennesses produced in the process of first obtaining the semiconductor wafer from a single-crystal rod (so-called damage). The technique is also used to pattern layers situated on the semiconductor wafer.

[0005] In addition to this method, the technique of so-called lapping is also used to eliminate relatively coarse unevennesses of a wafer (see German Patent DE 197 55 705). This involves a mechanical surface treatment in which the semiconductor wafers are processed with rotary movements and a supply of abrasives.

[0006] It is furthermore known for the aforementioned methods to be used in the recovery process of wafers used for test purposes. In the case of multilayer and patterned wafers, in particular, chemical etching is complicated and thus highly cost-intensive. Moreover, the required use of different etching solutions and the high water consumption result in a considerable burden on the environment. The lapping method has the disadvantage of being highly time-consuming.

SUMMARY OF THE INVENTION

[0007] It is accordingly an object of the invention to provide a method for regenerating semiconductor wafers which overcomes the above-mentioned disadvantages of the prior art methods of this general type, which is cost-effective, environmentally friendly and is less time-consuming.

[0008] With the foregoing and other objects in view there is provided, in accordance with the invention, a method for regenerating semiconductor wafers used in tests for process and equipment control purposes and for other semiconductor wafers having damaged surfaces. The method includes the step of regenerating a wafer used in circuit fabrication by removing previously applied layers on the wafer. The previously applied layers are removed by wet blasting using a blast material finely distributed in water and having a predetermined and substantially uniform granularity.

[0009] In the case of the method of the type mentioned in the introduction, the problem is solved by virtue of the fact that the applied layers are removed by wet blasting using a blast material which is finely distributed in water and has a predetermined and essentially uniform granularity.

[0010] Therefor, the applied layers can be removed cost-effectively because it is no longer necessary to use different etching solutions. At the same time, the burden on the environment is reduced by virtue of reduced pollutant quantities and lower water consumption.

[0011] One embodiment provides the use of a blast material predominantly containing silicon dioxide, corundum or mixtures thereof. These substances support the removal effect of the wet blasting on account of their nature which is particularly suitable for the method, in particular through their hardness.

[0012] A further embodiment of the invention provides for a blast material having a granularity <100 μm to be used. This ensures optimization of the removal effect with regard to the uniformity of the removal.

[0013] A particularly favorable embodiment provides for the wet blasting to impinge on the plates under a water pressure of between 2-5 bar. This ensures layer removal that is as accurately targeted as possible, under optimized time conditions.

[0014] A further embodiment of the invention provides for the wet blasting with the blast material to impinge on the surface at an angle of between 60 and 90 degrees. This also contributes to increased uniformity and target accuracy of the removal process.

[0015] In order to meet the surface quality of the semiconductor wafers which is required for applied chip production, a chemical mechanical polishing process and fine cleaning follow the wet blasting. The fine cleaning is carried out using HF, SC1, and SC2.

[0016] The method according to the invention is easy to realize and ensures fast and uniform layer removal.

[0017] Other features which are considered as characteristic for the invention are set forth in the appended claims.

[0018] Although the invention is described herein as embodied in a method for regenerating semiconductor wafers, it is nevertheless not intended to be limited to the description, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.

[0019] The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments.

DESCRIPTION OF THE PREFERRED EMBODIMENT

[0020] Coated semiconductor wafers or semiconductor wafers whose surfaces are damaged enter a method sequence starting with a visual quality inspection, which is followed by a thickness measurement. The wafer is rejected at a thickness >680 μm. If the parameters for continuing the method are satisfied, the actual regeneration of the wafers begins in such a way that the applied layers are removed by wet blasting using a blast material which is finely distributed in water and has a predetermined and essentially uniform granularity. In this case, blast material containing silicon dioxide, corundum or mixtures thereof and having a granularity <100 μm has proved to be particularly suitable. In this case, the wet blasting with the blast material impinge on the surface under a water pressure of between 2-5 bar and at an angle of between 60 and 90 degrees. The layers on the entire surface are removed by uniformly moving the semiconductor wafer under the blasting jet, or the blasting jet over the wafer.

[0021] The method step is repeated, if needed, after a further visual inspection. Provided that the semiconductor wafer is not rejected because predetermined parameters have not been met, the wafer is then subsequently polished, a removal of at least 3 μm being provided.

[0022] After the polishing, abrasive dust is removed (“brush clean”). This is followed by a further thickness measurement. In this case, rejection is envisaged at a thickness of less than 665 μm.

[0023] Finally, the semiconductor wafers are subjected to fine cleaning. The substances hydrofluoric acid, SC1 and SC2 are employed. The concluding defect density determination is crucial for sorting the wafers in the test wafer store.

Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US7544537 *Sep 27, 2006Jun 9, 2009Tdk CorporationSemiconductor IC-embedded substrate and method for manufacturing same
US7547975Jul 28, 2004Jun 16, 2009Tdk CorporationModule with embedded semiconductor IC and method of fabricating the module
US7868464Sep 15, 2005Jan 11, 2011Tdk CorporationMultilayer substrate and manufacturing method thereof
US8034718 *Feb 15, 2008Oct 11, 2011International Business Machines CorporationMethod to recover patterned semiconductor wafers for rework
US8347493 *Feb 11, 2009Jan 8, 2013Ibiden Co., Ltd.Wiring board with built-in electronic component and method of manufacturing same
US20090242255 *Feb 11, 2009Oct 1, 2009Ibiden Co., LtdWiring board with built-in electronic component and method of manufacturing same
US20120097184 *Oct 17, 2011Apr 26, 2012Ki Ho ParkMethod for recycling wafer
US20130217208 *Feb 21, 2012Aug 22, 2013Chih-hao ChenMethod of Processing Wafers for Saving Material and Protecting Environment
Classifications
U.S. Classification438/200, 257/E21.237, 257/E21.215
International ClassificationB24C3/32, H01L21/304, H01L21/306
Cooperative ClassificationB24C3/322, H01L21/02032
European ClassificationB24C3/32B, H01L21/02D2R
Legal Events
DateCodeEventDescription
Mar 27, 2014FPAYFee payment
Year of fee payment: 12
Mar 25, 2010FPAYFee payment
Year of fee payment: 8
Jan 13, 2010ASAssignment
Owner name: QIMONDA AG, GERMANY
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:INFINEON TECHNOLOGIES AG;REEL/FRAME:023828/0001
Effective date: 20060425
Mar 24, 2006FPAYFee payment
Year of fee payment: 4
Aug 20, 2002ASAssignment
Owner name: INFINEON TECHNOLOGIES AG, GERMANY
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:KRAMER, HANS;TAUBERT, MATTHIAS;LOIBNEGGER, GERNOT;REEL/FRAME:013215/0365;SIGNING DATES FROM 20010222 TO 20010226
Owner name: INFINEON TECHNOLOGIES AG ST.-MARTIN-STRASSE 53 PAT
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:KRAMER, HANS /AR;REEL/FRAME:013215/0365;SIGNING DATES FROM 20010222 TO 20010226