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Publication numberUS20010026964 A1
Publication typeApplication
Application numberUS 09/812,284
Publication dateOct 4, 2001
Filing dateMar 19, 2001
Priority dateDec 15, 1995
Also published asCN1146955C, CN1162188A, US5869363
Publication number09812284, 812284, US 2001/0026964 A1, US 2001/026964 A1, US 20010026964 A1, US 20010026964A1, US 2001026964 A1, US 2001026964A1, US-A1-20010026964, US-A1-2001026964, US2001/0026964A1, US2001/026964A1, US20010026964 A1, US20010026964A1, US2001026964 A1, US2001026964A1
InventorsShunpei Yamazaki, Satoshi Teramoto, Jun Koyama, Akiharu Miyanaga
Original AssigneeSemiconductor Energy Laboratory Co., Ltd.
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Method of manufacturing semiconductor device
US 20010026964 A1
Abstract
In a method of manufacturing a semiconductor device, a first heat treatment for crystallization is conducted after nickel elements are introduced in an amorphous silicon film. Then, after the crystalline silicon film is obtained, a heat treatment is again conducted through the heating method which is identical with the first heat treatment. In this state, HCl or the like is added to the atmosphere to conduct gettering of the nickel elements remaining in the crystalline silicon film. With this process, there can be obtained a crystalline silicon film low in the concentration of the metal elements and high in crystallinity.
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Claims(11)
What is claimed is:
1. A method of fabricating a semiconductor device, said method comprising the steps of:
forming an amorphous semiconductor film on an insulating surface;
introducing a metal material being capable of promoting crystallization of the amorphous semiconductor film;
performing a first heat treatment to crystallize the amorphous semiconductor film at a first temperature;
performing a second heat treatment at a second temperature higher than the first temperature in an atmosphere comprising argon,
wherein the second temperature is in a range of 450-1050° C.,
wherein the crystallized semiconductor film after the second heat treatment includes the metal material at a concentration in a range of 3×1017 cm−3 or less.
2. A method according to
claim 1
,
wherein the crystallized semiconductor film after the second heat treatment has a spin density in a range of 3×1017 cm−3 or less.
3. A method according to
claim 1
,
wherein the atmosphere in the second heat treatment further comprises a halogen element including at least a material selected from the group consisting of HCl, HF, HBr, Cl2, F2, and Br2.
4. A method according to
claim 1
,
wherein the metal material is one selected from Fe, Co, Ni, Ru, Rh, Pd, Os, Ir, Pt, Cu and Au.
5. A method according to
claim 1
,
wherein the semiconductor device is one selected from the group consisting of a liquid crystal display device, an EL display device, and a thin film integrated circuit.
6. A method of fabricating a semiconductor device, said method comprising the steps of:
forming an amorphous semiconductor film on an insulating surface;
introducing a metal material being capable of promoting crystallization of the amorphous semiconductor film;
performing a first heat treatment to crystallize the amorphous semiconductor film at a first temperature;
performing a second heat treatment at a second temperature higher than the first temperature in an atmosphere comprising argon;
irradiating the crystallized semiconductor film with a light after the second heat treatment,
wherein the second temperature is in a range of 450-1050° C.,
wherein the crystallized semiconductor film after the second heat treatment includes the metal material at a concentration in a range of 3×1017 cm−3 or less.
7. A method according to
claim 6
,
wherein the crystallized semiconductor film after the second heat treatment has a spin density in a range of 3×1017 cm−3 or less.
8. A method according to
claim 6
,
wherein the atmosphere in the second heat treatment further comprises a halogen element including at least a material selected from the group consisting of HCl, HF, HBr, Cl2, F2, and Br2.
9. A method according to
claim 6
,
wherein the metal material is one selected from Fe, Co, Ni, Ru, Rh, Pd, Os, Ir, Pt, Cu and Au.
10. A method according to
claim 6
,
wherein the semiconductor device is one selected from the group consisting of a liquid crystal display device, an EL display device, and a thin film integrated circuit.
11. A method according to
claim 6
, wherein the light is a laser light.
Description
BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention relates to a method of manufacturing a semiconductor device represented by a thin-film transistor. More particularly, the present invention relates to a method of manufacturing a semiconductor device using a silicon thin film having crystallinity which is formed on a glass substrate or a quartz substrate.

[0003] 2. Description of the Related Art

[0004] Up to now, there have been known thin-film transistors using a silicon film. The thin-film transistor is structured using a silicon film (several hundreds to several thousands Å in thickness) formed on a glass substrate or a quartz substrate.

[0005] The reason why the glass substrate or the quartz substrate is used is to employ the thin-film transistor for an active matrix liquid-crystal display unit.

[0006] Under existing circumstances, in the case of using the glass substrate, a general technique is that the thin-film transistor is formed using the amorphous silicon film. In the case of using the quartz substrate, a technique in which the crystalline silicon film obtained through a heat treatment is used has been put to practical use.

[0007] Compared with the thin-film transistor using the amorphous silicon film, the thin-film transistor using a crystalline silicon film enables high-speed operation of two digits or more to be performed. Hence, a peripheral drive circuit of the active matrix liquid-crystal display unit, which has been conventionally made up of an IC circuit externally attached hereto can be formed of a thin-film transistor on the glass substrate or the quartz substrate.

[0008] The above structure is very advantageous in the downsizing of the overall device or simplification of a manufacturing process. Also, the structure leads to reduction of the manufacturing costs.

[0009] As a technique by which a crystalline silicon film is obtained through a heating treatment, there has been known a technique disclosed in Japanese Patent Unexamined Publication No. Hei 6-232069. According to the technique, a metal element (for example, nickel) that promotes the crystallization of silicon is introduced into an amorphous silicon film so that the crystalline silicon film is obtained through a heat treatment at a lower temperature than a conventional one.

[0010] Using that technique, an inexpensive glass substrate as can be used as a substrate, and the crystalline silicon film as obtained can provide crystallinity which can be practically used over a wide area.

[0011] However, because the metal element is contained in the film and the control of its introduced amount is subtle, it is proved that there arise problems on the reproducibility and the stability (electric stability of the obtained device).

SUMMARY OF THE INVENTION

[0012] The present invention has been made in view of the above circumstances, and therefore an object of the present invention is to provide a technique by which the concentration of metal elements in a crystalline silicon film obtained by using metal elements that promote the crystallization of silicon is lowered.

[0013] In order to solve the above problem, according to one aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of: intentionally introducing metal elements that promote crystallization of silicon in an amorphous silicon film to crystalize said amorphous silicon film through a first heat treatment; and conducting a second heat treatment in an atmosphere containing halogen elements therein to intentionally remove said metal elements; wherein said first heat treatment and said second heat treatment are conducted by identical heating means.

[0014] In the above method, it is important that the first heat treatment and the second heat treatment are conducted by the identical heating means. This is because in the case where the first heat treatment for diffusing the metal elements in the silicon film to conduct crystallization and the second heat treatment for removing the metal elements diffused in the silicon film are conducted through an identical method, the removal of the metal elements is carried out more effectively.

[0015] For example, in the case of using nickel as the metal elements, conducting the first heat treatment through a heating by a heater, and conducting the second heat treatment through heating by an infrared ray lamp (RTA: rapid thermal annealing), it is proved that the effect of removing nickel from the silicon film is lower than that in the case of using the heater in both of the heating methods.

[0016] According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of: holding metal elements that promote crystallization of silicon in contact with a front surface or a rear surface of an amorphous silicon film; conducting a first heat treatment on said amorphous silicon film to crystallize at least a part of said amorphous silicon film; and conducting a second heat treatment in an atmosphere containing halogen elements on the silicon film to intentionally remove said metal elements, wherein the first heat treatment and the second heat treatment are conducted by the identical heating means.

[0017] As metal elements that promote crystallization of silicon, there can be used one kind or a plurality of kinds selected from Fe, Co, Ni, Ru, Rh, Pd, Os, Ir, Pt, Cu and Au.

[0018] In particular, the use of Ni (nickel) is most preferable from the viewpoint of its effect and reproducibility.

[0019] As an atmosphere containing halogen elements therein, there can be used one kind of gas or a plurality of kinds of gases selected from HCl, HF, HBr, Cl2, F2 and Br2 being added to the atmosphere containing one kind of gas or a plurality of gases selected from Ar, N2, He and Ne. In this example, halogen elements function to remove the metal elements.

[0020] Also, as an atmosphere containing halogen elements therein, there can be used oxygen and one kind of gas or a plurality of kinds of gases selected from HC;, HF, HBr, Cl2, F2 and Br2 being added to the atmosphere containing one kind of gas or a plurality of gases selected from Ar, N2, He and Ne.

[0021] Oxygen has a function to suppress the surface of the silicon film from being roughened by action of halogen elements since oxygen forms the oxide film on the surface of the silicon film simultaneously during the process of removing the metal elements.

[0022] The heat treatment for removing the metal elements can be conducted at a temperature of 450 to 1050° C.

[0023] With intentional introduction of the metal elements represented by nickel, the amorphous silicon film is crystallized through the first heat treatment. Then, the second heat treatment is conducted in the atmosphere containing halogen elements, to thereby remove the metal elements intentionally introduced from the film. In this situation, the first heat treatment and the second heat treatment may be conducted by the identical means.

[0024] The above and other objects and features of the present invention will be more apparent from the following description taken in conjunction with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

[0025]FIGS. 1A to 1D are diagrams showing a process of obtaining a crystalline silicon film;

[0026]FIGS. 2A to 2D are diagrams showing a process of obtaining a crystalline silicon film;

[0027]FIGS. 3A to 3E are diagrams showing a process of manufacturing a thin-film transistor;

[0028]FIGS. 4A to 4E are diagrams showing a process of manufacturing a thin-film transistor; and

[0029]FIGS. 5A to 5F are diagrams showing a process of manufacturing a thin-film transistor.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0030] Now, a description will be given of preferred embodiments of the present invention with reference to the accompanying drawings.

[0031] (First Embodiment)

[0032] A first embodiment of the present invention exhibits a technique in which a crystalline silicon film is formed on a glass substrate using nickel elements.

[0033]FIGS. 1A to 1D show a manufacturing process in accordance with this embodiment of the present invention. First, a silicon oxynitride film 102 is formed in thickness of 3000 Å on a Corning 1737 glass substrate (strain point of 667° C.) 101 as an under layer.

[0034] The formation of the silicon oxynitride film is conducted through the plasma CVD method using silane, N2O gas and oxygen as a raw gas. Alternatively, the formation is conducted through the plasma CVD method using TEOS gas and N2O gas.

[0035] The silicon oxynitride film functions to prevent impurities (the glass substrate contains a large amount of impurities from the viewpoint of a level in manufacturing a semiconductor device) from being diffused from the glass substrate during the post-process.

[0036] It should be noted that a silicon nitride film is optimum in obtaining that function at maximum. However, since the silicon nitride is separated from the glass substrate due to a stress, it is not practically used. Also, a silicon oxide film may be used as the under film. However, the silicon oxide film has an insufficient barrier effect with respect to the impurities in comparison with the silicon oxynitride film.

[0037] It is important that the under layer has the hardness as high as possible. This is concluded from the fact that in the endurance test of the thin-film transistor as finally obtained, the harder under layer (that is, the under layer smaller in its etching rate) is higher in reliability. Also, it is presumed from that conclusion that the hardness of the under film is relevant to the prevention of the impurities' entering from the glass substrate.

[0038] Then, an amorphous silicon film 103 which will be formed into a crystalline silicon film is formed in thickness of 500 Å through the low pressure thermal CVD method. The reason why the low pressure thermal CVD method is used is that the quality of the crystalline silicon film which will be obtained later is excellent. It should be noted that the plasma CVD method can be used as a method other than the low pressure thermal CVD method.

[0039] It is preferable that the thickness of the amorphous silicon film 103 is set to 2000 Å or less. This is because in a stage where metal elements that promote the crystallization of silicon are removed, if its thickness is set to 2000 Å or more, its removal becomes difficult.

[0040] Also, the lower limit of the thickness of the amorphous silicon film 103 is determined by how thin the film can be formed in the film formation. In general, about 100 to 200 Å is its lower limit.

[0041] Also, it is important that the impurities are prevented from mixedly entering the film with the greatest care. Specifically, it is important that attention is paid to the purity of gas used for forming a film and cleaning of the device. In the above manner, a state shown in FIG. 1A is obtained.

[0042] Subsequently, a nickel acetate solution containing nickel elements therein of 10 ppm (weight conversion) is coated on the surface of the amorphous silicon film 103.

[0043] Specifically, as shown in FIG. 1B, a water film 104 of the nickel acetate solution is formed on the surface of the amorphous silicon film 103. Then, an excessive solution of the nickel acetate solution is blown off using a spin coater. That is, spin drying is conducted.

[0044] With the above process, there is obtained a state in which the nickel elements are held in contact with the surface of the amorphous silicon film 103.

[0045] It should be noted that from the viewpoint of the remaining impurities in the following heating process, it is preferable to use nickel sulfate instead of nickel acetate solution. This is because nickel acetate solution contains carbon, and the carbon may be carbonized during the subsequent heating process and remain in the film.

[0046] The adjustment of the amount of introduced nickel elements can be conducted by adjusting the concentration of the nickel elements in the solution. Also, the amount of introduced nickel elements can be controlled in accordance with a condition under which spin drying is conducted and a holding time of the solution on the amorphous silicon film 103.

[0047] Then, in a state shown in FIG. 1C, a heat treatment is conducted at a temperature of 450 to 650° C. to crystallize the amorphous silicon film 103.

[0048] In this step, the heat treatment is conducted at 600° C. in the nitrogen atmosphere for four hours. As a result of this process, a crystalline silicon film 105 is obtained.

[0049] It is important that the upper limit of heating temperature in the heat treatment is determined in accordance with the heat resistance of the substrate to be used. In this embodiment, since the Corning 1737 glass substrate whose strain point is 667° C. is used, the condition of the heating temperature is about 650° C. Also, it is proved by experiments that the heating temperature of 450° C. or higher is required for crystallization.

[0050] Furthermore, in the case of using a quartz substrate or another material high in heat resistance as a substrate, the heating temperature for the above crystallization can be further increased. For example, in the case of using the quartz substrate, the heating temperature can be increased up to about 1000° C.

[0051] The increase in the temperature leads to such advantages that a period required for the heat treatment can be shortened, and also higher crystallinity can be obtained.

[0052] In the above crystallization process, the nickel elements which have been held in contact with the surface of the amorphous silicon film 103 are dispersed in the film. Then, this largely contributes to the crystallization of the amorphous silicon film 103.

[0053] Subsequently, as shown in FIG. 1D, a heat process for removing the nickel elements that have remained in the crystalline silicon film 105 and have been used for crystallization is conducted. The heat treatment is conducted at a temperature of 600° C. in the nitrogen atmosphere containing halogen elements.

[0054] In this example, the heat treatment is conducted at 600° C. for 10 minutes in the atmosphere where 3% of HCl is added to the nitrogen atmosphere.

[0055] The concentration of HCl in the atmosphere is preferably set to 1 to 10%. If the concentration is set to a value more than that range, attention must be paid because the surface of the silicon film is roughened. If the concentration is set to a value less than that range, the gettering effect is lowered.

[0056] Further, it is effective to add oxygen to the atmosphere under which the above heat treatment is conducted. In this case, the rough surface of the silicon film due to the halogen elements is flattened by the formation of the oxide film. The amount of addition of oxygen may be adjusted so that the concentration of oxygen in the atmosphere becomes 20 to 50%.

[0057] Also, the lower limit of the above heat treatment temperature is preferably set to 450° C. or higher from the viewpoint of its effect and reproducibility. Also, it is important that its upper limit is set to the strain point of the glass substrate 101 to be used or less.

[0058] Hence, the use of the quartz substrate enables the heating temperature to further increase up to about 1000° C. In this case, the effect of removing the nickel elements can be further enhanced. Also, the processing period can be shortened.

[0059] However, since the etching effect on the silicon film is remarkable, it is required that the concentration of the halogen elements is lowered, and that oxygen is added thereto.

[0060] A gas which is generally called “inactive gas” can be used other than the nitrogen atmosphere. In particular, one kind or a plurality of gases selected from Ar, He and Ne can be used.

[0061] As a gas for introducing the halogen elements, one kind or a plurality of gases selected from HF, HBr, Cl2, F2, Br2, and NF3, ClF3 can be used other than HCl. It is preferable that the content (volume content) of the gas in the atmosphere are set to 0.3 to 10% if it is HF, 1 to 20% if it is HBr, 0.3 to 5% if it is Cl2, 1 to 3% if it is F2, and 0.3 to 10% if it is Br2.

[0062] By the heat treatment which has been again conducted in the above atmosphere containing the halogen elements as described above, the concentration of the nickel elements can be set to {fraction (1/10)} of an initial concentration, or less. This means that the nickel elements can be set to {fraction (1/10)} or less in comparison with a case in which gettering due to the halogen elements is not conducted. The effect is obtained similarly in the case of using other metal elements.

[0063] For example, in the crystalline silicon film which has been crystallized through the heat treatment in the nitrogen atmosphere using the nickel elements, the nickel elements have been observed at a concentration of about 1×1019 to 5×1019 cm−3 through the measurement of SIMS (secondary ion mass spectrometry).

[0064] On the contrary, in the case of applying this embodiment, the concentration of detected nickel is about 1×1018 to 5×1018 cm−3. Of course, it is presumed that the condition under which nickel is introduced is identical.

[0065] It should be noted that in this embodiment, there is shown an example in which solution is used to introduce nickel elements from the viewpoints of the excellent controllability and simpleness. However, there may be used a method of forming nickel or a film containing nickel through the CVD method or the sputtering method. Also, there may be used a method of holding the nickel elements in contact with surface of the amorphous silicon film through the adsorption method.

[0066] Likewise, this is applied to a case of using other metal elements that promote the crystallization of silicon.

[0067] (Second Embodiment)

[0068] A second embodiment of the present invention relates to an example of conducting the crystal growth different in form from the first embodiment. This embodiment relates to a method of conducting crystal growth in a direction parallel to a substrate, which is called “lateral growth”, using metal elements that promote the crystallization of silicon.

[0069]FIGS. 2A to 2D show a manufacturing process in accordance with this embodiment. First, a silicon oxynitride film 202 is formed in thickness of 3000 Å on a Corning 1737 glass substrate (it may be a quartz substrate) as an under layer.

[0070] An amorphous silicon film 203 is formed in thickness of 500 Å through the low pressure thermal CVD method.

[0071] Then, a silicon oxide film not shown is formed in thickness of 1500 Å, and then patterned to form a mask indicated by reference numeral 204. An opening is formed on the mask in a region indicated by 205, and the amorphous silicon film 203 which is an under layer is exposed at that region.

[0072] The opening 205 has a slender rectangle which extend longitudinally depthwise of the drawing. The width of the opening 205 may be set to 20 μm or more. The length in the longitudinal direction may be arbitrarily determined.

[0073] The nickel acetate solution containing the nickel elements of 10 ppm in weight conversion shown in the first embodiment is coated thereon. Then, an excessive solution is blown off using a spin coater.

[0074] In the above manner, as indicated by a dotted line 206, the nickel elements are held in contact with the exposed surface of the amorphous silicon film 203 and the surface of the mask 204 which is the silicon oxide film (FIG. 2A).

[0075] Subsequently, a heat treatment is conducted at 600° C. for 4 hours in the nitrogen atmosphere containing no oxygen as much as possible. With this process, crystal growth in parallel with the substrate is progressed as indicated by reference numeral 207 in FIG. 2B. The crystal growth is progressed from the region of the opening 205 into which the nickel elements have been introduced toward the periphery. The crystal growth directed in parallel with the substrate is called “lateral growth”.

[0076] The lateral growth can be conducted over 100 μm or more. A silicon film 208 thus having the lateral region is obtained (FIG. 2B).

[0077] Then, the mask 204 which is the silicon oxide film for selectively introducing the nickel elements is removed to obtain a state shown in FIG. 2C. In this state, the lateral growth region and a region (having an amorphous silicon state) which is not subjected to crystal growth exist in the silicon film 208.

[0078] Then, in this state, a heating treatment is conducted at 600° C. for 10 minutes in the atmosphere comprising 5% of HCl, 5% of oxygen and 90% of nitrogen.

[0079] With this process, as described in the first embodiment, the concentration of the nickel elements in the film can be reduced.

[0080] Subsequently, a pattern 209 which is the lateral growth region is formed by patterning. In this example, it is important that the pattern 209 is designed such that a start point and an end point of the crystal growth do not exist in the pattern 209.

[0081] This is because the nickel elements of a relatively high concentration are contained in the start point and the end point of the crystal growth.

[0082] The concentration of the nickel elements remaining in the pattern 209 thus obtained which is the lateral growth region can be set to be further lower compared with the case of the first embodiment.

[0083] This is also because the concentration of the metal elements contained in the lateral growth region is originally low. Specifically, the concentration of the nickel elements in the pattern 209 which is the lateral growth region can be set to the order of 1017 cm−3.

[0084] Also, the device is designed in such a manner that the lateral growth direction and the carrier moving direction are substantially identical with each other, thereby being capable of obtaining the device having a higher mobility compared with the case of using the crystal growth method shown in the first embodiment.

[0085] (Third Embodiment)

[0086] A third embodiment of the present invention exhibits an example of manufacturing a thin-film transistor disposed in a pixel region of an active matrix type liquid-crystal display unit or an active matrix type EL display unit.

[0087]FIGS. 3A to 3E show a manufacturing process in accordance with this embodiment. First, a crystalline silicon film is formed on a glass substrate through the process shown in the first embodiment or the second embodiment. Then, the crystalline silicon film is patterned to obtain a state shown in FIG. 3A.

[0088] In the state shown in FIG. 3A, reference numeral 301 denotes a glass substrate; 302, an under film; and 303, an active layer formed of a crystalline silicon film. In this example, it is preferable that the under film is formed of a silicon oxynitride film. Also, it is desirable that halogen elements are contained in the silicon oxynitride film. This is because the gettering operation of the metal ions and movable ions due to halogen elements is used.

[0089] After the state shown in FIG. 3A is obtained, a silicon oxynitride film 304 forming a gate insulation film is formed in thickness of 1000 Å. The film forming method is plasma CVD method using a mixture gas consisting of oxygen, silane and N2O, or plasma CVD method using a mixture gas consisting of TEOS and N2O.

[0090] Also, that the halogen elements are contained in the silicon oxynitride film is useful in prevention of the function of the gate insulation film as an insulation film from being deteriorated by the influence of the nickel elements (other metal elements that promote the crystallization of silicon) which exist in the active layer.

[0091] The formation of the silicon oxynitride film has significance in that the metal elements are hard to enter in the gate insulation film due to its fine quality of the film. If the metal elements enter in the gate insulation film, its function as the insulation film is deteriorated, causing the instability and the dispersion of the characteristics of the thin-film transistor.

[0092] It should be noted that a silicon oxynitride film normally used can be used for the gate insulation film.

[0093] After the silicon oxynitride film 304 that functions as the gate insulation film has been formed, an aluminum film (not shown) which will function as a gate electrode later is formed through the sputtering method. 0.2 wt % of scandium is contained in the aluminum film.

[0094] The reason why 0.2 wt % of scandium is contained in the aluminum film is to suppress occurring of hillock or whisker in the subsequent process. Hillock and whisker are directed to a needle-like projection generated by heating. It is considered that the hillock and the whisker are caused by the abnormal growth of aluminum.

[0095] After the formation of the aluminum film, a dense anodic oxide film not shown is formed. The anodic oxide film is formed using an ethylene glycol solution containing tartaric acid of 3% as an electrolyte solution.

[0096] The anodic oxidization is conducted with the aluminum film as an anode and platinum as a cathode in the electrolyte solution, to thereby form the dense anodic oxide film on the surface of the aluminum film.

[0097] The thickness of the dense anodic oxide film not shown is set to about 100 Å. The anodic oxide film serves to improve the adhesion to a resist mask which will be formed later.

[0098] It should be noted that the thickness of the anodic oxide film can be controlled by a supply voltage when anodic oxidizing.

[0099] Thereafter, a resist mask 306 is formed. Then, an aluminum film 305 is patterned in a pattern indicated by reference numeral 305. In this way, a state shown in FIG. 3B is obtained.

[0100] In this situation, anodic oxidization is again conducted. In this example, an oxalic acid aqueous solution of 3% is used as the electrolyte solution. Anodic oxidization is conducted with the pattern 305 of aluminum as the anode in the electrolyte solution, to thereby form a porous anodic oxide film indicated by reference numeral 308.

[0101] In this process, because the resist mask 306 high in adhesion exists in the upper portion, an anodic oxide film 308 is selectively formed on the side surfaces of the aluminum pattern.

[0102] The anodic oxide film 308 can grow up to several μm in thickness. In this example, its thickness is set to 6000 Å. It should be noted that the growth distance can be controlled by anodic oxidation period.

[0103] Then, a dense anodic oxide film is again formed. In other words, using the above-mentioned ethylene glycol solution containing 3% of tartaric acid as an electrolyte solution, anodic oxidization is again conducted. As a result, because the electrolyte solution enters in the porous anodic oxide film 308, a dense anodic oxide film as indicated by reference numeral 309 is formed. The thickness of the dense anodic oxidation film 309 is set to 1000 Å (FIG. 3C).

[0104] In this example, the exposed portion of the silicon oxynitride film 304 is etched. It is useful to utilize the dry etching as that etching. Further, the porous anodic oxide film 308 is removed by a mixture acid consisting of acetic acid, nitric acid and phosphoric acid. In this way, a state shown in FIG. 3D is obtained.

[0105] After the state shown in FIG. 3D is obtained, the implantation of impurity ions is conducted. In this example, in order to manufacture the n-channel type thin-film transistor, the implantation of P (phosphorus) ions is conducted through the plasma doping method.

[0106] In this process, heavy doped regions 311 and 315 and light doped regions 312 and 314 are formed, respectively. This is because a part of the remaining silicon oxynitride film 310 functions as a translucent mask, and a part of implanted ions is shielded there.

[0107] Thereafter, a laser beam or an intense light is irradiated thereon, to thereby activate a region in which the impurity ions have been implanted. In this way, a source region 311, a channel formation region 313, a drain region 315, and low-density impurity regions 312 and 314 are formed in a self-alignment manner.

[0108] In this example, what is indicated by reference numeral 314 is a region which is called “LDD (light doped drain) (FIG. 3D).

[0109] It should be noted that in the case where the thickness of the dense anodic oxide film 309 is thickened to 2000 Å or more, the thickness allows an offset gate region to be formed outside of the channel formation region 313.

[0110] Similarly, in this embodiment, although the offset gate region is formed, since its dimensions are small so that the contribution of the offset gate region is small, and in order to avoid complicating the drawing, it is not shown in the figure.

[0111] Thereafter, a silicon oxide film, a silicon nitride film or a laminate film thereof is formed as an interlayer insulation film 316. The interlayer insulation film 316 may be constituted by a layer made of a resin material on the silicon oxide film or the silicon nitride film.

[0112] Then, contact holes are defined to form a source electrode 317 and a drain electrode 318. In this way, a thin-film transistor shown in FIG. 3E is completed.

[0113] (Fourth Embodiment)

[0114] A fourth embodiment of the present invention relates to a method of forming a gate insulation film 304 in the structure shown in the third embodiment. In the case of using a quartz substrate or a glass substrate high in heat resistance, it is preferable that the thermal oxidation method is used as a method of forming the gate insulation film.

[0115] Since the oxide film formed through the thermal oxidation method is fine (dense) as the insulation film and does not contain charges internally movable therein, it is one of optimum gate insulation films.

[0116] As a method of forming the thermal oxide film, there can be recited an example of processing in the oxide atmosphere at a temperature of 950° C.

[0117] In this situation, it is effective to mix HCl or the like in the oxide atmosphere. With this process, the metal elements that exist in the active layer can be removed while the thermal oxide film is being formed.

[0118] Also, it is effective that N2O gas is mixed in the oxide atmosphere to form a thermal oxide film containing a nitrogen component. In this example, if the mixture ratio of the N2O gas is optimized, a silicon oxynitride film can be obtained through the thermal oxide method.

[0119] In this example, there is shown an example in which the gate insulation film is formed through the thermal oxidation method. However, as another method, the gate insulation film can be formed through the thermal CVD method. Similarly in this case, it is effective that nitrogen component is contained using N2O and ammonium.

[0120] (Fifth Embodiment)

[0121] A fifth embodiment of the present invention shows an example in which a thin-film transistor is manufactured in a process different from that shown in FIGS. 3A to 3E.

[0122]FIGS. 4A to 4E show a manufacturing process in accordance with this embodiment. First, a crystalline silicon film is formed on a glass substrate through a process shown in the first embodiment or the second embodiment. Then, it is patterned to obtain a state shown in FIG. 4A.

[0123] In the state shown in FIG. 4A, reference numeral 401 denotes a glass substrate; 402, an under film; and 403, an active layer which is made up of a crystalline silicon film. In this example, it is preferable that the under layer 402 is formed of a silicon oxynitride film.

[0124] After the state shown in FIG. 4A is obtained, the silicon oxynitride film 404 forming a gate insulation film is formed in thickness of 1000 Å. The film forming method is the plasma CVD method using a mixture gas consisting of oxygen, silane and N2O, or the plasma CVD method using a mixture gas consisting of TEOS and N2O.

[0125] It should be noted that a silicon oxide film normally used can be used for the gate insulation film.

[0126] After the silicon oxynitride film 404 that functions as the gate insulation film has been formed, an aluminum film (not shown) which will function as a gate electrode later is formed through the sputtering method. 0.2 wt % of scandium is contained in the aluminum film.

[0127] After the formation of the aluminum film, a dense anodic oxide film not shown is formed. The anodic oxide film is formed using an ethylene glycol solution containing 3% of tartaric acid as an electrolyte solution. That is, the anodic oxidization is conducted with the aluminum film as an anode and platinum as a cathode in the electrolyte solution, to thereby form the dense anodic oxide film on the surface of the aluminum film.

[0128] The thickness of the dense anodic oxide film not shown is set to about 100 Å. The anodic oxide film serves to improve the adhesion to a resist mask which will be formed later.

[0129] It should be noted that the thickness of the anodic oxide film can be controlled by a supply voltage when anodic oxidizing.

[0130] Thereafter, a resist mask 405 is formed. Then, an aluminum film is patterned in a pattern indicated by reference numeral 406.

[0131] In this situation, anodic oxidization is again conducted. In this example, an oxalic acid aqueous solution of 3% is used as the electrolyte solution. Anodic oxidization is conducted with the pattern 406 of aluminum as the anode in the electrolyte solution, to thereby form a porous anodic oxide film indicated by reference numeral 407.

[0132] In this process, because the resist mask 405 high in adhesion exists in the upper portion, an anodic oxide film 407 is selectively formed on the side surfaces of the aluminum pattern 406.

[0133] The anodic oxide film 407 can grow up to several μm in thickness. In this example, its thickness is set to 6000 Å. It should be noted that the growth distance can be controlled by anodic oxidation period.

[0134] In this way, a state shown in FIG. 4B is obtained. Then, a dense anodic oxide film is again formed. In other words, using the above-mentioned ethylene glycol solution containing 3% of tartaric acid as an electrolyte solution, anodic oxidization is again conducted. As a result, because the electrolyte solution enters in the porous anodic oxide film 407, a dense anodic oxide film as indicated by reference numeral 408 is formed (FIG. 4C).

[0135] In the state shown in FIG. 4C, the implantation of impurity ions is first conducted. This process may be conducted after the removal of the resist mask 405.

[0136] A source region 409 and a drain region 411 are formed through the implantation of the impurity ions. Also, no impurity ions are implanted in a region 410.

[0137] Subsequently, the porous anodic oxide film 407 is removed by a mixture acid consisting of acetic acid, nitric acid and phosphoric acid. In this way, a state shown in FIG. 4D is obtained.

[0138] After the state shown in FIG. 4D is obtained, the implantation of impurity ions is again conducted. The impurity ions are implanted under the condition of the light doping from the condition of the initial impurity ion implantation.

[0139] In this process, light doped regions 412 and 413 are formed, and then a channel formation region indicated by reference numeral 414 is formed (FIG. 4D).

[0140] Thereafter, a laser beam or an intense light is irradiated thereon, to thereby activate a region in which the impurity ions have been implanted. In this way, a source region 409, a channel formation region 410, a drain region 411, and low-density impurity regions 412 and 413 are formed in a self-alignment manner.

[0141] In this example, what is indicated by reference numeral 413 is a region which is called “LDD (light doped drain) (FIG. 4D).

[0142] Thereafter, a silicon oxide film, a silicon nitride film or a laminate film thereof is formed as an interlayer insulation film 415. The interlayer insulation film 415 is constituted by a layer made of a resin material on the silicon oxide film or the silicon nitride film.

[0143] Then, contact holes are defined to form a source electrode 416 and a drain electrode 417. In this way, a thin-film transistor shown in FIG. 4E is completed.

[0144] (Sixth Embodiment)

[0145] A sixth embodiment of the present invention relates to an example in which an n-channel type thin-film transistor and a p-channel type thin-film transistor are of a complementary type.

[0146] The structure of this embodiment can be used, for example, for a variety of thin-film integrated circuits which are integrated on an insulation surface. Also, it can be used, for example, for a peripheral drive circuit of an active matrix liquid-crystal display unit.

[0147] First, a silicon oxide film or a silicon oxynitride film are formed on a glass substrate 501 as an under layer 502 as shown in FIG. 5A. Preferably, the silicon oxynitride film is used.

[0148] Further, an amorphous silicon film not shown is formed through the plasma CVD method or the low pressure thermal CVD method. Further, the amorphous silicon film is formed into a crystalline silicon film through the method described in the first embodiment or the second embodiment.

[0149] Then, a crystalline silicon film thus obtained is patterned to obtain active layers 503 and 504. In this manner, a state shown in FIG. 5A is obtained.

[0150] Further, a silicon oxynitride film 505 that forms a gate insulation film is formed. In this process, if quartz is used for a substrate, it is preferable to use the above-described thermal oxidation method (FIG. 5A).

[0151] An aluminum film (not shown) for constituting a gate electrode later is formed in thickness of 4000 Å. An anodizable metal (for example, tantalum) can be used except for the aluminum film.

[0152] After the formation of the aluminum film, a very-thin dense anodic oxide film is formed on the aluminum film through the above-mentioned method.

[0153] Subsequently, a resist mask not shown is arranged on the aluminum film, and the aluminum film is patterned. Then, anodic oxidization is conducted with the aluminum pattern thus obtained as an anode, to form porous anodic oxide films 508 and 509. The thickness of the porous anodic oxide films 508 and 509 is set to 5000 Å.

[0154] Further, anodic oxidization is again conducted on the condition that a dense anodic oxide film is formed, to form dense anodic films 510 and 511 thereby. The thickness of the anodic oxide films 510 and 511 is set to 800 Å. In this way, a state shown in FIG. 5B is obtained.

[0155] Furthermore, the exposed silicon oxide film 505 is removed by dry etching to obtain gate insulation films 512 and 513 as shown in FIG. 5C.

[0156] After the formation shown in FIG. 5C is obtained, the porous anodic oxide films 508 and 509 are removed by a mixture acid consisting of acetic acid, nitric acid and phosphoric acid. In this way, a state shown in FIG. 5D is obtained.

[0157] In this situation, the resist mask is alternately disposed in such a manner that P ions are implanted in the left-sided thin-film transistor whereas B ions are implanted in the right-sided thin-film transistor.

[0158] A source region 514 and a drain region 517 each having n-type with a high concentration are formed in a self-alignment manner.

[0159] Also, a region 515 having weak n-type where P ions are doped at a low density is formed simultaneously.

[0160] The reason why the region having the weak n-type indicated by reference numeral 515 is formed is that the remaining gate insulation film 512 exists. In other words, the P ions that have transmitted the gate insulation film 512 is partially shielded by the gate insulation film 512.

[0161] Also, with the same principle, a source region 521 and a drain region 518 each having a strong p-type are formed in a self-alignment manner. Also, a low-density impurity region 520 is formed simultaneously. Furthermore, a channel formation region 519 is formed simultaneously.

[0162] It should be noted that in the case where the dense anodic oxide films 510 and 511 are thickened to the degree of 2000 Å, offset gate regions can be formed in contact with the channel formation regions 516 and 519 by virtue of the thickness.

[0163] In this embodiment, since the dense anodic oxide films 510 and 511 are thinned to the thickness of 1000 Å or less, the existence of those films 510 and 511 can be ignored.

[0164] Then, a laser beam or an intense light is irradiated thereon to anneal a region in which the impurity ions have been implanted.

[0165] Thereafter, as shown in FIG. 5E, a silicon nitride film 522 and a silicon oxide film 523 are formed as an interlayer insulation film as shown in FIG. 5E. The thickness of the respective films 522 and 523 is set to 1000 Å. It should be noted that the silicon oxide film 523 may not be formed.

[0166] In this example, the thin-film transistor is covered with the silicon nitride film 522. Since the silicon nitride film is dense and has an excellent interface characteristic, this structure enables the reliability of the thin-film transistor to be enhanced.

[0167] Further, an interlayer insulation film 524 made of a resin material is formed through the spin coating method. In this example, the thickness of the interlayer insulation film 524 is set to 1 μm at the minimum (FIG. 5E).

[0168] Then, contact holes are defined to form a source electrode 525 and a drain electrode 526 of the left-sided n-channel type thin-film transistor. Also, a source electrode 527 and a drain electrode 526 of the right-sided thin-film transistor are formed. In this example, the drain electrode 526 is commonly arranged.

[0169] In the above manner, the thin-film transistor circuit having a complementary type CMOS structure can be structured.

[0170] In the structure of this embodiment, the thin-film transistor is covered with a nitride film and also with a resin material. This structure enables the durability to be enhanced which makes the entrance of movable ions and moisture hard.

[0171] (Seventh Embodiment)

[0172] A seventh embodiment of the present invention relates to a structure in which a laser beam is further irradiated on the crystalline silicon film obtained by the first embodiment or the second embodiment, to thereby form a region which is a mono-crystal or a substantially monocrystal.

[0173] First, a crystalline silicon film is obtained using the action of nickel elements as described in the first embodiment. Then, an excimer laser (For example, KrF excimer laser) is irradiated on the film to further promote the crystallinity.

[0174] The film whose crystallization has been greatly promoted through the above method has a mono-crystal like region which is 3×1017 cm−3 or less in electronic spin density which is measured through ESR, and 3×1017 cm−3 or less in nickel element density as the minimum value measured through SIMS.

[0175] The grain boundary does not substantially exist in that region, and a high electric characteristic comparable to the mono-crystal silicon wafer can be obtained.

[0176] Also, the mono-crystal like region contains 5 atoms % or less to 1×1015 cm−3 of hydrogen. The value is proved from measurement through SIMS (secondary ion mass spectrometry).

[0177] With the manufacturing of the thin-film transistor using the region which is a mono-crystal or a substantially mono-crystal, the characteristics comparable to the MOS type transistor manufactured using the mono-crystal wafer can be obtained.

[0178] (Eighth Embodiment)

[0179] An eighth embodiment of the present invention exhibits an example in which a gate insulation film is formed through the thermal CVD method in a process of manufacturing the thin-film transistor as shown in FIGS. 3 to 5. In the case of forming the gate insulation film through thermal CVD method, since heating at a high temperature is required, it is desirable to use quartz as a substrate.

[0180] In this example, an example is shown in which the gate insulation film is formed through the low pressure thermal CVD method at 850° C., using oxygen gas containing 3% of HCl in volume ratio. The gate insulation film obtained in the above method can make it difficult to change the electric characteristic by the entrance of the metal elements that exist in the active layer.

[0181] (Ninth Embodiment)

[0182] A ninth embodiment of the present invention exhibits an example in which nickel elements are introduced directly in the surface of the under layer during a process shown in the first embodiment. In this case, the nickel elements are held in contact with the lower surface of the amorphous silicon film.

[0183] As was described above, the present invention can provide a technique of reducing the concentration of the metal elements in the crystalline silicon film obtained using the metal elements that promote the crystallization of silicon.

[0184] Also, the present invention can obtain a thin-film semiconductor device higher in reliability and excellent in performance.

[0185] The foregoing description of a preferred embodiment of the invention has been presented for purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form disclosed, and modifications and variations are possible in light of the above teachings or may be acquired from practice of the invention. The embodiment was chosen and described in order to explain the principles of the invention and its practical application to enable one skilled in the art to utilize the invention in various embodiments and with various modifications as are suited to the particular use contemplated. It is intended that the scope of the invention be defined by the claims appended hereto, and their equivalents.

APPENDIX B

[0186] Pending Applications which Disclose Nickel and Two Annealing Steps

Ser. No. Filing Date
08/255,701  6/07/94
08/496,085  6/28/95
08/528,407  9/14/95
08/544,004 10/17/95
08/562,274 11/22/95
08/566,083 12/01/95
08/568,792 12/07/95
08/572,008 12/14/95
08/590,325  1/23/96
08/590,417  1/24/96
08/620,759  3/18/96
08/630,628  4/10/96
08/636,819  4/23/96
08/685,789  7/24/96
08/688,228  7/29/96
08/709,111  9/06/96
08/715,770  9/19/96
08/718,895  9/24/96
08/728,506 10/09/96
08/768,563 12/18/96
08/807,737  2/27/97
08/839,940  4/18/97
08/861,001  5/21/97
08/863,272  5/27/97
08/877,306  6/17/97
08/893,361  7/15/97
08/897,359  7/21/97
08/897,363  7/21/97
08/905,715  8/04/97
08/968,480 11/12/97
08/975,918 11/21/97
08/977,944 11/24/97
09/033,156  3/02/98

APPENDIX C

[0187] Pending Applications which Disclose Nickel and Gettering

Ser. No. Filing Date
08/496,085  6/28/95
08/572,008 12/14/95
08/718,395  9/24/96
08/728,506 10/09/96
08/721,526  9/26/96
08/768,563 12/18/96
08/769,114 12/18/96
08/785,485  1/17/97
08/768,535 12/18/96
08/839,941  4/18/97
08/861,001  5/21/97
08/893,361  7/15/97
08/907,182  8/06/97
08/914,573  8/19/97

APPENDIX D

[0188] Pending Applications which Disclose Nickel and Monodomain

Ser. No. Filing Date
08/520,079  8/28/95
08/528,407  9/14/95
08/604,547  2/21/96
08/657,801  5/31/96
08/769,113 12/18/96
08/865,047  5/29/97
09/026,049  2/19/98

Classifications
U.S. Classification438/151, 257/E21.318, 438/156, 257/E21.133
International ClassificationH01L21/322, H01L21/20
Cooperative ClassificationH01L21/2022, H01L21/3221
European ClassificationH01L21/322B, H01L21/20D