US20010040483A1 - Bias network for high efficiency RF linear power amplifier - Google Patents
Bias network for high efficiency RF linear power amplifier Download PDFInfo
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- US20010040483A1 US20010040483A1 US09/897,567 US89756701A US2001040483A1 US 20010040483 A1 US20010040483 A1 US 20010040483A1 US 89756701 A US89756701 A US 89756701A US 2001040483 A1 US2001040483 A1 US 2001040483A1
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- resistor
- linear amplifier
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/30—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
- H03F1/302—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters in bipolar transistor amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/18—Indexing scheme relating to amplifiers the bias of the gate of a FET being controlled by a control signal
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- the present invention relates generally to radio frequency (RF) linear power amplifier bias networks and, more particularly, to a bias network for minimizing distortion products normally associated with bipolar transistor based RF power amplifiers.
- RF radio frequency
- An important goal associated with design of bipolar transistor based linear amplifiers includes minimizing the introduction of distortion products. It is known that load impedance can be optimized for minimum distortion. Optimization of just the load impedance, however, is often undesirable since the output power and efficiency generally are reduced. It is also known that any bias network must supply the correct amount of bipolar transistor base current to prevent or minimize distortion. Two trends associated with bipolar transistor base current must be reconciled to produce a linear amplifier with minimum amplitude modulation (AM) distortion, e.g. AM-to-AM. For example, the bias current required by a bipolar transistor in class B operation increases as the square root of the power. Further, the base current, and thus the collector current increases exponentially with increasing base-emitter voltage. Any reduction in distortion products will allow a linear amplifier to be operated closer to saturation, thereby improving the efficiency.
- AM amplitude modulation
- the linear amplifier will be have insufficient bias current at high drive levels or have a large quiescent bias current which is undesirable.
- the active bias network allows an RF device to draw varying amounts of bias current depending upon the RF drive while maintaining a low quiescent level. The foregoing bias networks, therefore, can affect the linearity of an RF amplifier.
- AM-to-AM distortion due to RF amplifier gain changes that occur as the RF amplifier power level changes.
- the gain of an amplifier with resistive biasing will decrease as the power increases since the bias resistor will not pass the increased base current.
- Amplifiers with active biasing will exhibit gain expansion since the effective bias current will increase at a larger rate than that required as the power is increased. This condition occurs because the average impedance looking back into the emitter of the bias current supply transistor decreases as the current increases.
- a temperature compensated amplifier quiescent current is desirable since it helps maintain linearity and efficiency over the desired operating range of the amplifier.
- One technique that has been used to produce temperature compensation at a specific bias voltage includes a combination of resistive biasing and active biasing referred to in the art as “buffered passive bias.”
- the buffered passive bias scheme reduces the current that must be supplied by the bias network voltage source.
- Another technique that has often been used to produce temperature compensation includes a current mirror bias network.
- the current mirror bias network provides bias current control over a wide temperature range, but requires higher levels of current from the bias network voltage source.
- thermal variations in the amplifier output transistor quiescent current when using a current mirror bias network, track current changes through a collector bias resistor as the base-emitter voltage associated with the current mirror transistor and amplifier transistor change over temperature. If the bias network voltage is large compared to the base-emitter voltages, then the quiescent current will not change much over temperature.
- one requirement placed upon the associated bias network includes metering charge into an input RF coupling capacitor on the negative portion of the RF cycle at a rate that increases as the square root of the RF power. This charge is then pumped into the amplifier transistor base during the positive portion of the RF cycle.
- a factor in controlling amplifier linearity is the impedance of the bias network.
- known biasing techniques discussed above generally have impedances that are too low. This characteristic generally tends to supply charge (current) to the input RF coupling capacitor discussed above at a higher rate than needed as the power increases and thus produces unwanted gain expansion. While the linearity performance of a resistive bias amplifier can be optimal, such techniques generally require excessive bias current from the bias network voltage source.
- the present invention is directed to a bias network configured to control AM-to-AM performance for a bipolar linear amplifier.
- One embodiment comprises a modified buffered passive bias network in combination with a modified current mirror bias network.
- the modified buffered passive bias network provides temperature compensation and minimizes current drain requirements associated with the bias network voltage source.
- the modified current mirror aids in the temperature compensation and in reducing the level of bipolar linear amplifier quiescent current.
- the impedance of the modified buffered passive bias network is adjusted through a conventional bias resistor in combination with an impedance adjusting resistor added to the emitter of the active bias transistor.
- the impedance of the modified current mirror bias network is adjusted substantially via a resistor added to the base of the current mirror bias transistor and also to a lesser extent via a resistor added to the collector of the current mirror bias transistor.
- Another embodiment comprises a modified buffered passive bias network as described above in combination with a modified current mirror bias network in which an inductor is added to the emitter of the current mirror bias transistor.
- Yet another embodiment comprises a modified buffered passive bias network as described above in combination with a modified current mirror bias network as also described above in which the bias network voltage source is provided via a voltage drop across a plurality of diodes.
- Still another embodiment comprises a modified buffered passive bias network as described above in combination with a modified current mirror bias network as also described above in which the bias network voltage source is provided via a voltage drop across a plurality of diode connected transistors (base/collector connected) to provide a temperature variable reference voltage.
- Another embodiment comprises a modified buffered passive bias network as described above in combination with a modified current mirror bias network as also described above in which the bias network voltage source is provided via a voltage drop across at least one diode connected transistor in combination with one or more resistors to provide a temperature variable reference voltage.
- Another embodiment comprises a modified buffered passive bias network as described above in which the bias network voltage source is provided by a diode reference network as also described above.
- one feature of the present invention includes provision of a current bias network configured to minimize introduction of distortion products associated with a bipolar linear amplifier.
- Another feature of the present invention includes provision of a current bias network configured to allow a bipolar linear amplifier to be operated very close to saturation to improve amplifier efficiency.
- Still another feature of the present invention includes provision of a bipolar linear amplifier current bias network configured to provide temperature compensation and minimize current drain requirements associated with the current bias network.
- Yet another feature of the present invention includes provision of a bipolar linear amplifier current bias network configured to provide temperature compensation and reduce the level of quiescent current drain requirements associated with the bipolar linear amplifier.
- Still another feature of the present invention includes provision of a current bias network that can be combined with a bipolar linear amplifier to produce a linear amplifier with minimum AM-to-AM distortion.
- FIG. 1 is a schematic diagram illustrating a resistive bias network known in the art.
- FIG. 2 is a schematic diagram illustrating an active bias network known in the art.
- FIG. 3 is a schematic diagram illustrating a buffered passive bias network known in the art.
- FIG. 4 is a schematic diagram illustrating a current mirror bias network known in the art.
- FIG. 5 is a schematic diagram illustrating a modified active bias network according to one embodiment of the present invention.
- FIG. 6 is a schematic diagram illustrating a modified buffered passive bias network according to one embodiment of the present invention.
- FIG. 7 is a schematic diagram illustrating a modified current mirror bias network according to one embodiment of the present invention.
- FIG. 8 is a schematic diagram illustrating another modified current mirror bias network according to one embodiment of the present invention.
- FIG. 9 is a schematic diagram illustrating a current bias network according to one embodiment of the present invention.
- FIG. 10 is a schematic diagram illustrating a current bias network according to another embodiment of the present invention.
- FIG. 11 is a schematic diagram illustrating another bias network known in the art.
- FIG. 12 is a schematic diagram illustrating another modified current bias network according to one embodiment of the present invention.
- FIG. 13 is a schematic diagram illustrating a current bias network according to anther embodiment of the present invention.
- FIG. 1 a schematic diagram illustrates a resistive bias circuit 100 known in the art.
- the base current to a transistor amplifier 102 is supplied through a bias resistor 104 .
- This biasing approach provides limited bias current control over power. For example, if the bias resistor 104 is small, temperature variations can cause unacceptable fluctuations in the quiescent current associated with the transistor amplifier 102 unless the bias voltage Vbias 106 changes with temperature. If the bias resistor 104 is large, the transistor amplifier 102 will be bias starved at high drive levels or otherwise have an undesirably large quiescent bias current.
- FIG. 2 is a schematic diagram illustrating an active bias circuit 200 known in the art.
- the active bias circuit 200 is an improvement over the resistive bias circuit 100 shown in FIG. 1 since the active bias circuit 200 allows the associated transistor amplifier 102 to draw varying amounts of bias current depending upon the radio frequency (RF) drive level while still maintaining a low quiescent current level.
- the resistive bias circuit 100 and the active bias circuit 200 both affect the transistor amplifier 102 linearity, e.g., AM-to-AM distortion, due to transistor gain changes with changes in power level. For example, amplifier gain with resistive bias will decrease as the power level increases since the resistor 104 will not pass the increased base current as stated above. Amplifiers having active biasing will exhibit gain expansion with increasing power levels. This is because the effective bias current will increase at a larger rate than required due to decreasing average impedance (variable impedance) associated with the bias current supply transistor 202 as the current increases.
- FIG. 3 is a schematic diagram illustrating a buffered passive bias circuit 300 known in the art.
- temperature compensation in the transistor amplifier 102 quiescent current is desirable since it helps maintain linearity and efficiency over the operating range of the amplifier 102 .
- the buffered passive bias circuit 300 combines a resistive bias circuit 100 with an active bias circuit 200 to produce improved temperature compensation at a specific bias voltage.
- a feature of this active bias circuit 300 includes a reduction in current that must be supplied by the active bias circuit voltage source Vbias 302 .
- FIG. 4 is a schematic diagram illustrating a current mirror bias circuit 400 known in the art.
- the current mirror bias circuit 400 provides excellent bias current control over a wide temperature range at the expense of increased current requirements for the current mirror bias circuit voltage source Vbias 402 .
- the current mirror bias transistor 404 quiescent current tracks the transistor amplifier 102 quiescent current because of the common base-emitter voltage. If the voltage drop across R 1 is large compared to the thermal variation in the base-emitter voltage (V BE ), the quiescent bias current will remain relatively unchanged over temperature.
- FIG. 5 is a schematic diagram illustrating a modified active bias circuit 500 according to one embodiment of the present invention.
- a factor in controlling the amplifier linearity is the impedance of the bias network.
- the bias circuits illustrated in FIGS. 2 - 4 have impedances that are too low for use in linear amplifier applications. For example, a low impedance will tend to supply charge (current) to capacitor C 1 as the power increases, thereby producing gain expansion.
- the bias circuit illustrated in FIG. 1 could be optimum but for the excessive bias current required from the bias voltage source Vbias 106 .
- the modified active bias circuit 500 includes a resistor R 2 added to the emitter of the active bias circuit transistor 202 to reduce or minimize any gain expansion produced by the modified active bias circuit 500 .
- resistor R 2 is selected to achieve maximum linearity and efficiency about a desired operating point for the transistor amplifier 102 .
- FIG. 6 is a schematic diagram illustrating a modified buffered passive bias circuit 600 according to one embodiment of the present invention.
- the modified passive bias circuit 600 allows adjustments to the bias impedance and a degree of temperature compensation via resistors R 2 and R 3 .
- resistors R 2 and R 3 are adjusted to maximize transistor amplifier 102 operating efficiency and linearity with minimal quiescent bias current demands upon the bias circuit voltage source 602 .
- FIG. 7 is a schematic diagram illustrating a modified current mirror bias circuit 700 according to one embodiment of the present invention.
- the modified current mirror bias circuit 700 allows adjustments to the bias impedance and a degree of temperature compensation via resistors R 1 , R 2 and R 3 .
- resistors R 2 and R 3 allow adjustments in the temperature compensation characteristics associated with the transistor amplifier 102 while resistors R 1 , R 3 and to a lessor extent R 2 , all interact to affect the bias circuit impedance.
- resistors R 1 , R 2 and R 3 are adjusted to maximize linearity and operating efficiency with minimal quiescent bias current demands upon the modified current mirror bias circuit voltage source 702 .
- FIG. 8 is a schematic diagram illustrating another modified current mirror bias circuit 800 according to one embodiment of the present invention.
- the impedance of the modified current mirror bias circuit 800 can be increased via addition of an inductor L 1 to the emitter of the modified current mirror bias transistor 802 .
- Chip area is important when using a monolithic power amplifier. Therefore, it is preferable to provide a connection for use with an external inductor when the modified current mirror bias circuit 800 is used in association with a monolithic power amplifier.
- FIG. 9 is a schematic diagram illustrating a bias network 900 according to one preferred embodiment of the present invention.
- the bias network 900 has a modified buffered passive circuit 902 and a modified current mirror bias circuit 904 .
- the modified buffered passive bias circuit 902 provides a predetermined amount of temperature compensation while attributing to minimization of current drain requirements associated with the bias circuit voltage source Vbias 906 .
- the modified current mirror bias circuit 904 aids in the temperature compensation and in reducing the level of quiescent current associated with the transistor amplifier 102 .
- the impedance of the bias network 900 is adjusted through resistors R 2 , R 3 , R 4 and to a lessor extent resistor R 5 .
- the resistor R 6 generally provides bias ballast for the transistor amplifier 102 and is typically too small to provide linearity improvements when used in association with the bias network 900 .
- the bias network 900 allows greater flexibility than known bias circuits in providing a bias current source capable of achieving design constraints necessary to create a linear amplifier having superior AM-to-AM performance and temperature compensation.
- FIG. 10 is a schematic diagram illustrating another bias network 1000 according to another embodiment of the present invention.
- the bias network 1000 is similar to the bias network 900 illustrated in FIG. 9, except the bias voltage source Vbias 1002 is combined with a pair of diode connected transistors 1004 to generate a desired bias voltage on the integrated circuit (IC) chip.
- IC integrated circuit
- This embodiment is not so limited however, and it shall be understood that a desired bias voltage can also be generated by replacing the pair of diode connected transistors 1004 with a single transistor, one or more diodes, or combinations thereof.
- One or more resistors can also be combined with the transistor(s) and/or diode(s) to more particularly refine the desired bias voltage characteristics.
- FIG. 11 is a schematic diagram illustrating a buffered passive bias circuit 1100 that is known in the art.
- the bias circuit 1100 uses two diode connected transistors 1102 to provide a temperature variable reference voltage.
- Other implementations of the bias circuit 1100 known in the art employ a single transistor in combination with a resistor to provide a reference voltage.
- a classic buffered passive bias circuit such as circuit 1100 tends to produce undesirable gain expansion under some circumstance when used to bias a linear amplifier.
- One embodiment of the present invention minimizes undesirable gain expansion by adding a properly sized resistor to the emitter of the active transistor associated with the buffered passive bias circuit such as illustrated in FIGS. 5 and 6.
- the newly added emitter resistor operates to improve linearity by strategically maximizing the bias circuit impedance at a desired operating point.
- FIG. 12 is a schematic diagram illustrating a modified buffered passive bias circuit 1200 according to one embodiment of the present invention.
- the bias circuit 1200 is like the bias circuit 1100 shown in FIG. 11, except an additional impedance adjustment resistor 1202 is added to the emitter of the bias circuit transistor 1204 to improve linearity by minimizing gain expansion as stated above.
- the modified buffered passive bias circuit 1200 is an improvement over classic buffered passive bias schemes known in the art, a more preferred scheme uses any of the bias networks shown in FIGS. 9 and 10. As stated above, improvements in linearity and operating efficiency can be obtained when using a combination of resistive biasing, active biasing and current mirror biasing. This combination of bias schemes can therefore be used in combination with a linear amplifier to provide a linear amplifier with superior linearity and operating efficiency when contrasted with known bias schemes.
- FIG. 13 is a schematic diagram illustrating a bias network 1300 according to another embodiment of the present invention.
- the bias network 1300 is similar to the bias network 1000 illustrated in FIG. 10, except the bias voltage source Vbias 1004 is formulated with a pair of diode connected transistors 1004 and a series resistor 1302 to generate a desired bias voltage on the integrated circuit (IC) chip.
- IC integrated circuit
- a desired bias voltage can also be generated by replacing the pair of diode connected transistors 1004 with a single transistor, more than two transistors, one or more diodes, or combinations thereof More than a single series resistor can also be combined with the transistor(s) and/or diode(s) to more particularly refine the desired bias voltage characteristics.
- the bias network 1300 is optionally coupled to ground via an inductor 1304 that functions to alter the AC impedance characteristics of the bias network 1300 .
Abstract
Description
- (1) Field of the Invention
- The present invention relates generally to radio frequency (RF) linear power amplifier bias networks and, more particularly, to a bias network for minimizing distortion products normally associated with bipolar transistor based RF power amplifiers.
- (2) Description of the Prior Art
- An important goal associated with design of bipolar transistor based linear amplifiers includes minimizing the introduction of distortion products. It is known that load impedance can be optimized for minimum distortion. Optimization of just the load impedance, however, is often undesirable since the output power and efficiency generally are reduced. It is also known that any bias network must supply the correct amount of bipolar transistor base current to prevent or minimize distortion. Two trends associated with bipolar transistor base current must be reconciled to produce a linear amplifier with minimum amplitude modulation (AM) distortion, e.g. AM-to-AM. For example, the bias current required by a bipolar transistor in class B operation increases as the square root of the power. Further, the base current, and thus the collector current increases exponentially with increasing base-emitter voltage. Any reduction in distortion products will allow a linear amplifier to be operated closer to saturation, thereby improving the efficiency.
- When a linear amplifier bias point is chosen very close to a class B mode, efficiency can be improved. This condition, however, places a heavy demand on the associated bias network to supply a large range of bias currents as the linear amplifier power requirements vary. Two approaches have been used in the art to provide the requisite bias network. First, a resistive bias network has been used where the base current is supplied through a bias resistor. Second, an active bias network has been used where an emitter follower transistor is used to provide a low impedance bias supply. The resistive bias approach provides limited bias current control over power. For example, if the resistor is small, temperature variations will cause unacceptable fluctuations in the quiescent current unless the bias network supply voltage also changes with temperature. If the resistor is large, the linear amplifier will be have insufficient bias current at high drive levels or have a large quiescent bias current which is undesirable. The active bias network allows an RF device to draw varying amounts of bias current depending upon the RF drive while maintaining a low quiescent level. The foregoing bias networks, therefore, can affect the linearity of an RF amplifier.
- As stated above, one measure of linearity is AM-to-AM distortion due to RF amplifier gain changes that occur as the RF amplifier power level changes. The gain of an amplifier with resistive biasing will decrease as the power increases since the bias resistor will not pass the increased base current. Amplifiers with active biasing, however, will exhibit gain expansion since the effective bias current will increase at a larger rate than that required as the power is increased. This condition occurs because the average impedance looking back into the emitter of the bias current supply transistor decreases as the current increases.
- In view of the above, a temperature compensated amplifier quiescent current is desirable since it helps maintain linearity and efficiency over the desired operating range of the amplifier. One technique that has been used to produce temperature compensation at a specific bias voltage includes a combination of resistive biasing and active biasing referred to in the art as “buffered passive bias.” The buffered passive bias scheme reduces the current that must be supplied by the bias network voltage source. Another technique that has often been used to produce temperature compensation includes a current mirror bias network. The current mirror bias network provides bias current control over a wide temperature range, but requires higher levels of current from the bias network voltage source. In one case, thermal variations in the amplifier output transistor quiescent current, when using a current mirror bias network, track current changes through a collector bias resistor as the base-emitter voltage associated with the current mirror transistor and amplifier transistor change over temperature. If the bias network voltage is large compared to the base-emitter voltages, then the quiescent current will not change much over temperature.
- The above techniques, familiar to those skilled in the art of linear amplifiers, affect the AM-to-AM linearity performance of the amplifier. As known in the art, amplifier performance limitations are affected by impedance variations seen looking back into the bias and RF matching networks. In one known embodiment the amplifier output transistor collector current varies exponentially with its base-emitter voltage, as stated above. Therefore, a large RF impedance at the amplifier output transistor base is desirable for linearity since it will behave more like a constant current source. Use of a large RF impedance, however, is not desirable to achieve optimum energy transfer. One known technique that addresses the foregoing problems includes setting the value of an input RF coupling capacitor to the requisite value to achieve desired RF performance with the understanding that a higher impedance (smaller capacitor value) will achieve better linearity.
- In class B operation, one requirement placed upon the associated bias network includes metering charge into an input RF coupling capacitor on the negative portion of the RF cycle at a rate that increases as the square root of the RF power. This charge is then pumped into the amplifier transistor base during the positive portion of the RF cycle. As stated above, a factor in controlling amplifier linearity is the impedance of the bias network. Other than the resistive bias technique, known biasing techniques discussed above generally have impedances that are too low. This characteristic generally tends to supply charge (current) to the input RF coupling capacitor discussed above at a higher rate than needed as the power increases and thus produces unwanted gain expansion. While the linearity performance of a resistive bias amplifier can be optimal, such techniques generally require excessive bias current from the bias network voltage source.
- Thus, there remains a need for a new and improved bias network suitable for use with bipolar transistor power amplifiers and that effectively minimizes distortion products to achieve optimum linearity while substantially preserving efficiency.
- The present invention is directed to a bias network configured to control AM-to-AM performance for a bipolar linear amplifier. One embodiment comprises a modified buffered passive bias network in combination with a modified current mirror bias network. The modified buffered passive bias network provides temperature compensation and minimizes current drain requirements associated with the bias network voltage source. The modified current mirror aids in the temperature compensation and in reducing the level of bipolar linear amplifier quiescent current. The impedance of the modified buffered passive bias network is adjusted through a conventional bias resistor in combination with an impedance adjusting resistor added to the emitter of the active bias transistor. The impedance of the modified current mirror bias network is adjusted substantially via a resistor added to the base of the current mirror bias transistor and also to a lesser extent via a resistor added to the collector of the current mirror bias transistor.
- Another embodiment comprises a modified buffered passive bias network as described above in combination with a modified current mirror bias network in which an inductor is added to the emitter of the current mirror bias transistor.
- Yet another embodiment comprises a modified buffered passive bias network as described above in combination with a modified current mirror bias network as also described above in which the bias network voltage source is provided via a voltage drop across a plurality of diodes.
- Still another embodiment comprises a modified buffered passive bias network as described above in combination with a modified current mirror bias network as also described above in which the bias network voltage source is provided via a voltage drop across a plurality of diode connected transistors (base/collector connected) to provide a temperature variable reference voltage.
- Another embodiment comprises a modified buffered passive bias network as described above in combination with a modified current mirror bias network as also described above in which the bias network voltage source is provided via a voltage drop across at least one diode connected transistor in combination with one or more resistors to provide a temperature variable reference voltage.
- Another embodiment comprises a modified buffered passive bias network as described above in which the bias network voltage source is provided by a diode reference network as also described above.
- Accordingly, one feature of the present invention includes provision of a current bias network configured to minimize introduction of distortion products associated with a bipolar linear amplifier.
- Another feature of the present invention includes provision of a current bias network configured to allow a bipolar linear amplifier to be operated very close to saturation to improve amplifier efficiency.
- Still another feature of the present invention includes provision of a bipolar linear amplifier current bias network configured to provide temperature compensation and minimize current drain requirements associated with the current bias network.
- Yet another feature of the present invention includes provision of a bipolar linear amplifier current bias network configured to provide temperature compensation and reduce the level of quiescent current drain requirements associated with the bipolar linear amplifier.
- Still another feature of the present invention includes provision of a current bias network that can be combined with a bipolar linear amplifier to produce a linear amplifier with minimum AM-to-AM distortion.
- These and other features of the present invention will become apparent to those skilled in the art after a reading of the following description of the preferred embodiment when considered with the drawings.
- FIG. 1 is a schematic diagram illustrating a resistive bias network known in the art.
- FIG. 2 is a schematic diagram illustrating an active bias network known in the art.
- FIG. 3 is a schematic diagram illustrating a buffered passive bias network known in the art.
- FIG. 4 is a schematic diagram illustrating a current mirror bias network known in the art.
- FIG. 5 is a schematic diagram illustrating a modified active bias network according to one embodiment of the present invention.
- FIG. 6 is a schematic diagram illustrating a modified buffered passive bias network according to one embodiment of the present invention.
- FIG. 7 is a schematic diagram illustrating a modified current mirror bias network according to one embodiment of the present invention.
- FIG. 8 is a schematic diagram illustrating another modified current mirror bias network according to one embodiment of the present invention.
- FIG. 9 is a schematic diagram illustrating a current bias network according to one embodiment of the present invention.
- FIG. 10 is a schematic diagram illustrating a current bias network according to another embodiment of the present invention.
- FIG. 11 is a schematic diagram illustrating another bias network known in the art.
- FIG. 12 is a schematic diagram illustrating another modified current bias network according to one embodiment of the present invention.
- FIG. 13 is a schematic diagram illustrating a current bias network according to anther embodiment of the present invention.
- In the following descriptions, like reference characters designate like or corresponding parts throughout the several views. Referring now to the drawings in general and FIG. 1 in particular, it will be understood that the illustrations are for the purpose of describing a preferred embodiment of the invention and are not intended to limit the invention thereto. As shown in FIG. 1, a schematic diagram illustrates a
resistive bias circuit 100 known in the art. The base current to atransistor amplifier 102 is supplied through abias resistor 104. This biasing approach provides limited bias current control over power. For example, if thebias resistor 104 is small, temperature variations can cause unacceptable fluctuations in the quiescent current associated with thetransistor amplifier 102 unless thebias voltage Vbias 106 changes with temperature. If thebias resistor 104 is large, thetransistor amplifier 102 will be bias starved at high drive levels or otherwise have an undesirably large quiescent bias current. - FIG. 2 is a schematic diagram illustrating an
active bias circuit 200 known in the art. Theactive bias circuit 200 is an improvement over theresistive bias circuit 100 shown in FIG. 1 since theactive bias circuit 200 allows the associatedtransistor amplifier 102 to draw varying amounts of bias current depending upon the radio frequency (RF) drive level while still maintaining a low quiescent current level. Theresistive bias circuit 100 and theactive bias circuit 200 both affect thetransistor amplifier 102 linearity, e.g., AM-to-AM distortion, due to transistor gain changes with changes in power level. For example, amplifier gain with resistive bias will decrease as the power level increases since theresistor 104 will not pass the increased base current as stated above. Amplifiers having active biasing will exhibit gain expansion with increasing power levels. This is because the effective bias current will increase at a larger rate than required due to decreasing average impedance (variable impedance) associated with the biascurrent supply transistor 202 as the current increases. - FIG. 3 is a schematic diagram illustrating a buffered
passive bias circuit 300 known in the art. As stated above, temperature compensation in thetransistor amplifier 102 quiescent current is desirable since it helps maintain linearity and efficiency over the operating range of theamplifier 102. The bufferedpassive bias circuit 300 combines aresistive bias circuit 100 with anactive bias circuit 200 to produce improved temperature compensation at a specific bias voltage. A feature of thisactive bias circuit 300 includes a reduction in current that must be supplied by the active bias circuitvoltage source Vbias 302. - FIG. 4 is a schematic diagram illustrating a current
mirror bias circuit 400 known in the art. The currentmirror bias circuit 400 provides excellent bias current control over a wide temperature range at the expense of increased current requirements for the current mirror bias circuitvoltage source Vbias 402. In operation, the currentmirror bias transistor 404 quiescent current tracks thetransistor amplifier 102 quiescent current because of the common base-emitter voltage. If the voltage drop across R1 is large compared to the thermal variation in the base-emitter voltage (VBE), the quiescent bias current will remain relatively unchanged over temperature. - FIG. 5 is a schematic diagram illustrating a modified
active bias circuit 500 according to one embodiment of the present invention. As stated above, a factor in controlling the amplifier linearity is the impedance of the bias network. The bias circuits illustrated in FIGS. 2-4 have impedances that are too low for use in linear amplifier applications. For example, a low impedance will tend to supply charge (current) to capacitor C1 as the power increases, thereby producing gain expansion. The bias circuit illustrated in FIG. 1 could be optimum but for the excessive bias current required from the biasvoltage source Vbias 106. The modifiedactive bias circuit 500 includes a resistor R2 added to the emitter of the activebias circuit transistor 202 to reduce or minimize any gain expansion produced by the modifiedactive bias circuit 500. Preferably, resistor R2 is selected to achieve maximum linearity and efficiency about a desired operating point for thetransistor amplifier 102. - FIG. 6 is a schematic diagram illustrating a modified buffered
passive bias circuit 600 according to one embodiment of the present invention. The modifiedpassive bias circuit 600 allows adjustments to the bias impedance and a degree of temperature compensation via resistors R2 and R3. Preferably, resistors R2 and R3 are adjusted to maximizetransistor amplifier 102 operating efficiency and linearity with minimal quiescent bias current demands upon the bias circuit voltage source 602. - FIG. 7 is a schematic diagram illustrating a modified current
mirror bias circuit 700 according to one embodiment of the present invention. The modified currentmirror bias circuit 700 allows adjustments to the bias impedance and a degree of temperature compensation via resistors R1, R2 and R3. For example, resistors R2 and R3 allow adjustments in the temperature compensation characteristics associated with thetransistor amplifier 102 while resistors R1, R3 and to a lessor extent R2, all interact to affect the bias circuit impedance. Preferably, resistors R1, R2 and R3 are adjusted to maximize linearity and operating efficiency with minimal quiescent bias current demands upon the modified current mirror bias circuit voltage source 702. - FIG. 8 is a schematic diagram illustrating another modified current
mirror bias circuit 800 according to one embodiment of the present invention. The impedance of the modified currentmirror bias circuit 800 can be increased via addition of an inductor L1 to the emitter of the modified currentmirror bias transistor 802. Chip area is important when using a monolithic power amplifier. Therefore, it is preferable to provide a connection for use with an external inductor when the modified currentmirror bias circuit 800 is used in association with a monolithic power amplifier. - FIG. 9 is a schematic diagram illustrating a
bias network 900 according to one preferred embodiment of the present invention. Thebias network 900 has a modified bufferedpassive circuit 902 and a modified currentmirror bias circuit 904. The modified bufferedpassive bias circuit 902 provides a predetermined amount of temperature compensation while attributing to minimization of current drain requirements associated with the bias circuit voltage source Vbias 906. The modified currentmirror bias circuit 904 aids in the temperature compensation and in reducing the level of quiescent current associated with thetransistor amplifier 102. The impedance of thebias network 900 is adjusted through resistors R2, R3, R4 and to a lessor extent resistor R5. The resistor R6 generally provides bias ballast for thetransistor amplifier 102 and is typically too small to provide linearity improvements when used in association with thebias network 900. Thebias network 900 allows greater flexibility than known bias circuits in providing a bias current source capable of achieving design constraints necessary to create a linear amplifier having superior AM-to-AM performance and temperature compensation. - FIG. 10 is a schematic diagram illustrating another
bias network 1000 according to another embodiment of the present invention. Thebias network 1000 is similar to thebias network 900 illustrated in FIG. 9, except the biasvoltage source Vbias 1002 is combined with a pair of diode connectedtransistors 1004 to generate a desired bias voltage on the integrated circuit (IC) chip. This embodiment is not so limited however, and it shall be understood that a desired bias voltage can also be generated by replacing the pair of diode connectedtransistors 1004 with a single transistor, one or more diodes, or combinations thereof. One or more resistors can also be combined with the transistor(s) and/or diode(s) to more particularly refine the desired bias voltage characteristics. - FIG. 11 is a schematic diagram illustrating a buffered
passive bias circuit 1100 that is known in the art. Thebias circuit 1100 uses two diode connectedtransistors 1102 to provide a temperature variable reference voltage. Other implementations of thebias circuit 1100 known in the art employ a single transistor in combination with a resistor to provide a reference voltage. As stated above, a classic buffered passive bias circuit such ascircuit 1100 tends to produce undesirable gain expansion under some circumstance when used to bias a linear amplifier. One embodiment of the present invention minimizes undesirable gain expansion by adding a properly sized resistor to the emitter of the active transistor associated with the buffered passive bias circuit such as illustrated in FIGS. 5 and 6. The newly added emitter resistor operates to improve linearity by strategically maximizing the bias circuit impedance at a desired operating point. - FIG. 12 is a schematic diagram illustrating a modified buffered
passive bias circuit 1200 according to one embodiment of the present invention. Thebias circuit 1200 is like thebias circuit 1100 shown in FIG. 11, except an additionalimpedance adjustment resistor 1202 is added to the emitter of thebias circuit transistor 1204 to improve linearity by minimizing gain expansion as stated above. Although the modified bufferedpassive bias circuit 1200 is an improvement over classic buffered passive bias schemes known in the art, a more preferred scheme uses any of the bias networks shown in FIGS. 9 and 10. As stated above, improvements in linearity and operating efficiency can be obtained when using a combination of resistive biasing, active biasing and current mirror biasing. This combination of bias schemes can therefore be used in combination with a linear amplifier to provide a linear amplifier with superior linearity and operating efficiency when contrasted with known bias schemes. - FIG. 13 is a schematic diagram illustrating a
bias network 1300 according to another embodiment of the present invention. Thebias network 1300 is similar to thebias network 1000 illustrated in FIG. 10, except the biasvoltage source Vbias 1004 is formulated with a pair of diode connectedtransistors 1004 and aseries resistor 1302 to generate a desired bias voltage on the integrated circuit (IC) chip. Those skilled in the art shall readily appreciate that a desired bias voltage can also be generated by replacing the pair of diode connectedtransistors 1004 with a single transistor, more than two transistors, one or more diodes, or combinations thereof More than a single series resistor can also be combined with the transistor(s) and/or diode(s) to more particularly refine the desired bias voltage characteristics. Thebias network 1300 is optionally coupled to ground via aninductor 1304 that functions to alter the AC impedance characteristics of thebias network 1300. - Certain modifications and improvements will occur to those skilled in the art upon a reading of the foregoing description. By way of example, just as the inventive embodiments disclosed herein describe specific combinations of bias networks, different combinations are possible with reduced, but yet superior performance over classic bias networks known in the art. The present invention is also useful in combination with many other types of circuits beyond merely linear amplifiers. Further, the present invention can be constructed using various combinations of the circuit elements, so long as the requisite resistor(s) and/or inductor(s) are present to tailor the impedance of the particular bias network. It should be understood that all such modifications and improvements have been deleted herein for the sake of conciseness and readability but are properly within the scope of the following claims.
Claims (98)
Priority Applications (1)
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US09/897,567 US6404287B2 (en) | 1999-12-20 | 2001-07-02 | Bias network for high efficiency RF linear power amplifier |
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US09/467,415 US6313705B1 (en) | 1999-12-20 | 1999-12-20 | Bias network for high efficiency RF linear power amplifier |
US09/897,567 US6404287B2 (en) | 1999-12-20 | 2001-07-02 | Bias network for high efficiency RF linear power amplifier |
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US09/897,260 Expired - Lifetime US6369656B2 (en) | 1999-12-20 | 2001-07-02 | Bias network for high efficiency RF linear power amplifier |
US09/897,567 Expired - Lifetime US6404287B2 (en) | 1999-12-20 | 2001-07-02 | Bias network for high efficiency RF linear power amplifier |
US09/897,361 Expired - Lifetime US6369657B2 (en) | 1999-12-20 | 2001-07-02 | Bias network for high efficiency RF linear power amplifier |
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US09/897,260 Expired - Lifetime US6369656B2 (en) | 1999-12-20 | 2001-07-02 | Bias network for high efficiency RF linear power amplifier |
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US09/897,361 Expired - Lifetime US6369657B2 (en) | 1999-12-20 | 2001-07-02 | Bias network for high efficiency RF linear power amplifier |
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6778018B2 (en) | 2001-07-16 | 2004-08-17 | Koninklijke Philips Electronics N.V. | Linear power amplifier |
GB2405758A (en) * | 2003-09-03 | 2005-03-09 | Roke Manor Research | Bias circuits for optimising the efficiency of RF amplifiers in mobile 'phones |
US7034620B2 (en) | 2002-04-24 | 2006-04-25 | Powerwave Technologies, Inc. | RF power amplifier employing bias circuit topologies for minimization of RF amplifier memory effects |
US20070190946A1 (en) * | 2006-02-16 | 2007-08-16 | Raytheon Company | System and method for intermodulation distortion cancellation |
Families Citing this family (112)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6427067B1 (en) * | 1999-06-10 | 2002-07-30 | The Whitaker Corporation | Detector driven bias circuit for power transistors |
US6313705B1 (en) * | 1999-12-20 | 2001-11-06 | Rf Micro Devices, Inc. | Bias network for high efficiency RF linear power amplifier |
JP3474825B2 (en) * | 2000-03-13 | 2003-12-08 | 富士通カンタムデバイス株式会社 | High frequency power amplifier and communication device |
JP3631426B2 (en) * | 2000-09-25 | 2005-03-23 | 株式会社東芝 | High power amplifier |
US6639470B1 (en) * | 2000-10-06 | 2003-10-28 | Skyworks Solutions, Inc. | Constant current biasing circuit for linear power amplifiers |
US6437647B1 (en) * | 2001-01-30 | 2002-08-20 | Conexant Systems, Inc. | Current mirror compensation system for power amplifiers |
JP3664990B2 (en) * | 2001-04-25 | 2005-06-29 | 株式会社東芝 | High frequency circuit and communication system |
US6842075B2 (en) * | 2001-06-06 | 2005-01-11 | Anadigics, Inc. | Gain block with stable internal bias from low-voltage power supply |
US6753734B2 (en) | 2001-06-06 | 2004-06-22 | Anadigics, Inc. | Multi-mode amplifier bias circuit |
US6701138B2 (en) * | 2001-06-11 | 2004-03-02 | Rf Micro Devices, Inc. | Power amplifier control |
US6492874B1 (en) * | 2001-07-30 | 2002-12-10 | Motorola, Inc. | Active bias circuit |
US6606001B1 (en) * | 2001-10-25 | 2003-08-12 | National Semiconductor Corporation | High-speed current-mirror circuitry and method of operating the same |
TW588518B (en) * | 2001-11-15 | 2004-05-21 | Hrl Lab Llc | Agile spread waveform generator |
US7085499B2 (en) * | 2001-11-15 | 2006-08-01 | Hrl Laboratories, Llc | Agile RF-lightwave waveform synthesis and an optical multi-tone amplitude modulator |
US6803824B2 (en) * | 2001-12-18 | 2004-10-12 | Anadigics, Inc. | Dynamic matching in cascode circuits |
AU2003216835A1 (en) * | 2002-03-20 | 2003-10-08 | Roke Manor Research Limited | A bias circuit for a bipolar transistor |
KR100460721B1 (en) * | 2002-06-29 | 2004-12-08 | 학교법인 한국정보통신학원 | Bias current control circuit of the power amplifier |
JP2004040500A (en) * | 2002-07-03 | 2004-02-05 | Mitsubishi Electric Corp | High-frequency amplifier |
US6891432B2 (en) * | 2002-11-14 | 2005-05-10 | Mia-Com, Inc. | Apparatus, methods and articles of manufacture for electromagnetic processing |
US7187231B2 (en) * | 2002-12-02 | 2007-03-06 | M/A-Com, Inc. | Apparatus, methods and articles of manufacture for multiband signal processing |
US7203262B2 (en) | 2003-05-13 | 2007-04-10 | M/A-Com, Inc. | Methods and apparatus for signal modification in a fractional-N phase locked loop system |
US6924699B2 (en) * | 2003-03-06 | 2005-08-02 | M/A-Com, Inc. | Apparatus, methods and articles of manufacture for digital modification in electromagnetic signal processing |
US7526260B2 (en) * | 2002-11-14 | 2009-04-28 | M/A-Com Eurotec, B.V. | Apparatus, methods and articles of manufacture for linear signal modification |
US7298854B2 (en) * | 2002-12-04 | 2007-11-20 | M/A-Com, Inc. | Apparatus, methods and articles of manufacture for noise reduction in electromagnetic signal processing |
US7545865B2 (en) * | 2002-12-03 | 2009-06-09 | M/A-Com, Inc. | Apparatus, methods and articles of manufacture for wideband signal processing |
US7245183B2 (en) * | 2002-11-14 | 2007-07-17 | M/A-Com Eurotec Bv | Apparatus, methods and articles of manufacture for processing an electromagnetic wave |
US6747516B2 (en) * | 2002-10-30 | 2004-06-08 | Analog Devices, Inc. | Power controller circuit for a power amplifier stage |
EP1559191A1 (en) * | 2002-10-30 | 2005-08-03 | Koninklijke Philips Electronics N.V. | Amplifier bias circuit, method for biasing an amplifier and integrated circuit comprising an amplifier bias circuit |
US6784738B1 (en) | 2002-11-20 | 2004-08-31 | Marvell International Ltd. | Method and apparatus for gain control in a CMOS low noise amplifier |
US6922107B1 (en) * | 2002-12-23 | 2005-07-26 | Dynalinear Technologies, Inc. | Dual (constant voltage/constant current) bias supply for linear power amplifiers |
US6859098B2 (en) | 2003-01-17 | 2005-02-22 | M/A-Com, Inc. | Apparatus, methods and articles of manufacture for control in an electromagnetic processor |
US7026876B1 (en) | 2003-02-21 | 2006-04-11 | Dynalinear Technologies, Inc. | High linearity smart HBT power amplifiers for CDMA/WCDMA application |
US7289775B1 (en) | 2003-03-06 | 2007-10-30 | Rf Micro Devices, Inc. | Method for transmit power control |
US6969978B2 (en) * | 2003-03-17 | 2005-11-29 | Rf Micro Devices, Inc. | DC-DC converter with reduced electromagnetic interference |
US7057461B1 (en) | 2003-03-19 | 2006-06-06 | Dynalinear Technologies, Inc. | Heterostructure bipolar transistor power amplifier module with dynamic voltage supply for improved efficiency |
US7002391B1 (en) | 2003-03-27 | 2006-02-21 | Rf Micro Devices, Inc. | Selectable input attenuation |
US7049893B2 (en) * | 2003-04-14 | 2006-05-23 | M/A-Com, Inc. | Apparatus, methods and articles of manufacture for power amplifier control in a communication system |
US7499653B2 (en) * | 2003-07-14 | 2009-03-03 | Hrl Laboratories, Llc | Multiple wavelength photonic oscillator |
US20050032499A1 (en) * | 2003-08-08 | 2005-02-10 | Cho Jin Wook | Radio frequency power detecting circuit and method therefor |
US6903606B1 (en) | 2003-08-25 | 2005-06-07 | Rf Micro Devices, Inc. | DC offset correction using unused LNA |
US6831506B1 (en) | 2003-09-17 | 2004-12-14 | Rf Micro Devices, Inc. | Reconfigurable filter architecture |
US7026665B1 (en) | 2003-09-19 | 2006-04-11 | Rf Micro Devices, Inc. | High voltage GaN-based transistor structure |
US7480511B2 (en) * | 2003-09-19 | 2009-01-20 | Trimble Navigation Limited | Method and system for delivering virtual reference station data |
US7091778B2 (en) | 2003-09-19 | 2006-08-15 | M/A-Com, Inc. | Adaptive wideband digital amplifier for linearly modulated signal amplification and transmission |
US6998919B2 (en) * | 2003-10-22 | 2006-02-14 | Rf Micro Devices, Inc. | Temperature compensated power amplifier power control |
US6972658B1 (en) | 2003-11-10 | 2005-12-06 | Rf Micro Devices, Inc. | Differential inductor design for high self-resonance frequency |
US6970040B1 (en) | 2003-11-13 | 2005-11-29 | Rf Micro Devices, Inc. | Multi-mode/multi-band power amplifier |
US7343138B2 (en) * | 2003-12-08 | 2008-03-11 | M/A-Com, Inc. | Compensating for load pull in electromagentic signal propagation using adaptive impedance matching |
US6906584B1 (en) | 2003-12-10 | 2005-06-14 | Rf Micro Devices, Inc. | Switchable gain amplifier having a high-pass filter pole |
US20050140439A1 (en) * | 2003-12-26 | 2005-06-30 | Hyoung Chang H. | Predistortion linearizer for power amplifier |
CN1926759B (en) * | 2004-01-05 | 2010-04-28 | 日本电气株式会社 | Amplifier |
US7822082B2 (en) * | 2004-01-27 | 2010-10-26 | Hrl Laboratories, Llc | Wavelength reconfigurable laser transmitter tuned via the resonance passbands of a tunable microresonator |
US6980039B1 (en) | 2004-03-03 | 2005-12-27 | Rf Micro Devices, Inc. | DC-DC converter with noise spreading to meet spectral mask requirements |
US7425871B2 (en) * | 2004-03-19 | 2008-09-16 | Regents Of The University Of California | Compensation units for reducing the effects of self-heating and increasing linear performance in bipolar transistors |
US7064615B2 (en) * | 2004-03-24 | 2006-06-20 | Freescale Semiconductor, Inc. | Method and apparatus for doherty amplifier biasing |
US7301400B1 (en) | 2004-06-02 | 2007-11-27 | Rf Micro Devices, Inc. | Multi-phase switching power supply for mobile telephone applications |
US7053713B1 (en) | 2004-06-02 | 2006-05-30 | Rf Micro Devices, Inc. | Multi-phase switching power supply having both voltage and current feedback loops |
US7193459B1 (en) | 2004-06-23 | 2007-03-20 | Rf Micro Devices, Inc. | Power amplifier control technique for enhanced efficiency |
US7109791B1 (en) | 2004-07-09 | 2006-09-19 | Rf Micro Devices, Inc. | Tailored collector voltage to minimize variation in AM to PM distortion in a power amplifier |
US7132891B1 (en) | 2004-08-17 | 2006-11-07 | Rf Micro Devices, Inc. | Power amplifier control using a switching power supply |
US7167054B1 (en) | 2004-12-02 | 2007-01-23 | Rf Micro Devices, Inc. | Reconfigurable power control for a mobile terminal |
US7224230B2 (en) * | 2005-02-22 | 2007-05-29 | Triquint Semiconductor, Inc. | Bias circuit with mode control and compensation for voltage and temperature |
US7336127B2 (en) * | 2005-06-10 | 2008-02-26 | Rf Micro Devices, Inc. | Doherty amplifier configuration for a collector controlled power amplifier |
US7508249B2 (en) * | 2005-07-27 | 2009-03-24 | Analog Devices, Inc. | Distributed transistor structure for high linearity active CATV power splitter |
DE102005035150B4 (en) * | 2005-07-27 | 2010-07-08 | Infineon Technologies Ag | Amplifier circuit and method for amplifying a signal to be amplified |
US7330071B1 (en) | 2005-10-19 | 2008-02-12 | Rf Micro Devices, Inc. | High efficiency radio frequency power amplifier having an extended dynamic range |
US7372317B1 (en) | 2005-11-21 | 2008-05-13 | Analog Devices, Inc. | PTATn bias cell for improved temperature performance |
JP2007329831A (en) * | 2006-06-09 | 2007-12-20 | Matsushita Electric Ind Co Ltd | Amplifier circuit |
US7642857B2 (en) * | 2006-08-21 | 2010-01-05 | Triquint Semiconductor, Inc. | Current limit circuit for compensating for output load mismatch of an RF power amplifier |
US7609113B2 (en) * | 2006-11-15 | 2009-10-27 | Triquint Semiconductor, Inc. | Constant current bias circuit and associated method |
US7696826B2 (en) * | 2006-12-04 | 2010-04-13 | Skyworks Solutions, Inc. | Temperature compensation of collector-voltage control RF amplifiers |
JP4271708B2 (en) * | 2007-02-01 | 2009-06-03 | シャープ株式会社 | Power amplifier and multistage amplifier circuit including the same |
US8319558B1 (en) | 2008-10-14 | 2012-11-27 | Rf Micro Devices, Inc. | Bias-based linear high efficiency radio frequency amplifier |
US8072271B1 (en) | 2008-10-14 | 2011-12-06 | Rf Micro Devices, Inc. | Termination circuit based linear high efficiency radio frequency amplifier |
US8063621B2 (en) * | 2008-11-05 | 2011-11-22 | Semiconductor Components Industries Llc | Current balancing circuit and method |
US8228122B1 (en) * | 2009-06-05 | 2012-07-24 | EpicCom, Inc. | Regulator and temperature compensation bias circuit for linearized power amplifier |
US8653907B2 (en) | 2011-07-18 | 2014-02-18 | Raytheon Company | Resonated bypass capacitor for enhanced performance of a microwave circuit |
JP5530418B2 (en) * | 2011-11-22 | 2014-06-25 | サムソン エレクトロ−メカニックス カンパニーリミテッド. | Amplifier circuit |
US9136341B2 (en) | 2012-04-18 | 2015-09-15 | Rf Micro Devices, Inc. | High voltage field effect transistor finger terminations |
US9124221B2 (en) | 2012-07-16 | 2015-09-01 | Rf Micro Devices, Inc. | Wide bandwidth radio frequency amplier having dual gate transistors |
US9202874B2 (en) | 2012-08-24 | 2015-12-01 | Rf Micro Devices, Inc. | Gallium nitride (GaN) device with leakage current-based over-voltage protection |
US8988097B2 (en) | 2012-08-24 | 2015-03-24 | Rf Micro Devices, Inc. | Method for on-wafer high voltage testing of semiconductor devices |
US9142620B2 (en) | 2012-08-24 | 2015-09-22 | Rf Micro Devices, Inc. | Power device packaging having backmetals couple the plurality of bond pads to the die backside |
US9917080B2 (en) | 2012-08-24 | 2018-03-13 | Qorvo US. Inc. | Semiconductor device with electrical overstress (EOS) protection |
US9147632B2 (en) | 2012-08-24 | 2015-09-29 | Rf Micro Devices, Inc. | Semiconductor device having improved heat dissipation |
US9070761B2 (en) | 2012-08-27 | 2015-06-30 | Rf Micro Devices, Inc. | Field effect transistor (FET) having fingers with rippled edges |
US9129802B2 (en) | 2012-08-27 | 2015-09-08 | Rf Micro Devices, Inc. | Lateral semiconductor device with vertical breakdown region |
US8723603B2 (en) * | 2012-09-11 | 2014-05-13 | Analog Devices, Inc. | Amplifier with voltage and current feedback error correction |
US9325281B2 (en) | 2012-10-30 | 2016-04-26 | Rf Micro Devices, Inc. | Power amplifier controller |
JP6061267B2 (en) * | 2012-11-09 | 2017-01-18 | サムソン エレクトロ−メカニックス カンパニーリミテッド. | Bias circuit and amplifier using the same |
US9455327B2 (en) | 2014-06-06 | 2016-09-27 | Qorvo Us, Inc. | Schottky gated transistor with interfacial layer |
US9536803B2 (en) | 2014-09-05 | 2017-01-03 | Qorvo Us, Inc. | Integrated power module with improved isolation and thermal conductivity |
US10615158B2 (en) | 2015-02-04 | 2020-04-07 | Qorvo Us, Inc. | Transition frequency multiplier semiconductor device |
US10062684B2 (en) | 2015-02-04 | 2018-08-28 | Qorvo Us, Inc. | Transition frequency multiplier semiconductor device |
US9632522B2 (en) * | 2015-04-15 | 2017-04-25 | Skyworks Solutions, Inc. | Current mirror bias circuit with voltage adjustment |
CN106849879B (en) | 2015-12-04 | 2020-08-04 | 财团法人工业技术研究院 | Power amplifier circuit |
US10103691B2 (en) | 2016-01-27 | 2018-10-16 | Mediatek Inc. | Power amplifier system and associated bias circuit |
TWI647905B (en) | 2017-02-15 | 2019-01-11 | 立積電子股份有限公司 | Pre-compensator for compensating the linearity of the amplifier |
JP6965810B2 (en) * | 2018-04-03 | 2021-11-10 | トヨタ自動車株式会社 | Parking support device |
WO2020001553A1 (en) * | 2018-06-27 | 2020-01-02 | 李湛明 | Gate driving circuit of gallium nitride device and integrated circuit, and voltage regulator |
US10686411B2 (en) * | 2018-06-27 | 2020-06-16 | Zhanming LI | Gate drivers and voltage regulators for gallium nitride devices and integrated circuits |
KR102128404B1 (en) | 2018-08-13 | 2020-06-30 | 베렉스주식회사 | Bias circuit for tuneable impedance matching of MMIC amplifiers |
CN110098806B (en) * | 2019-04-25 | 2023-03-10 | 河源广工大协同创新研究院 | Self-adaptive linear radio frequency bias circuit |
CN110190824B (en) * | 2019-05-30 | 2023-02-07 | 广东工业大学 | Active bias network and radio frequency power amplifier |
US10924063B2 (en) | 2019-06-11 | 2021-02-16 | Analog Devices International Unlimited Company | Coupling a bias circuit to an amplifier using an adaptive coupling arrangement |
CN110611488B (en) * | 2019-08-05 | 2023-06-16 | 浙江铖昌科技股份有限公司 | Temperature compensated active bias circuit |
KR20210035653A (en) * | 2019-09-24 | 2021-04-01 | 삼성전기주식회사 | Amplifying device with adaptive ctat biasing capability using voltage tracking |
US11095254B1 (en) * | 2020-01-23 | 2021-08-17 | Analog Devices International Unlimited Company | Circuits and methods to reduce distortion in an amplifier |
US11264953B2 (en) * | 2020-01-31 | 2022-03-01 | Analog Devices International Unlimited Company | Bias arrangements for improving linearity of amplifiers |
US11303309B1 (en) | 2020-10-07 | 2022-04-12 | Analog Devices International Unlimited Company | Bias arrangements with linearization transistors sensing RF signals and providing bias signals at different terminals |
CN112564643B (en) * | 2020-12-08 | 2023-07-25 | 广东工业大学 | Self-adaptive radio frequency bias circuit |
JP7267518B2 (en) * | 2021-02-04 | 2023-05-01 | 三菱電機株式会社 | temperature compensation circuit |
Family Cites Families (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3708756A (en) | 1971-05-12 | 1973-01-02 | Motorola Inc | Biasing network for transistors |
JPS5312350B2 (en) | 1972-06-05 | 1978-04-28 | ||
FR2245125B1 (en) | 1973-09-25 | 1977-03-11 | Thomson Csf | |
US3984783A (en) | 1975-03-27 | 1976-10-05 | Motorola, Inc. | Amplifier |
US4079336A (en) | 1976-12-22 | 1978-03-14 | National Semiconductor Corporation | Stacked transistor output amplifier |
US4122403A (en) | 1977-06-13 | 1978-10-24 | Motorola, Inc. | Temperature stabilized common emitter amplifier |
GB2007055B (en) | 1977-10-21 | 1982-08-18 | Plessey Co Ltd | Circuit arrangement |
US4207538A (en) | 1978-08-29 | 1980-06-10 | Rca Corporation | Temperature compensation circuit |
IT1142703B (en) | 1981-05-29 | 1986-10-15 | Selenia Ind Elettroniche | IMPROVEMENT IN BIPOLAR TRANSISTOR AMPLIFIERS WITH HIGH LINEAR NAMICS |
US4728902A (en) | 1986-09-08 | 1988-03-01 | Vtc Incorporated | Stabilized cascode amplifier |
US4924194A (en) | 1989-05-19 | 1990-05-08 | Motorola, Inc. | RF power amplifier |
JPH0456404A (en) * | 1990-06-25 | 1992-02-24 | Nec Corp | Amplifier device |
FI89110C (en) | 1991-09-19 | 1993-08-10 | Nokia Mobile Phones Ltd | Power detector |
US5345192A (en) | 1993-01-29 | 1994-09-06 | Sgs-Thomson Microelectronics, Inc. | Voltage controlled integrated circuit for biasing an RF device |
US5436595A (en) | 1994-08-01 | 1995-07-25 | Hewlett-Packard Company | Low voltage bipolar amplifier |
US5471174A (en) | 1994-12-05 | 1995-11-28 | Motorola, Inc. | Amplifier having an output stage with bias current cancellation |
US5736901A (en) | 1995-04-04 | 1998-04-07 | Matsushita Electric Industrial Co., Ltd. | Radio frequency amplifier with stable operation and restrained oscillation at low frequencies |
US5739723A (en) | 1995-12-04 | 1998-04-14 | Motorola, Inc. | Linear power amplifier using active bias for high efficiency and method thereof |
US5670912A (en) | 1996-01-31 | 1997-09-23 | Motorola, Inc. | Variable supply biasing method and apparatus for an amplifier |
US5654672A (en) | 1996-04-01 | 1997-08-05 | Honeywell Inc. | Precision bias circuit for a class AB amplifier |
US5710522A (en) | 1996-07-15 | 1998-01-20 | Pass Laboratories, Inc. | Amplifier having an active current source |
JP2853763B2 (en) * | 1996-08-29 | 1999-02-03 | 日本電気株式会社 | Amplifier circuit |
US6148220A (en) * | 1997-04-25 | 2000-11-14 | Triquint Semiconductor, Inc. | Battery life extending technique for mobile wireless applications |
JP3125723B2 (en) * | 1997-08-18 | 2001-01-22 | 日本電気株式会社 | Bias circuit for common emitter amplifier circuit |
JP3922773B2 (en) * | 1997-11-27 | 2007-05-30 | 三菱電機株式会社 | Power amplifier |
FI105611B (en) * | 1998-03-13 | 2000-09-15 | Nokia Mobile Phones Ltd | Radiotajuusvahvistimet |
US6313705B1 (en) * | 1999-12-20 | 2001-11-06 | Rf Micro Devices, Inc. | Bias network for high efficiency RF linear power amplifier |
-
1999
- 1999-12-20 US US09/467,415 patent/US6313705B1/en not_active Expired - Lifetime
-
2001
- 2001-07-02 US US09/897,260 patent/US6369656B2/en not_active Expired - Lifetime
- 2001-07-02 US US09/897,567 patent/US6404287B2/en not_active Expired - Lifetime
- 2001-07-02 US US09/897,361 patent/US6369657B2/en not_active Expired - Lifetime
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6778018B2 (en) | 2001-07-16 | 2004-08-17 | Koninklijke Philips Electronics N.V. | Linear power amplifier |
US6788150B2 (en) | 2001-07-16 | 2004-09-07 | Koninklijke Philips Electronics N.V. | Linear power amplifier |
US7034620B2 (en) | 2002-04-24 | 2006-04-25 | Powerwave Technologies, Inc. | RF power amplifier employing bias circuit topologies for minimization of RF amplifier memory effects |
US7106134B2 (en) | 2002-04-24 | 2006-09-12 | Powerwave Technologies, Inc. | Feed forward amplifier employing bias circuit topologies for minimization of RF amplifier memory effects |
GB2405758A (en) * | 2003-09-03 | 2005-03-09 | Roke Manor Research | Bias circuits for optimising the efficiency of RF amplifiers in mobile 'phones |
US20070190946A1 (en) * | 2006-02-16 | 2007-08-16 | Raytheon Company | System and method for intermodulation distortion cancellation |
US7729667B2 (en) * | 2006-02-16 | 2010-06-01 | Raytheon Company | System and method for intermodulation distortion cancellation |
Also Published As
Publication number | Publication date |
---|---|
US6313705B1 (en) | 2001-11-06 |
US6369656B2 (en) | 2002-04-09 |
US6369657B2 (en) | 2002-04-09 |
US20010038313A1 (en) | 2001-11-08 |
US20010040482A1 (en) | 2001-11-15 |
US6404287B2 (en) | 2002-06-11 |
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