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Publication numberUS20010048095 A1
Publication typeApplication
Application numberUS 09/108,614
Publication dateDec 6, 2001
Filing dateJul 1, 1998
Priority dateJul 1, 1998
Also published asUS6770575, US20020088707
Publication number09108614, 108614, US 2001/0048095 A1, US 2001/048095 A1, US 20010048095 A1, US 20010048095A1, US 2001048095 A1, US 2001048095A1, US-A1-20010048095, US-A1-2001048095, US2001/0048095A1, US2001/048095A1, US20010048095 A1, US20010048095A1, US2001048095 A1, US2001048095A1
InventorsSteven N. Towle
Original AssigneeSteven N. Towle
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Method for improving thermal stability of fluorinated amorphous carbon low dielectric constant materials
US 20010048095 A1
Abstract
A process for forming a thermally stable low-dielectric constant material is provided. A gas mixture is prepared to form a fluorinated amorphous carbon (a-C:F) material. The gas mixture is mixed with a boron-containing gas.
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Claims(30)
What is claimed is:
1. A process for forming a thermally stable low-dielectric constant material, the process comprising:
preparing a gas mixture to form a fluorinated amorphous carbon (a-C:F) material; and
mixing said gas mixture with a boron-containing gas.
2. The process of
claim 1
wherein mixing said gas mixture with said boron-containing gas includes forming a boron-doped-fluorinated-amorphous-carbon (a-C:B:F) material.
3. The process of
claim 1
wherein said gas mixture comprises hydrocarbon, fluorocarbon, boron-containing gas, and an inert gas.
4. The process of
claim 1
wherein said boron-containing gas comprises one of diborane (B2H6) and boron trifluoride (BF3).
5. The process of
claim 1
wherein said boron-containing gas is mixed to said gas mixture after said a-C:F material is formed by chemical vapor deposition (CVD) techniques.
6. The process of
claim 1
wherein said boron-containing gas is mixed to said gas mixture after said a-C:F material is formed by reactive sputtering techniques.
7. The process of
claim 2
wherein said a-C:B:F material is formed by chemical vapor deposition techniques.
8. The process of
claim 2
wherein said a-C:B:F material is formed by reactive sputtering techniques.
9. The process of
claim 2
, wherein said a-C:B:F material has an atomic composition of 45% carbon, 40% fluorine, and 15% boron.
10. A dielectric material comprising a-C:B:F material.
11. The dielectric material of
claim 10
, said a-C:B:F material has an atomic composition of 45% carbon, 40% fluorine, and 15% boron.
12. A process for providing an interconnect structure with low capacitance, the process comprising:
patterning at least two metal lines upon a substrate; and
forming an a-C:B:F material between said at least two metal lines.
13. The process of
claim 12
, wherein said a-C:B:F material is formed by the process comprising:
preparing a gas mixture to form a fluorinated amorphous carbon (a-C:F) material; and
mixing said gas mixture with a boron-containing gas.
14. The process of
claim 12
wherein said a-C:B:F material is formed by chemical vapor deposition techniques.
15. The process of
claim 12
, wherein said a-C:B:F material has an atomic composition of 45% carbon, 40% fluorine, and 15% boron.
16. A process for providing an interconnect structure with low capacitance, the process comprising:
forming an a-C:B:F material upon a substrate;
patterning at least two trenches in said a-C:B:F material; and
forming metal into said at least two trenches.
17. The process of
claim 16
, wherein said a-C:B:F material is formed by the process comprising:
preparing a gas mixture to form a fluorinated amorphous carbon (a-C:F) material; and
mixing said gas mixture with a boron-containing gas.
18. The process of
claim 16
wherein said a-C:B:F material is formed by chemical vapor deposition techniques.
19. The process of
claim 16
, wherein said a-C:B:F material has an atomic composition of 45% carbon, 40% fluorine, and 15% boron.
20. A process for providing an interconnect structure, the process comprising:
forming an a-C:B:F barrier layer on a low-k material of a substrate; and
forming a metal layer on said a-C:B:F barrier layer.
21. The process as described in
claim 20
wherein said a-C:B:F barrier layer is formed, by way of chemical vapor deposition techniques.
22. A process for providing an interconnect structure with the process comprising:
forming a metal layer upon a substrate;
patterning said metal layer;
forming an a-C:B:F barrier layer onto said metal layer; and,
forming a low-k material onto said a-C:B:F barrier layer.
23. The process as described in
claim 22
wherein said a-C:B:F barrier layer is deposited by way of chemical vapor deposition techniques.
24. A process for providing an interconnect structure with the process comprising:
forming a low-k material upon a substrate;
forming an a-C:B:F barrier layer onto said low-k material; and
forming a metal layer onto said a-C:B:F barrier layer.
25. The process as described in
claim 24
wherein said a-C:B:F barrier layer is formed by way of chemical vapor deposition techniques.
26. A process for patterning a low-k material by a hardmask, the process comprising:
forming said low-k material upon a substrate;
forming a-C:B:F upon said low-k material;
patterning said a-C:B:F to define an a-C:B:F pattern; and,
patterning a portion of said low-k material according to said a-C:B:F pattern.
27. The process as described in
claim 26
wherein said portion of said material is patterned by way of hydrogen-based reactive ion etching.
28. The process as described in
claim 26
wherein said a-C:B:F is formed by way of chemical vapor deposition techniques.
29. A process for creating a pattern on an underlying material comprising:
forming said underlying material on a substrate;
depositing an anti-reflective coating (ARC), said anti-reflective coating being comprised of a-C:B:F;
forming a patterned photoresist layer on said anti-reflective coating; and,
forming a pattern in said anti-reflective coating and said underlying material according to said patterned photoresist layer.
30. The process as described in
claim 29
wherein said a-C:B:F is formed by way of chemical vapor deposition techniques.
Description
BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention relates to the field of fabrication of integrated circuits. More specifically, the present invention relates to a process for improving the thermal stability of low dielectric constant materials included in integrated circuits.

[0003] 2. Description of the Related Art

[0004] Modern integrated circuits are generally made up of millions of active and passive devices such as transistors, capacitors, and resistors disposed in a silicon wafer. These devices are initially isolated from one another, but are later interconnected together by an interconnect system to form functional circuits. The quality of the interconnection of these devices drastically affects the performance and reliability of the fabricated integrated circuit.

[0005] An interconnect system typically includes metal lines, spaced apart from each other. The metal lines interconnect the various active and passive devices found in a silicon wafer onto which an interconnect system is deposited and fabricated. The metal lines are separated by insulating dielectric material for isolating the metal lines from one another. Inherent in the structure of the interconnect system is a capacitance associated with the metal lines spaced apart from each other. Decreasing this capacitance is desirable as several advantages can be achieved therefrom, such as reduced RC delay, reduced power dissipation, and reduced cross-talk between the metal lines. The capacitance is inversely proportional with the distance between the metal lines. Thus, one way to reduce the capacitance between the metal lines would be to increase the space between the lines. However, this option is not desirable because of the limitations imposed by packing density.

[0006] Another way to reduce the capacitance between the lines of an interconnect system is to reduce the dielectric constant (k) of the dielectric material deposited between the metal lines. The capacitance of the metal lines is directly proportional to the dielectric constant of the dielectric material between the metal lines. The dielectric constant of a material is generally defined as the material's ability to maintain a difference in electrical charge over a specified distance.

[0007] One dielectric material typically used to isolate metal lines from each other is silicon dioxide (SiO2). SiO2 is a thermally and chemically stable material. The dielectric constant of SiO2 is approximately 4. The dielectric constant is based on a scale where 1.0 represents the dielectric constant of a vacuum. Various materials exhibit dielectric constants from approximately 1.0 to values in the hundreds.

[0008] The dielectric constant of SiO2 is considered high. Recent attempts have been made to use low dielectric-constant materials such as organic and inorganic polymers that have densities and dielectric constants lower than those of SiO2 to replace SiO2 as a dielectric material thereby reducing the capacitance between the metal lines.

[0009] One such low dielectric constant material is fluorinated amorphous carbon (a-C:F) that has a dielectric constant of about 2.3 (0.4) and low thermal stability. This thermal stability is lower than the thermal stability of previously used oxides such as SiO2. Low thermal stability causes problems in integrated circuit fabrication, as during the process of fabrication of integrated circuits and their interconnect structures, temperatures in excess of 400 C. are often reached. As processing temperatures climb, a-C:F materials heat up and decompose into highly corrosive fluorine species such as F, CF, CF2, and CF3. When these fluorine species outgas or outdiffuse into the surrounding metal layers, they tend to cause corrosion of the metal layers of the interconnect and create potential adhesion problems with juxtaposed dielectric films. These films may ultimately cause yield and reliability problems in the devices being fabricated.

[0010] It is desirable to provide a thermally stable a-C:F material and a method to improve the thermal stability by decreasing fluorine outdiffusion from a-C:F during high temperature processing.

SUMMARY OF THE INVENTION

[0011] The present invention provides a process for forming a thermally stable low dielectric constant material. A gas mixture is prepared to form a fluorinated amorphous carbon (a-C:F) material. The gas mixture is mixed with a boron-containing gas.

BRIEF DESCRIPTION OF THE DRAWINGS

[0012] The features, aspects, and advantages of the present invention will become more fully apparent from the following detailed description, appended claims, and accompanying drawings in which:

[0013]FIG. 1 illustrates atomic interaction among carbon and fluorine atoms in an a-C:F material;

[0014]FIG. 2 illustrates the molecular structure of a-C:F material;

[0015]FIG. 3 illustrates the molecular structure of boron doped fluorinated amorphous carbon (a-C:B:F) material, in accordance with one embodiment of the present invention;

[0016]FIG. 4 illustrates a conventional chemical vapor deposition (CVD) system where a-C:F film may be formed on a wafer;

[0017]FIG. 5 illustrates a cross-sectional view of a chemical reaction chamber showing a thin layer of a-C:F formed on a wafer by way of a CVD process;

[0018]FIG. 6 illustrates a cross-sectional view of a chemical reaction chamber showing a thin layer of a-C:B:F formed on a wafer by way of a CVD process, according to one embodiment of the present invention;

[0019]FIG. 7 illustrates a blown-up view of the cross-sectional view of the chemical reaction chamber of FIG. 6 showing a thin layer of a-C:B:F formed on the wafer;

[0020]FIG. 8 illustrates an implementation of an a-C:B:F material as a low-k dielectric material for providing an interconnect structure with low capacitance according to one embodiment of the present invention.

[0021]FIG. 9 illustrates an implementation of an a-C:B:F material as a low-k dielectric material for providing an interconnect structure with low capacitance according to a second embodiment of the present invention.

[0022]FIG. 10 illustrates an implementation of an a-C:B:F material utilized in an interconnect structure for reducing fluorine outdiffusion according to a third embodiment of the present invention.

[0023]FIG. 11 illustrates an implementation of an a-C:B:F material utilized in an interconnect structure for reducing fluorine outdiffusion according to a fourth embodiment of the present invention.

[0024]FIG. 12 illustrates an implementation of an a-C:B:F material utilized in an interconnect structure for reducing fluorine outdiffusion according to a fifth embodiment of the present invention.

[0025]FIG. 13 illustrates the use of an a-C:B:F material as a hardmask for patterning an underlying material, according to a sixth embodiment of the method of the present invention;

[0026]FIG. 14 illustrates the use of an a-C:B:F material as an anti-reflective coating (ARC) for creating a pattern on an underlying material, according to a seventh embodiment of the method of the present invention; and,

[0027]FIG. 15 illustrates a flow chart diagram with the steps of a method for forming a thermally stable low-dielectric constant material according to one embodiment of the process of the present invention.

DETAILED DESCRIPTION OF THE INVENTION

[0028] In the following description, numerous specific details are set forth to provide a thorough understanding of the present invention. It should be obvious, however, to one skilled in the art that these specific details need not be employed to practice the present invention. In other instances, well-known materials or methods have not been described in detail in order to avoid unnecessarily obscuring the present invention.

[0029] The present invention provides a process of adding boron to low dielectric constant materials including fluorinated amorphous carbon (a-C:F). The combination of a-C:F materials with boron is more thermally stable than prior art a-C:F materials and therefore may be used in the process of integrated circuit fabrication at processing temperatures within a wider range without the production of dangerous radicals or corrosive outdiffusion.

[0030]FIG. 1 illustrates an example of a local region of an a-C:F material having an atomic structure of four carbon (C) atoms and one fluorine (F) atom. FIG. 1 shows the bonding of the a-C:F material with the electron cloud 10 comprising CC and CF bonds. Since fluorine (F) is the most electronegative element, fluorine atoms easily enter into combinations with most other chemical elements, such as carbon. Electronegative fluorine atoms attract electron cloud 10 from the surrounding CC bonds into the CF bond decreasing the density of electron cloud 10 in the CC bonds and increasing the density of the electron cloud in the CF bond. As a result, the polymer as a whole becomes less polarizable. Less polarizable polymers have low dielectric constants, while more polarizable polymers have high dielectric constants.

[0031]FIG. 2 shows the molecular structure 200 of a fluorinated amorphous carbon (a-C:F) material. CF2 16 (shown in dotted lines) and CF3 18 (shown in dotted lines) groups are cross-linked to a network of carbon (C) atoms. The presence of a range of molecular structures in the same material (a-C:F), such as CF2 16 and CF3 18 groups, leads to poor thermal stability. As discussed above, a principal shortcoming of a-C:F materials in their use as low constant dielectrics, is that at integrated circuit processing temperatures, a-C:F materials degrade into highly corrosive F, CF, CF2, and CF3 species that outgas and chemically attack metal structures in the interconnect. One reason that various fluorinated species outgas at higher processing temperatures is that fluorinated amorphous carbon materials have large quantities of fluorine in them. Amorphous carbon materials with higher fluorine content tend to break down at higher temperatures.

[0032] One way to improve the thermal stability and reduce the outgassing of fluorinated species is changing the structure of a-C:F materials. The present invention accomplishes this by incorporating boron into the a-C:F film so that it forms part of the amorphous carbon matrix and binds fluorine atoms. The addition of boron (B) causes improvement of the thermal stability by reducing fluorine outdiffusion from fluorinated amorphous carbon (a-C:F) materials. Unlike other dopants such as nitrogen, boron can have a negligible effect on the dielectric constant of a-C:F. Boron atoms have few electrons (atomic number 5) that contribute to polarizability, and forms strong covalent bonds with carbon, which have relatively low electric polarizability. Further, because boron forms mainly covalent bonds with fluorine atoms, the dielectric constant of the new material including boron is not significantly increased through formation of electric dipoles or mobile ions.

[0033]FIG. 3 shows the molecular structure 300 of a boron doped fluorinated amorphous carbon (a-C:B:F) material in accordance with one embodiment of the present invention. As BF bonds are stronger than CF bonds, BF 22 and BF2 20 groups are expected to bond F more tightly than CF3 24 and CF2 26 groups leading to higher thermal stability. The addition of boron to a-C:F material causes the thermal stability of a-C:F to improve as strong CB and BF bonds are formed and the concentration of weakly bound fluorine species, such as CF2 26 and CF3 24 is reduced.

[0034] An a-C:B:F material produced by the embodiment of the process of the present invention described herein is estimated to be thermally stable at temperatures of around 450 C. at which, for the most part, a-C:F materials would not be thermally stable. Further, by adding boron to a-C:F materials, the outgassing of F-rich species (e.g., CF2, CF3) is lowered as boron and fluorine form stronger bonds than carbon and fluorine. Strongly bound chemical structures increase the thermal stability as opposed to weakly bound chemical structures that decrease the thermal stability.

[0035] A thin film of a-C:F may be formed on a wafer in a reaction chamber by conventional chemical vapor deposition (CVD), plasma-enhanced CVD, or by reactive sputtering processes. FIG. 4 illustrates a conventional CVD system where a-C:F film may be formed on a wafer. The CVD system 5 includes a wafer holder 20, a reaction chamber 30, energy source 40 producing energy to the reaction chamber 30, a flow control and timer section 50 and a chemical source 60. The wafer 10 is placed in wafer holder 20 and loaded into reaction chamber 30 usually containing an inert gas. Chemicals are housed in chemical source 60. Chemical vapors are generated from pressurized gas cylinders or liquid source bubblers (not shown). Flow control and timer section 50 maintain the gas flow by pressure regulators (not shown), mass flow meters (not shown), and timers (not shown). Chemical vapors are introduced for so long as required to deposit the film. At the end of the process, the chemical source vapors are flushed out and wafer 10 is removed.

[0036]FIG. 5 illustrates a cross-sectional view of a chemical reaction chamber showing a thin layer of a-C:F formed on a wafer by way of a CVD process. Wafer 10 is placed on wafer holder 20 and loaded into reaction chamber 30. The chemicals containing the carbon and fluorine atoms or molecules required in an a-C:F layer, such as the hydrocarbon gas and fluorocarbon gas, originate from a chemical source (not shown) of hydrocarbon 80 and a chemical source of fluorocarbon 90. Hydrocarbon gas may include methane (CH4) and fluorocarbon gas may include octafluorobutane (C4F8). Hydrocarbon and fluorocarbon flow through flow control and timer section (not shown) and enter reaction chamber 30 to form a plasma 70. An inert gas, such as argon (Ar), that originates from a chemical source of inert gas 100 may also be introduced into plasma 70 to help stabilize plasma 70. The carbon and fluorine atoms or molecules, from hydrocarbon and fluorocarbon, respectively, deposit on the surface of wafer 10 and build up to form an a-C:F layer 15. Generally, CVD reactions require applying energy to the system, such as the plasma 70 shown or heating the chamber or the wafer.

[0037] A thin film of a-C:B:F, suitable for application as a barrier layer, hardmask, or anti-reflective coating (ARC) may be formed by treating the a-C:F layer with a boron-containing plasma in a CVD process.

[0038]FIG. 6 illustrates a cross-sectional view of a chemical reaction chamber showing a thin layer of a-C:B:F formed on a wafer by way of a CVD process, according to one embodiment of the present invention. Alternatively, a-C:B:F layer may also be formed by way of reactive sputtering. In forming a thin layer of a-C:B:F 120 on wafer 10, a boron-containing gas is mixed into reaction chamber 30 with the chemicals needed, such as hydrocarbon, fluorocarbon, and an inert gas for forming a thin layer of a-C:F on wafer 10. The boron-containing gas may include diborane (B2H6) or boron trifluoride (BF3). The thin layer of a-C:B:F 120 formed on wafer 10 may have a thickness no greater than a few hundred angstroms.

[0039] The composition of carbon, boron, and fluorine in a-C:B:F material is determined by the desirability for high thermal stability and low dielectric constant. The optional ratio may be separately determined and may be controlled by varying the ratios of the gas flows into the reaction chamber by controlling flow control and timer section. The composition of carbon may range from 30-70%, boron 5-30%, and the residue is fluorine. In one embodiment of the present invention a suitable a-C:B:F material contains a composition of 45% carbon, 15% boron, and 40% fluorine by atomic composition.

[0040]FIG. 6 illustrates an a-C:B:F layer formed by CVD techniques or reactive sputtering. An a-C:B:F layer may also be formed by CVD processes after an a-C:F material is formed on a wafer by CVD processes. Alternatively, an a-C:B:F layer may also be formed by reactive sputtering techniques after an a-C:F material is formed on a wafer by reactive sputtering techniques.

[0041]FIG. 7 illustrates a blown-up view of the cross-sectional view of the chemical reaction chamber of FIG. 6 showing a thin layer of a-C:B:F formed on the wafer. FIG. 7 illustrates the chemical reactions taking place at the growing a-C:B:F surface. Species that contribute to net film growth, such as CFY 140 and BFX 130 are formed in the plasma 70 and react to form part of the growing layer 120 when they impinge upon the surface of the growing layer 120. At the same time, species such as H can react with the surface to form volatile species, such as HF, which are then pumped out of the chamber 30. The competition among these various reactions controls the structure and stoichiometry of the layer 120.

[0042]FIG. 8 illustrates an implementation of an a-C:B:F material as a low-k dielectric material for providing an interconnect structure with low capacitance according to one embodiment of the present invention. A metal layer is formed upon a substrate 500. Metal deposition techniques are well-known in the art and are therefore not discussed in detail herein. The metal layer is then patterned, using well-known pattering techniques, into metal lines 510 and 520. To decrease the capacitance associated between metal lines 510 and 520, a-C:B:F material 530 is deposited between these metal lines by conventional chemical vapor deposition techniques.

[0043]FIG. 9 illustrates an implementation of an a-C:B:F material as a low-k dielectric material for providing an interconnect structure with low capacitance according to a second embodiment of the present invention. FIG. 9 shows that the a-C:B:F material of the present invention may also be used in a damascene process for forming metal interconnect lines. a-C:B:F material 530 is deposited according to the present invention, upon a substrate 500. a-C:B:F material 530 is patterned and etched to form trenches using well-known processing techniques. Metal 510 is then deposited in the trenches of the a-C:B:F material 530.

[0044]FIGS. 8 and 9 illustrate just a couple of implementations of the present invention in which an a-C:B:F material may be used for decreasing the capacitance between the metal lines. It is to be understood that there are many methods and many other interconnect structures where it is desirable to use the a-C:B:F material of the present invention to decrease capacitance in integrated circuit fabrication.

[0045] FIGS. 10-12 illustrate implementations of the present invention in which a barrier layer made of a-C:B:F material may be used to reduce outdiffusion in integrated circuit fabrication.

[0046]FIG. 10 illustrates an implementation of an a-C:B:F material utilized in an interconnect structure for reducing fluorine outdiffusion according to a third embodiment of the present invention. An a-C:B:F barrier layer 610 is deposited upon a low-k material 600. Low-k material 600 is used as an interlayer dielectric (ILD) to insulate (or isolate) future processing layers from the underlying layers of a substrate (not shown). A metal layer 620 is deposited upon low-k material 600. When processing temperatures increase, a-C:B:F barrier layer 610 acts as a barrier against fluorine diffusion from low-k material 600 and thereby decreases the potential for corrosion of metal layer 620.

[0047]FIG. 11 illustrates an implementation of an a-C:B:F material utilized in an interconnect structure for reducing fluorine outdiffusion according to a fourth embodiment of the present invention. A metal layer is deposited upon substrate 700. The metal layer is then patterned, using well-known pattering techniques, into metal lines 710 and 720. An a-C:B:F barrier layer 730 is conformally deposited upon metal lines 710 and 720 so as to protect metal lines 710 and 720 from fluorine outdiffusion from a low-k material 740 to be deposited thereon.

[0048]FIG. 12 illustrates an implementation of an a-C:B:F material utilized in an interconnect structure for reducing fluorine outdiffusion according to a fifth embodiment of the present invention. A low-k material 810 is deposited upon a substrate 800. An a-C:B:F barrier layer 820 is deposited upon low-k material 810. A metal layer 830 is then deposited upon a-C:B:F barrier layer 820. a-C:B:F barrier layer 820 protects metal layer 830 from fluorine outdiffusion from low-k material 810.

[0049] FIGS. 10-12 illustrate just a few implementations in which the a-C:B:F barrier layer of the present invention may be used in integrated circuit fabrication. It is to be understood that there are many methods and many other interconnect structures where it is desirable to use a-C:B:F barrier layer of the present invention to decrease fluorine outdiffusion in integrated circuit fabrication. A particular manufacturer may place a-C:B:F barrier layers in areas where it is of particular importance to protect the metal layers from fluorine outdiffusion.

[0050] It should be noted that an a-C:B:F material of the present invention may also be used as a hardmask to protect the interlayer dielectric (ILD) during etching and patterning of processing layers above the ILD. The present invention may also be used as a hardmask for patterning carbon-based dielectric materials with hydrogen-based reactive ion etching, for example.

[0051]FIG. 13 illustrates the use of an a-C:B:F material as a hardmask for patterning an underlying material, according to a sixth embodiment of the present invention. An underlying material, such as a low-k polymer, is deposited upon a substrate 2. An a-C:B:F material is deposited upon the underlying material and patterned by techniques well-known in the art to define an a-C:B:F pattern 8. A portion 4 of the underlying material is then patterned with the a-C:B:F pattern 8. The underlying material may be patterned by conventional hydrogen-based reactive ion etching, for example.

[0052] In the area of photolithography, the present invention may be used as an antireflective coating (ARC). An ARC aids the patterning of small images by cutting down on light scattering from, for example, a wafer surface into a resist. Since a-C:B:F materials act as an effective etch barrier and they absorb light, the need for an additional layer of ARC may be eliminated because an embodiment of the present invention may be used in place thereof. FIG. 14 illustrates the use of an a-C:B:F material as an anti-reflective coating (ARC), for creating a pattern on an underlying material according to a seventh embodiment of the present invention. An a-C:B:F material 6 is deposited upon an underlying material 4 on a substrate 2. A patterned photoresist layer (not shown) is then formed on the a-C:B:F material 6. The materials 4 and 6 may then be patterned according to the patterned photoresist layer by conventional patterning techniques.

[0053] Finally, the present invention may be used in other integration schemes where it is desired to use materials having characteristics of low dielectric constant and high thermal stability.

[0054]FIG. 15 illustrates a flow chart diagram with the steps of a method for forming a thermally stable low-dielectric constant material according to an embodiment of the process of the present invention. At step 1, a gas mixtures is prepared to form a fluorinated amorphous carbon (a-C:F) material. At Step 2, the gas mixture is mixed with a boron-containing gas to form a boron-doped-fluorinated amorphous-carbon (a-C:B:F) material.

[0055] In the foregoing specification, the invention has been described with reference to specific embodiments thereof. It will, however, be evident that various modifications and changes can be made thereto without departing from the broader spirit and scope of the invention as set forth in the appended claims. The specification and drawings are, accordingly, to be regarded in an illustrative rather than a restrictive sense. Therefore, the scope of the invention should be limited only by the appended claims.

Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US6767824Jan 6, 2003Jul 27, 2004Padmapani C. NallanMethod of fabricating a gate structure of a field effect transistor using an alpha-carbon mask
US6770332 *May 18, 2000Aug 3, 2004Tokyo Electron LimitedMethod for forming film by plasma
Classifications
U.S. Classification252/62.30Q, 257/E21.035, 430/315, 427/577, 438/623, 438/627, 427/97.3, 438/637, 204/192.15, 430/950, 427/249.7, 427/249.5, 427/96.8, 257/E21.27, 204/192.16, 427/122, 427/249.1, 257/E21.576, 430/313, 427/523, 427/530
International ClassificationC23C16/26, H01L21/768, H01L21/314, H01L21/033
Cooperative ClassificationH01L21/0332, H01L21/76834, C23C16/26, H01L21/76829, H01L21/76835, H01L21/76801, H01L21/3146
European ClassificationH01L21/768B12, H01L21/768B10, H01L21/768B10S, H01L21/314C, H01L21/768B, C23C16/26, H01L21/033D
Legal Events
DateCodeEventDescription
Sep 30, 1999ASAssignment
Owner name: ROCKWELL AUTOMATION, WISCONSIN
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:DOMBROVSKI, VIATCHESLAV;DRISCOLL, DAVID I.;SHOYKHET, BORIS A.;REEL/FRAME:010296/0555
Effective date: 19990929
Aug 24, 1998ASAssignment
Owner name: INTEL CORPORATION, CALIFORNIA
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:TOWLE, STEVEN N.;REEL/FRAME:009408/0457
Effective date: 19980817