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Publication numberUS20020004300 A1
Publication typeApplication
Application numberUS 09/371,715
Publication dateJan 10, 2002
Filing dateAug 9, 1999
Priority dateAug 9, 1999
Also published asUS6423650
Publication number09371715, 371715, US 2002/0004300 A1, US 2002/004300 A1, US 20020004300 A1, US 20020004300A1, US 2002004300 A1, US 2002004300A1, US-A1-20020004300, US-A1-2002004300, US2002/0004300A1, US2002/004300A1, US20020004300 A1, US20020004300A1, US2002004300 A1, US2002004300A1
InventorsMarina V. Plat, Christopher F. Lyons, Michael K. Templeton, Bhanwar Singh
Original AssigneeMarina V. Plat, Christopher F. Lyons, Michael K. Templeton, Bhanwar Singh
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Semiconductors
US 20020004300 A1
Abstract
In one embodiment, the present invention relates to a method of processing a semiconductor substrate, involving the steps of providing the semiconductor substrate having an upper surface; roughening the upper surface of the semiconductor substrate so that the upper surface of the semiconductor substrate has an Rtm of about 10 Å or more; and depositing an ultra-thin photoresist on the upper surface of the semiconductor substrate, the ultra-thin photoresist having a thickness of about 2,000 Å or less.
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Claims(20)
What is claimed is:
1. A method of processing a semiconductor substrate, comprising:
providing the semiconductor substrate having an upper surface;
roughening the upper surface of the semiconductor substrate so that the upper surface of the semiconductor substrate has an Rtm of about 10 Å or more; and
depositing an ultra-thin photoresist on the upper surface of the semiconductor substrate, the ultra-thin photoresist having a thickness of about 2,000 Å or less.
2. The method of claim 1, wherein the semiconductor substrate comprises one or more of a conductive layer, a semiconducting layer, and a dielectric layer.
3. The method of claim 1, wherein the upper surface of the semiconductor substrate is roughened using a plasma.
4. The method of claim 1, wherein the upper surface of the semiconductor substrate is roughened using an acid solution.
5. The method of claim 1, wherein the upper surface of the semiconductor substrate has an Rtm of about 25 Å or more.
6. The method of claim 1, wherein the ultra-thin photoresist having a thickness of about 1,750 Å or less.
7. The method of claim 1 further comprising irradiating the ultra-thin photoresist with electromagnetic radiation having a wavelength of about 200 nm or less.
8. A method of increasing adhesion between an ultra-thin photoresist and an upper surface of an underlying substrate, comprising:
contacting a plasma with the upper surface of the underlying substrate so as to roughen the upper surface; and
depositing the ultra-thin photoresist on the roughened upper surface of the underlying substrate, wherein the ultra-thin photoresist has a thickness of about 2,000 Å or less.
9. The method of claim 8, wherein the roughened upper surface of the underlying substrate has an Rtm of about 10 Å or more.
10. The method of claim 8, wherein the underlying substrate comprises at least one of a metal, a metal alloy, an oxynitride, a nitride, and a silicide.
11. The method of claim 8, wherein the plasma comprises at least one of a chlorine containing plasma, a fluorine containing plasma, a bromine containing plasma, an oxygen containing plasma and an argon containing plasma.
12. The method of claim 8, wherein the plasma comprises at least one of Cl2, HBr, HCl, Ar, O2, SF6, NF3, CF4, C4H8, C2F6 and CHF3.
13. The method of claim 8, wherein the plasma is contacted with the upper surface of the underlying substrate at a temperature from about to about and a pressure from about to about and for a time from about to about.
14. The method of claim 8 further comprising irradiating the ultra-thin photoresist with electromagnetic radiation having a wavelength of about 25 nm or less.
15. A method of increasing adhesion between an ultra-thin photoresist and an upper surface of an underlying substrate, comprising:
contacting an acid solution with the upper surface of the underlying substrate so as to roughen the upper surface, the roughened upper surface of the underlying substrate has an Rtm of about 25 Å or more; and
depositing the ultra-thin photoresist on the roughened upper surface of the underlying substrate, wherein the ultra-thin photoresist has a thickness of about 2,000 Å or less.
16. The method of claim 15, wherein the underlying substrate comprises at least one of an oxide, a low K polymer material and a silicon containing material.
17. The method of claim 15, wherein the acid solution comprises an acid and water, wherein the acid is at least one of CH3CO2H, H3PO4, HNO3, HF, HBr, and HCl.
18. The method of claim 15, wherein the acid solution comprises from about 0.001% to about 10% by weight of an acid and water.
19. The method of claim 15, wherein the acid solution is contacted with the upper surface of the underlying substrate at a temperature from about to about and for a time from about to about.
20. The method of claim 15, wherein the ultra-thin photoresist has a thickness from about 500 Å to about 1,500 Å.
Description
TECHNICAL FIELD

[0001] The present invention generally relates to ultra-thin photoresist coatings that strongly adhere to underlying substrates. In particular, the present invention relates to increasing the surface roughness of an underlying substrate and applying an ultra-thin photoresist coating over the roughened surface.

BACKGROUND ART

[0002] As the trend toward smaller and smaller semiconductor device dimensions continues, there is a constant demand to improve the methods of fabricating and processing such devices. For example, improvements in photolithography techniques lead to thinner gates, smaller vias, thinner lines and high density devices among other desirable features. Photolithography techniques can be improved by increasing resolution and increasing critical dimension control. Resolution and critical dimension control are affected by the thickness of a photoresist coating or layer. Therefore, attempts are made to decrease the thickness of photoresist coatings in order to achieve better resolution and critical dimension control.

[0003] However, there are limitations associated with making thin photoresist layers. This is because various difficulties are associated with using thin photoresist layers. One difficulty is defect density or the occurrence of pinholes in thin photoresist layers. Another difficulty associated with thin photoresist layers is dewetting. That is, the photoresist layer may pull back from the edge of the wafer or substrate during final spin, dewet around topography (poor step coverage) or lose adhesion in other areas of the wafer. Dewetting thus leads to incomplete or poor pattern formation. Yet another difficulty associated with thin photoresist layers is the inability to provide a uniformly coated substrate. The thinner a photoresist becomes, the ability to uniformly coat a substrate decreases. Photoresists that are not uniformly coated on substrates lead to decreased resolution and loss of critical dimension control.

SUMMARY OF THE INVENTION

[0004] The present invention provides ultra-thin photoresist coatings that strongly adhere to underlying substrates due to the surface roughness of an underlying substrate. The present invention thus also provides substrates having ultra-thin photoresists, on the order of 500 Å to 2,000 Å in thickness, that can be patterned with extremely high resolution enabling the production of thinner gates, smaller vias, thinner trenches, thinner lines, smaller devices and high density devices. The present invention also provides ultra-thin photoresist coatings that uniformly coat underlying substrates.

[0005] In one embodiment, the present invention relates to a method of processing a semiconductor substrate, involving the steps of providing the semiconductor substrate having an upper surface; roughening the upper surface of the semiconductor substrate so that the upper surface of the semiconductor substrate has an Rtm of about 10 Å or more; and depositing an ultra-thin photoresist on the upper surface of the semiconductor substrate, the ultra-thin photoresist having a thickness of about 2,000 Å or less.

[0006] In another embodiment, the present invention relates to a method of increasing adhesion between an ultra-thin photoresist and an upper surface of an underlying substrate, involving the steps of contacting a plasma with the upper surface of the underlying substrate so as to roughen the upper surface; and depositing the ultra-thin photoresist on the roughened upper surface of the underlying substrate, wherein the ultra-thin photoresist has a thickness of about 2,000 Å or less.

[0007] In yet another embodiment, the present invention relates to a method of increasing adhesion between an ultra-thin photoresist and an upper surface of an underlying substrate, involving the steps of contacting an acid solution with the upper surface of the underlying substrate so as to roughen the upper surface, the roughened upper surface of the underlying substrate has an Rtm of about 25 Å or more; and depositing the ultra-thin photoresist on the roughened upper surface of the underlying substrate, wherein the ultra-thin photoresist has a thickness of about 2,000 Å or less.

BRIEF DESCRIPTION OF DRAWINGS

[0008]FIG. 1 illustrates a cross-sectional view of a portion of a semiconductor substrate according to one aspect of the present invention.

[0009]FIG. 2 illustrates a cross-sectional view of a portion of a semiconductor substrate having a roughened surface according to one aspect of the present invention.

[0010]FIG. 3 illustrates a cross-sectional view of a roughened semiconductor substrate having an ultra-thin photoresist thereon according to one aspect of the present invention.

DISCLOSURE OF INVENTION

[0011] The present invention involves increasing the surface roughness of the upper surface of a substrate prior to applying an ultra-thin photoresist thereto. The present invention more specifically involves providing an ultra-thin photoresist over a substrate wherein there is strong adhesion between the ultra-thin photoresist and the substrate, thereby improving photolithographic techniques. Even during final spin after application of an ultra-thin photoresist, strong adhesion is maintained between the ultra-thin photoresist and the substrate at all areas of the substrate including the center and outer edges.

[0012] The upper surface of the substrate surface over which an ultra-thin photoresist is deposited may contain any layer or device used in semiconductors. Semiconductor layers in this connection include one or more of conductive layers, semiconducting layers, and dielectric layers. Semiconductor devices generally include one or more of active elements and passive elements such as polysilicon gates, word lines, source regions, drain regions, bit lines, bases, emitters, collectors, conductive lines, conductive plugs, etc.

[0013] In one embodiment, the upper surface of the substrate is or contains a silicon containing layer. Silicon containing layers include monocrystalline silicon, doped or undoped polysilicon, amorphous silicon, silicon oxide, silicon nitride, silicon oxynitride and silicides. In another embodiment, the upper surface of the substrate is or contains a metal containing layer. Metal containing layers include metal layers, metal alloy layers, metal silicide layers, metal oxide layers, metal nitride layers. Examples of metal containing layers include one or more of aluminum, copper, gold, nickel, palladium, platinum, silver, tantalum, titanium, tungsten, zinc, aluminum-copper alloys, aluminum alloys, copper alloys, titanium alloys, tungsten alloys, titanium-tungsten alloys, gold alloys, nickel alloys, palladium alloys, platinum alloys, silver alloys, tantalum alloys, and zinc alloys, and silicides, nitrides and oxides thereof. Specific examples of metal containing layers, in addition to the metals and metal alloys listed above, include one or more of tantalum oxide, titanium oxide, titanium silicide, tungsten silicide, and titanium nitride.

[0014] In yet another embodiment, the upper surface of the substrate is or contains a dieletric material. In addition to those mentioned above, dielectric materials include low K polymer materials and various oxides. Low K polymer materials include polyimides, fluorinated polyimides, polysilsequioxane, benzocyclobutene (BCB), parlene F, parlene N and amorphous polytetrafluoroethylene. A specific example of a commercially available low K polymer material is Flare™ from AlliedSignal believed to be derived from perfluorobiphenyl and aromatic bisphenols. Oxides include silicon dioxide, fluorine doped silicon glass (FSG), tetraethylorthosilicate (TEOS), phosphosilicate glass (PSG), borophosphosilicate glass (BPSG), and any other suitable spin-on glass,

[0015] Prior to depositing an ultra-thin photoresist on the substrate, the upper surface of the substrate (the surface adjacent the subsequently deposited ultra-thin photoresist) is roughened to promote adhesion between the substrate and the ultra-thin photoresist. The roughening treatment, however, must not deleteriously effect or damage the substrate. The substrate surface is roughened using either a plasma or an acid solution.

[0016] Plasmas that are effective for roughening substrate surfaces include chlorine containing plasmas, fluorine containing plasmas, bromine containing plasmas, oxygen containing plasmas and argon containing plasmas. The plasma may optionally further contain an inert gas. Inert gases include noble gases, hydrogen and nitrogen. Nobles gases include He, Ne, Kr, and Xe. Plasmas include one or more of Cl2, HBr, HCl, Ar, O2, SF6, NF3, CF4, C4H8, C2F6 and CHF3. In preferred embodiments, plasmas are employed when the substrate is a metal, metal alloy, oxynitride, nitride, or silicide.

[0017] Rtm is the mean of the maximum peak-to-valley vertical measurement from each of five consecutive sampling measurements, and can be measured using known techniques including using one of an atomic force microscope and a scanning electron microscope. A rough surface is characterized by a “mountainous” features (numerous peaks and valleys) and/or dendritic features.

[0018] In one embodiment, the substrate is contacted with a plasma for a time sufficient to roughen the surface so that the surface has an Rtm of about 10 Å or more. Although the time varies primarily depending upon the identity of the substrate and the plasma, the flow rate, the temperature and pressure, in one embodiment, the substrate is contacted with the plasma from about 0.1 second to about 5 minutes. In another embodiment, the substrate is contacted with the plasma from about 1 second to about 2 minutes. In yet another embodiment, the substrate is contacted with the plasma from about 2 seconds to about 30 seconds. In this connection, the time is generally longer for substrates containing upper surfaces of metal compared to substrates containing upper surfaces of a dielectric material.

[0019] The substrate is contacted with a flow rate of the plasma sufficient to roughen the surface so that the surface has an Rtm of about 10 Å or more. Although the flow rate varies primarily depending upon the identity of the substrate and the plasma, the temperature, the time of contact and the pressure, in one embodiment, the flow rate of the plasma (including all active and/or active and inert components) contacted with the substrate is from about 1 sccm to about 4,000 sccm. In another embodiment, the flow rate of the plasma contacted with the substrate is from about 10 sccm to about 1,000 sccm. In yet another embodiment, the flow rate of the plasma contacted with the substrate is from about 20 sccm to about 500 sccm.

[0020] The substrate is contacted with the plasma at a temperature sufficient to roughen the surface so that the surface has an Rtm of about 10 Å or more. Although the temperature varies primarily depending upon the identity of the substrate and the plasma, the flow rate, the time of contact and the pressure, in one embodiment, the temperature at which the substrate is contacted with the plasma is from about 10° C. to about 500° C. In another embodiment, the temperature at which the substrate is contacted with the plasma is from about 20° C. to about 250° C. In yet another embodiment, the temperature at which the substrate is contacted with the plasma is from about 25° C. to about 100° C.

[0021] The substrate is contacted with the plasma at a pressure sufficient to roughen the surface so that the surface has an Rtm of about 10 Å or more. Although the pressure varies primarily depending upon the identity of the substrate and the plasma, the flow rate, the time of contact and the temperature, in one embodiment, the pressure at which the substrate is contacted with the plasma is from about 1 mtorr to about 1,000 torr. In another embodiment, the pressure at which the substrate is contacted with the plasma is from about 5 mtorr to about 800 torr.

[0022] Acid solutions that are effective for roughening substrate surfaces include at least one organic acid or inorganic acid. Acid solutions are typically dilute aqueous solutions of one or more of CH3CO2H, H3PO4, HNO3, HF, HBr, and HCl, including buffered HF, HBr, and HCl. In one embodiment, the acid solution contains from about 0.001% to about 10% by weight of the acid and the remaining portion water, buffers, and other additives. In another embodiment, the acid solution contains from about 0.01% to about 2% by weight of the acid and the remaining portion water, buffers, and other additives. In yet another embodiment, the acid solution contains from about 0.05% to about 1% by weight of the acid and the remaining portion water, buffers, and other additives. In preferred embodiments, acid solutions are employed when the substrate is an oxide, a low K polymer material or a silicon containing material such as polysilicon.

[0023] In another embodiment, the substrate is contacted with an acid solution at a temperature sufficient to roughen the surface so that the surface has an Rtm of about 10 Å or more. Although the temperature varies primarily depending upon the identity of the substrate and the acid, in one embodiment, the temperature at which the substrate is contacted with the acid solution (temperature of the acid solution) is from about 10° C. to about 200° C. In another embodiment, the temperature at which the substrate is contacted with the acid solution is from about 20° C. to about 180° C. In yet another embodiment, the temperature at which the substrate is contacted with the acid solution is from about 25° C. to about 60° C.

[0024] The substrate is contacted with the acid solution for a time sufficient to roughen the surface so that the surface has an Rtm of about 10 Å or more. Although the time varies primarily depending upon the identity of the substrate and the acid, in one embodiment, the substrate is contacted with the acid solution from about 0.1 second to about 5 minutes. In another embodiment, the substrate is contacted with the acid solution from about 1 second to about 2 minutes. In yet another embodiment, the substrate is contacted with the acid solution from about 2 seconds to about 40 seconds.

[0025] In one embodiment, a roughened surface (after contact with a plasma or acid solution) refers to a substrate surface having an Rtm of about 10 Å or more. In another embodiment, a roughened surface refers to a substrate surface having an Rtm of about 25 Å or more. In yet another embodiment, a roughened surface refers to a substrate surface having an Rtm of about 50 Å or more. In still yet another embodiment, a roughened surface refers to a substrate surface having an Rtm of about 75 Å or more. However, the roughened surface preferably has an Rtm of about 200 Å or less since extreme roughening contributes to poor coating uniformity of the ultra-thin photoresist. In another embodiment, the roughened surface has an Rtm of about 150 Å or less.

[0026] Prior to roughening the semiconductor surface, the Rtm of the semiconductor surface is typically less than 10 Å, and more typically less than 5 Å, and even more typically less than 3 Å. In this connection, the Rtm of the roughened semiconductor surface is higher than the Rtm of the non-roughened semiconductor surface. In one embodiment, the Rtm of the roughened semiconductor surface is at least about 5 Å higher than the Rtm of the non-roughened semiconductor surface. In another embodiment, the Rtm of the roughened semiconductor surface is at least about 10 Å higher than the Rtm of the non-roughened semiconductor surface. In yet another embodiment, the Rtm of the roughened semiconductor surface is at least about 20 Å higher than the Rtm of the non-roughened semiconductor surface.

[0027] After the upper semiconductor surface is roughened, an ultra-thin photoresist is deposited over the roughened semiconductor surface by any suitable means. For example, the ultra-thin photoresist is deposited over the roughened semiconductor surface by spin coating. Spin coating typically involves depositing the ultra-thin photoresist on the roughened semiconductor substrate and spinning the coated substrate until the photoresist is dry. Due to the roughened substrate surface, there is strong adhesion between the ultra-thin photoresist and the substrate.

[0028] Ultra-thin photoresists in accordance with the present invention have a thickness of about 2,000 Å or less. In one embodiment, the ultra-thin photoresist layer has a thickness from about 500 Å to about 2,000 Å. In another embodiment, the ultra-thin photoresist layer has a thickness from about 600 Å to about 1,750 Å (about 1,750 Å or less). In yet another embodiment, the ultra-thin photoresist layer has a thickness from about 750 Å to about 1,500 Å (about 1,500 Å or less).

[0029] The ultra-thin photoresist layer has a thickness suitable for functioning as a mask for etching the underlying layer and for forming patterns or openings in the developed ultra-thin photoresist layer that are about 0.1 μm or less, and even about 0.05 μm or less. Since the ultra-thin photoresist layer is relatively thin compared with I-line and other photoresists, improved resolution and critical dimension control is realized.

[0030] Ultra-thin resists are processed using small wavelength radiation. As used herein, small wavelength radiation means electromagnetic radiation having a wavelength of about 250 nn or less. In one embodiment, small wavelength radiation includes electromagnetic radiation having a wavelength of about 200 nm or less. In another embodiment, small wavelength radiation includes extreme ultraviolet (UV) electromagnetic radiation having a wavelength of about 25 nm or less. In yet another embodiment, small wavelength radiation includes extreme UV electromagnetic radiation having a wavelength of about 15 nm or less.

[0031] Small wavelength radiation increases precision and thus the ability to improve resolution and critical dimension control. Specific examples of wavelengths to which the ultra-thin photoresists are sensitive (undergo chemical transformation enabling subsequent development) include about 248 mn, about 193 mn, about 157 nm, about 13 nm, about 11 nm and about 1 nn. Specific sources of radiation include KrF excimer lasers having a wavelength of about 248 nm, a XeHg vapor lamp having a wavelength from about 200 nm to about 250 nm, mercury-xenon arc lamps having a wavelength of about 248 nm, an ArF excimer laser having a wavelength of about 193 nm, an F2 excimer laser having a wavelength of about 157 nm, extreme UV light having wavelengths of about 13.5 nm and/or 11.4 nm, and X-rays having a wavelength of about 1 nm.

[0032] In embodiments where the patterns or openings formed in the developed ultra-thin photoresist layer are from about 0.1 μm to about 0.15 μm, a 157 nm sensitive photoresist or a 193 nm sensitive photoresist is preferably employed. In embodiments where the patterns or openings formed in the developed ultra-thin photoresist layer are about 0.1 μm or less, a 13 nm sensitive photoresist or an 11 nm sensitive photoresist (extreme UV photoresist) is preferably employed.

[0033] Positive or negative ultra-thin photoresists may be employed in the methods of the present invention. An example of a deep UV chemically amplified photoresist is a partially t-butoxycarbonyloxy substituted poly-p-hydroxystyrene. Photoresists are commercially available from a number of sources, including Shipley Company, Kodak, Hoechst Celanese Corporation, and Brewer.

[0034] Suitable subsequent processing of the ultra-thin photoresist is conducted including developing the ultra-thin photoresist, semiconductor processing (etching or depositing materials using the patterned ultra-thin photoresist), and stripping the ultra-thin photoresist from the substrate. In many instances, the roughened substrate surface provides the additional advantage that a deposited film, the film deposited during semiconductor processing using the patterned ultra-thin photoresist, adheres more strongly to the substrate surface compared to the same film deposited to an non-roughened substrate surface.

[0035] Aspects of the present invention are now discussed in view of the figures. Referring to FIG. 1, a cross-sectional view of a portion of a semiconductor device 10 is illustrated. The method of FIGS. 1-3 may be adapted to any photolithography process including making electrical contacts to various device structures, active elements and passive elements including polysilicon gates, wordlines, source regions, drain regions, bit lines, bases, emitters, collectors, conductive lines, conductive plugs, etc. The method of FIGS. 1-3 may be used with any suitable semiconductor technology including but not limited to NMOS, PMOS, CMOS, BiCMOS, bipolar, multi-chip modules (MCM) and III-IV semiconductors.

[0036] Semiconductor device 10 includes semiconductor wafer 12 and semiconductor substrate 14A. Semiconductor wafer 12 may include any suitable semiconductor material, for example, a monocrystalline silicon substrate. Semiconductor substrate 14A also includes any suitable semiconductor material or semiconductor device, for example, one or more of a conductive layer, a semiconducting layer, and a dielectric layer. In this embodiment, semiconductor substrate 14A comprises titanium nitride. Semiconductor substrate 14A has a smooth upper surface 14B. The Rtm of the upper surface 14B of semiconductor substrate 14A is about 3 Å.

[0037] Referring to FIG. 2, semiconductor device 10 and in particular the semiconductor substrate 14A is contacted with a plasma. The plasma interacts with the upper surface of the semiconductor substrate 14A and provides a roughened semiconductor surface 14C. Specifically, a mixture of 40 sccm O2 and 40 sccm Ar at 40° C. under 200 torr is contacted with the semiconductor device 10 for 15 seconds. The Rtm of the upper surface 14C of semiconductor substrate 14A is about 30 Å.

[0038] Referring to FIG. 3, an ultra-thin photoresist 16 is deposited using spin coating techniques over the roughened semiconductor surface 14C of the semiconductor substrate 14A. For example, a 13 nm sensitive photoresist is deposited over semiconductor substrate 14A. The ultra-thin photoresist 16 has a thickness of about 1,000 Å (approximately between about 985 Å and about 1,015 Å given the Rtm of the roughened semiconductor surface 14C). Strong adhesion between the ultra-thin photoresist 16 and semiconductor substrate 14A is exhibited in all areas of the semiconductor device 10; namely, at portions of the middle of the semiconductor device 10, portions between the middle and edge of the semiconductor device 10, as well as portions near the edge of semiconductor device 10. The semiconductor device 10 including the ultra-thin photoresist 16 over the roughened semiconductor surface 14C is subjected to suitable photolithographic processing steps including photoresist development to provide a patterned ultra-thin photoresist, semiconductor device 10 processing, and photoresist stripping. The strong adhesion is maintained during semiconductor device 10 processing such as etching steps and depositing steps using the patterned ultra-thin photoresist.

[0039] Although the invention has been shown and described with respect to a certain preferred embodiment or embodiments, it is obvious that equivalent alterations and modifications will occur to others skilled in the art upon the reading and understanding of this specification and the annexed drawings. In particular regard to the various functions performed by the above described components (assemblies, devices, circuits, etc.), the terms (including any reference to a “means”) used to describe such components are intended to correspond, unless otherwise indicated, to any component which performs the specified function of the described component (i.e., that is functionally equivalent), even though not structurally equivalent to the disclosed structure which performs the function in the herein illustrated exemplary embodiments of the invention. In addition, while a particular feature of the invention may have been disclosed with respect to only one of several embodiments, such feature may be combined with one or more other features of the other embodiments as may be desired and advantageous for any given or particular application.

Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US7157367 *Jun 4, 2004Jan 2, 2007Taiwan Semiconductor Manufacturing Co., Ltd.Device structure having enhanced surface adhesion and failure mode analysis
US20100248484 *Mar 26, 2010Sep 30, 2010Christopher BowerMethods of Forming Printable Integrated Circuit Devices and Devices Formed Thereby
WO2010111601A2 *Mar 26, 2010Sep 30, 2010Semprius, Inc.Methods of forming printable integrated circuit devices and devices formed thereby
Classifications
U.S. Classification438/665, 257/E21.314, 257/E21.024
International ClassificationH01L21/3213, H01L21/027
Cooperative ClassificationY10S438/964, Y10S438/974, H01L21/0271, H01L21/32139
European ClassificationH01L21/027B, H01L21/3213D
Legal Events
DateCodeEventDescription
Dec 27, 2013FPAYFee payment
Year of fee payment: 12
Dec 22, 2009FPAYFee payment
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Dec 28, 2005FPAYFee payment
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Aug 9, 1999ASAssignment
Owner name: ADVANCED MICRO DEVICES, INC., CALIFORNIA
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:PLAT, MARINA V.;LYONS, CHRISTOPHER F.;TEMPLETON MICHAEL K.;AND OTHERS;REEL/FRAME:010171/0519;SIGNING DATES FROM 19990730 TO 19990806