US 20020032570 A1 Abstract An analog continuous wavelet transform circuit is implemented using a bank of quadrature voltage controlled oscillators (VCOs) and a bank of synchronous receivers. The synchronous receivers act as a bandpass filter bank, the center frequency of each synchronous receiver bandpass filter being set by the frequency of a corresponding VCO. Each quadrature VCO generates differential in-phase (I) and quadrature (Q) outputs, and has a multiplier, gain amplifier/low-pass filter, and a squarer for both I and Q phases, and the squarer outputs are summed to produce the synchronous receiver output. Each synchronous receiver output represents the instantaneous input signal power within a specific bandpass filter bandwidth filter. The center frequency of the bandpass filter is determined by the VCO frequency, and the bandpass filter bandwidth is set by the synchronous receiver low-pass filter bandwidth.
Claims(22) 1. An analog continuous wavelet transform apparatus, comprising:
a plurality of quadrature voltage oscillators (VCOS) for generating center frequencies of a plurality of synchronous receivers; said plurality of synchronous receivers acting as a bandpass filter bank said bank comprising a plurality of bandpass filters, wherein center frequency of each of said plurality of bandpass filters is set by the frequency of a corresponding voltage controlled oscillator, and bandwidth of each of said bandpass filters is set by bandwidth of a lowpass filter of a corresponding synchronous receiver; and bandwidths of each of said bandpass filters is chosen whereby the overall power response of said bank of bandpass filters is uniform over the frequency range of said bandpass filter bank. 2. The apparatus of at least one multiplier; at least one gain amplifier; at least one squarer for acting on both in-phase (I) and quadrature (Q) phases to produce a squarer output; and means for combining said squarer output to produce a synchronous receiver output. 3. The apparatus of 4. The apparatus of 5. The apparatus of 6. The apparatus of 7. The apparatus of 8. The apparatus of 9. The apparatus of 10. The apparatus of 11. The apparatus of 12. The apparatus of 13. The apparatus of 14. The apparatus of 15. The apparatus of 16. The apparatus of 17. The apparatus of 18. The apparatus of 19. A method for performing time-frequency decomposition of a high frequency input signal using a wavelet basis, comprising:
generating differential in-phase (I) and quadrature (Q) outputs by a plurality of quadrature voltage controlled oscillators (VCOs); filtering said input signal by means of a plurality of synchronous receivers acting as a bandpass filter bank, each of said synchronous receivers acting as a bandpass filter, and wherein the center frequency of each of said synchronous receivers is set by the frequency of a corresponding VCO; and producing an output at each of said synchronous receivers, wherein output of each said synchronous receivers represents the instantaneous input signal power within a corresponding bandpass filter. 20. The method of 21. The method of 22. The method of Description [0001] The present application is based on and claims priority from Provisional Application Ser. No. 60/178,836 filed on Jan. 7, 2000. [0002] 1. Technical Field of the Invention [0003] This invention relates generally to an analog circuit, and more particularly, to an analog circuit approach to implement a continuous wavelet transform circuit to decompose an input signal using a wavelet basis to produce a time-frequency description of the input signal. [0004] 2. Description of the Related Art [0005] Decomposition of a signal into components with respect to frequency and time was studied in the past. Prior works were related to the orthogonal decomposition of a signal where time and frequency were unrelated to one another. This decomposition is called as “wavelet transform” which is dependent both on frequency and time. [0006] Various analog and switched-capacitor continuous wavelet transform circuits have been proposed for audio frequency operation. High frequency continuous wavelet transform circuits have potential applications in radar and communications signals processing. Radar applications for wavelet decomposition include chirp detection and matched filtering since radar returns are attenuated, delayed, and dilated versions of transmitted radar pulses. [0007] U.S. Pat. No. 4,974,187 to Lawton discloses a system that decomposes a digital input sequence into its digital wavelet transform. The digital sampling of an analog input to form the digital input sequence loses some of the information of the input signal. [0008] U.S. Pat. No. 5,495,554 to Edwards et al. discloses an analog wavelet transform circuitry for implementing a continuous wavelet transform by forming a multiplicity of analog wavelet outputs. The method comprises filtering an input signal to produce a multiplicity of analog wavelet outputs; sampling the multiplicity of analog wavelet outputs to produce digitally sampled wavelet data; and compressing the digitally sampled wavelet data into a reduced amount of digital data. [0009] Also, wavelet transforms have been suggested in the prior art for use in data compression wherein signal information is arranged in a fashion that would facilitate data compression. Thus, wavelet transforms have many applications in signal processing and image processing. Usually, wavelet transforms are used on discrete-time digital data. However, for certain applications, the wavelet decomposition cannot be performed in real-time using conventional sampled-data and digital techniques. The prior art references fail to teach or suggest an analog continuous wavelet transform circuit which provides a real-time wavelet decomposition at high sampling frequencies. Furthermore, none of the prior art references teach or suggest an analog wavelet transform circuit wherein increasing the number of channels (i.e., the size of the filter bank) does not increase the time required to perform the wavelet decomposition. [0010] Thus, there is a need for an analog continuous wavelet transform circuit which provides a real-time wavelet decomposition at high sampling frequencies. There is also a further need for an analog continuous wavelet transform circuit wherein increasing the number of channels (i.e., the size of the filter bank) does not increase the time required to perform the wavelet decomposition. The system and method of the present invention offers an effective solution overcoming the problems encountered by the prior art. [0011] Accordingly, the present invention is directed to an analog continuous wavelet transform circuit and method for decomposing an input signal using a wavelet basis to produce a time-frequency description of the input signal. [0012] In one aspect, the present invention is directed to an analog continuous wavelet transform apparatus which comprises a plurality of quadrature voltage controlled oscillators (VCOs) for generating center frequencies of a plurality of synchronous receivers, wherein each quadrature VCO generates differential in-phase (I) and quadrature (Q) outputs. The plurality of synchronous receivers act as a bandpass filter bank which comprises a plurality of bandpass filters. The center frequency of each of the plurality of bandpass filters is set by the frequency of a corresponding voltage controlled oscillator, and bandwidth of each of the bandpass filters is set by bandwidth of a lowpass filter of a corresponding synchronous receiver. The bandwidths of each of the bandpass filters is chosen in such a manner so as to make the overall power response of the bank of bandpass filters uniform over the frequency range of the bandpass filter bank. [0013] Each of the synchronous receivers of the analog continuous wavelet transform apparatus further comprises at least one multiplier, at least one gain amplifier, and at least one squarer for both in-phase (I) and quadrature (Q) phase to produce a squarer output, and means for combining the squarer outputs to produce a synchronous receiver output. Gilbert multipliers may be used to perform the multiplication and squaring functions. The wavelet transform apparatus further includes a circuit to remove the offset of the gain amplifier. The output of each of the synchronous receivers represents the instantaneous input signal power within a specific bandpass filter. Each of the bandpass filters may act as a channelized receiver. Each squarer further comprises at least one adder circuit, and an analog compressing circuit implemented within the adder circuit in order to increase the dynamic range of the wavelet transform apparatus. [0014] The order of each of the bandpass filters is determined by the order of a corresponding synchronous receiver. Resistive dividers may be used to bias the intermediate VCOs among the plurality of the VCOs. The endpoints of the resistor dividers may be biased using fixed voltages or by using phase locked loops (PLLs) having fixed frequency reference as inputs. The voltages to the resistor voltage dividers are controlled by applying programmable voltages. The wavelet transform apparatus further includes analog-to-digital converters for converting the analog output to a digital output for each of the bandpass filters. An analog multiplexer may be used for multiplexing a plurality of parallel bandpass filter outputs to a single analog-to-digital converter. The wavelet transform apparatus further comprises a plurality of frequency synthesizers to generate the center frequencies of the plurality of synchronous receivers. The plurality of frequency synthesizers are implemented with at least one of PLL architecture, fractional-N PLL architecture, or direct digital synthesizer (DDS) architecture. [0015] In another aspect, the present invention is directed to a method for performing time-frequency decomposition of a high frequency input signal using a wavelet basis, comprising generating differential in-phase (I) and quadrature (Q) outputs by a plurality of quadrature voltage controlled oscillators (VCOs). The high frequency input signal is filtered by means of a plurality of synchronous receivers acting as a bandpass filter bank. Each of the synchronous receivers act as a bandpass filter, and the center frequency of each of the synchronous receivers is set by a frequency of a corresponding voltage controlled oscillator (VCO). An output is produced at each of the synchronous detectors wherein each of the outputs represents an instantaneous input signal power within a corresponding bandpass filter. [0016] In another exemplary embodiment, the high frequency input signal is a one-dimensional time signal having a time-varying voltage. The bandpass filter bank measures the energy of the input signal within an overlapping bank of bandpass filters. Further, the simultaneous sampling of outputs of each of the bandpass filters is performed using sample-and-hold circuits. [0017] Still other objects and advantages of the present invention will become apparent to those skilled in the art from the following detailed description, wherein only the preferred embodiment of the invention is shown and described, simply by way of illustration of the best mode contemplated of carrying out the invention. As will be realized, the invention is capable of different embodiments, and its several details are capable of modifications in various obvious respects, all without departing from the invention. Accordingly, the drawings and description are to be regarded as illustrative in nature, and not as restrictive. [0018] A more complete understanding of the present invention may be had by reference to the following Detailed Description when taken in conjunction with the accompanying drawings wherein: [0019]FIG. 1 illustrates an overview of the continuous wavelet transform circuit of the present invention. [0020]FIG. 2 illustrates the synchronous detector block diagram of the present invention. [0021]FIG. 3 is a graph depicting the frequency response for a single-pole low pass filter in the synchronous receiver circuit. [0022]FIG. 4 is a graph depicting the frequency response for a two-pole low pass filter in the synchronous receiver circuit. [0023]FIG. 5 illustrates a VLSI implementation of the continuous wavelet transform apparatus. [0024]FIG. 6 is a schematic of a phase locked loop with quadrature voltage controlled oscillator. [0025]FIG. 7 is a schematic of a bank of frequency generators controlled by replica phase locked loops. [0026] In the drawings, like or similar elements are designated with identical reference numerals throughout the drawings, and the various elements depicted are not necessarily drawn to scale. Referring now to FIG. 1, there is shown a general overview of the continuous wavelet transform circuit of the present invention implemented using a bank of quadrature voltage controlled oscillators (VCOs) or frequency synthesizers [0027] Against the above description of FIG. 1, description of FIG. 2 may be better understood. FIG. 2 discloses a synchronous detector block diagram of the present invention. A bank of synchronous receivers (not shown) act as a bandpass filter bank, the center frequency of each synchronous receiver is set by the frequency of a corresponding voltage controlled oscillator. Each VCO [0028] Each synchronous receiver output [0029] The widths of the bandpass filters are also varied in a geometrically related manner. For the bank of bandpass filters (or channelized receiver), equally-spaced frequencies are used. For instance, the bandwidth of the synchronous receiver low-pass filter is approximately equal to the frequency spacing of VCO [0030] The bandwidths of the bandpass filters are chosen so that the overall power response of the bank of bandpass filters is uniform over the frequency range of the filter bank (for example, the 3 dB bandwidth of the synchronous receiver lowpass filter [0031] An approach to increase the dynamic range of the analog continuous wavelet transform circuit [0032] Since increasing the number of channels can be used to increase system performance, size and power dissipation constraints play an important role in the design for the continuous wavelet transform apparatus. For instance, for a 2 micron design, the channels were laid out on a 150 micron pitch with under 100 mW power dissipation per channel and a maximum operating frequency of 50 MHz. For a 0.5 micron design, the channels were laid out on a 56 micron pitch with under 40 mW power dissipation per channel and a maximum operating frequency in excess of 100 MHz. The total size of a 16-channel 2 micron chip was 4750 microns by 3100 microns. [0033] The design of the VCO is particularly critical since the VCO should have a constant, frequency-independent output voltage, and also should be tunable over as large frequency range as possible. For the present invention, Diodes may be used to set the output amplitude, triode MOSFET resistors to change the oscillation frequency, and bias current adjustment slaved to the triode resistor setting to compensate for the change in loop gain associated with changing the triode resistor values. To prevent drifts in the frequencies of VCO [0034] In another embodiment of the present invention, analog-to-digital converters (ADCs) may be used to convert the analog output of each of the synchronous bandpass filter bank to digital data. An analog multiplexer is used to multiplex a number of parallel bandpass filter outputs to a single ADC. For instance, eight of sixteen bandpass filter outputs may be multiplexed to a single ADC. A conventional sample-and-hold circuit may be provided at the output of each of the synchronous receivers filter to allow simultaneous sampling of the bandpass filter results. [0035] As described above, a bank of VCOs [0036] In order to increase the data transmission rates, multicarrier communication systems, which resemble the bandpass filter bank circuit, at the receiver end may be used, wherein each of the bank of receivers at the receiving end correspond to one of the carrier frequencies. The analog continuous wavelet transform circuit [0037]FIG. 5 illustrates a VLSI implementation of the continuous wavelet transform apparatus of the present invention as illustrated in FIG. 1. FIG. 6 is a schematic of a phase locked loop with quadrature voltage controlled oscillator. [0038] It is believed that the operation and construction of the present invention will be apparent from the foregoing Detailed Description. While the apparatus and method shown and described have been characterized as being preferred, it should be readily understood that various changes, modification and enhancements could be made therein without departing from the scope of the present invention as set forth in the following claims. For example, it is possible to change the characteristics and design of the VCOs, synchronous receivers, and various other components may be added of deleted from the disclosed circuit of the present invention, without departing from the core concept. It is further possible to use a variety of filer functions. Accordingly, those skilled in the art should readily appreciate that these and other variations, additions, modifications, enhancements, et cetera, are deemed to be within the ambit of the present invention whose scope is determined solely by the following claims. Referenced by
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