CROSS REFERENCE TO RELATED APPLICATION

[0001]
This is continuationinpart of patent application Ser. No. 09/652,869, filed on Aug. 31, 2000.
BACKGROUND OF THE INVENTION

[0002]
1. Field of the Invention

[0003]
This invention relates to isolated dc/dc converters, and more particularly, to the constantfrequency, isolated dc/dc fullbridge converters that operate with ZVS of the primaryside switches in a wide range of input voltage and load current.

[0004]
2. Description of the Prior Art

[0005]
The major factors hindering the operation of conventional (“hardswitched”) pulsewidthmodulated (PWM) converters at higher switching frequencies are circuit parasitics such as semiconductor junction capacitances, transformer leakage inductances, and rectifier reverse recovery. Generally, these parasites introduce additional switching losses and increase component stresses, and, consequently, limit the maximum frequency of operation of “hardswitched” converters. To operate converters at higher switching frequencies and, eventually, achieve higher power densities, it is necessary to eliminate, or at least reduce, the detrimental effects of parasitics without a degradation of conversion efficiency. The most effective approach in dealing with parasitics is to incorporate them into the operation of the circuit so that the presence of parasitics does not affect the operation and performance of the circuit. Generally, this incorporation of parasitics can be accomplished by two techniques: the resonant techniques and constantfrequency PWM softswitching techniques.

[0006]
The common feature of the resonant techniques is the employment of a resonant tank that is used to shape the current and voltage waveforms of the semiconductor switch (es) to create conditions for either zerocurrent turnoff, or zerovoltage turnon. However, zerocurrent switching (ZCS), or zerovoltage switching (ZVS) in resonanttype converters is achieved at the expense of increased current and/or voltage stresses of semiconductors compared to the stresses in the corresponding “hardswitched” topologies. In addition, the majority of resonant topologies need to circulate a significant amount of energy to create ZCS or ZVS conditions, which increases conduction losses. This strong tradeoff between the switchingloss savings and increased conduction losses may result in a lower efficiency and/or larger size of a highfrequency resonanttype converter compared to its PWM counterpart operating at a lower frequency. This is often the case in applications with a wide inputvoltage range. In addition, variable frequency of operation is often perceived as a disadvantage of resonant converters. As a result, although resonant converters are used in a number of niche applications such as those with pronounced parasitics, the resonant technique has never gain a wide acceptance in the powersupply industry in highfrequency highpowerdensity applications.

[0007]
To overcome some of the deficiencies of the resonant converters, primarily increased current stresses and conduction losses, a number of techniques that enable constantfrequency PWM converters to operate with ZVS, or ZCS have been proposed. In these softswitching PWM converters that posses the PWMlike squaretype current and voltage waveforms, lossless turnoff or turnon of the switch (es) is achieved without a significant increase of the conduction losses. Due a relatively small amount of the circulating energy required to achieve soft switching, which minimizes conduction losses, these converters have potential of attaining high efficiencies at high frequencies.

[0008]
One of the most popular softswitched PWM circuit is the softswitched, fullbridge (FB) PWM converter shown in FIG. 1(a), which is discussed in the article “Design Considerations for HighVoltage HighPower FullBridge ZeroVoltageSwitched PWM Converter,” by J. Sabate et al., published in IEEE Applied Power Electronics Conf. (APEC) Proc., pp. 275284, 1990. This converter features ZVS of the primary switches at a constant switching frequency with a reduced circulating energy. The control of the output voltage at a constant frequency is achieved by the phaseshift technique. In this technique the turnon of a switch in the Q_{3}Q_{4 }leg of the bridge is delayed, i.e., phase shifted, with respect to the turnon instant of the corresponding switch in the Q_{1}Q_{2 }leg, as shown in FIG. 1(b). If there is no phaseshift between the legs of the bridge, no voltage is applied across the primary of the transformer and, consequently, the output voltage is zero. On the other hand, if the phase shift is 180°, the maximum voltsecond product is applied across the primary winding, which produces the maximum output voltage. In the circuit in FIG. 1(a), the ZVS of the laggingleg switches Q_{3 }and Q_{4 }is achieved primarily by the energy stored in output filter inductor L_{F}. Since the inductance of L_{F }is relatively large, the energy stored in L_{F }is sufficient to discharge output parasitic capacitances C_{3 }and C_{4 }of switches Q_{3 }and Q_{4 }in the lagging leg and to achieve ZVS even at very light load currents. However, the discharge of the parasitic capacitances C_{1 }and C_{2 }of leadingleg switches Q_{1 }and Q_{2 }is done by the energy stored in leakage inductance L_{LK }of the transformer because during the switching of Q_{1}, or Q_{2 }the transformer primary is shorted by the simultaneous conduction of rectifiers D_{1 }and D_{2 }that carry the output filter inductor current. Since leakage inductance L_{LK }is small, the energy stored in L_{LK }is also small so that ZVS of Q_{1 }and Q_{2 }is hard to achieve even at relatively high output currents. The ZVS range of the leadingleg switches can be extended to lower load currents by intentionally increasing the leakage inductance of the transformer and/or by adding a large external inductance in series with the primary of the transformer. If properly sized, the external inductance can store enough energy to achieve ZVS of the leadingleg switches even at low currents. However, a large external inductance also stores an extremely high energy at the full load, which produces a relatively large circulating energy that adversely affects the stress of the semiconductor components, as well as the conversion efficiency.

[0009]
In addition, a large inductance in series with the primary of the transformer extends the time that is need for the primary current to change direction from positive to negative, and vice verse. This extended commutation time results in a loss of duty cycle on the secondary of the transformer, which further decreases the conversion efficiency. Namely, to provide full power at the output, the secondaryside dutycycle loss must be compensated by reducing the turns ratio of the transformer. With a smaller transformer's turns ratio, the reflected output current into the primary is increased, which increases the primaryside conduction losses. Moreover, since a smaller turns ratio of the transformer increases the voltage stress on the secondaryside rectifiers, the rectifiers with a higher voltage rating that typically have higher conduction losses may be required.

[0010]
Finally, it should be noted that one of the major limitations of the circuit in FIG. 1(a) is a severe parasitic ringing at the secondary of the transformer during the turnoff of a rectifier. This ringing is cased by the resonance of the rectifier's junction capacitance with the leakage inductance of the transformer and the external inductance, if any. To control the ringing, a heavy snubber circuit needs to be used on the secondary side, which may significantly lower the conversion efficiency of the circuit.

[0011]
The ZVS range of the leadingleg switches in the FB ZVSPWM converter in FIG. 1(a) can be extended to lower load currents without a significant increase of the circulating energy by using a saturable external inductor instead of the linear inductor, as described in the article “An Improved FullBridge ZeroVoltageSwitched PWM Converter Using a Saturable Inductor,” by G. Hua et al., published in IEEE Power Electronics Specialists' Conf Rec., pp. 189194, 1991, and in U.S. Pat. No. 5,132,889, “ResonantTransition DCtoDC Converter,” by L. J. Hitchcock et. al., issued on Jul. 21, 1992. However, even with the modifications, the performance of these converters is far from optimal.

[0012]
An FB ZVSPWM converter that achieves ZVS of the primary switches in the entire load and line range with virtually no loss of secondaryside duty cycle and with minimum circulating energy was described in patent application Ser. No. 09/652,869, filed Aug. 31, 2000 by Jang and Jovanović and assigned to the assignee of this application. This converter, shown in FIG. 2, employs a primaryside coupled inductor to achieve a widerange ZVS. The two windings of the coupled inductor are connected in series and their common terminal is connected to one end of the primary winding of the transformer, which has the other end of the primary winding connected to the ground. The other two terminals of the coupled inductor are connected to the midpoint of the two bridge legs through a corresponding blocking capacitor. The secondary side can be implemented with any type of the fullwave rectifier such, for example, the fullwave rectifier with a centertap secondary, the fullwave rectifier with current doubler, or the fullbridge fullwave rectifier. The output voltage regulation in the converter is achieved by employing a constantfrequency phaseshift control as in the circuit in FIG. 1(a).

[0013]
The circuit in FIG. 2 utilizes the energy stored in the magnetizing inductance of the coupled inductor to discharge the capacitance across the switch that is about to be turned on and, consequently, achieve ZVS. By properly selecting the value of the magnetizing inductance of the coupled inductor, the primary switches in the converter in FIG. 2 can achieve ZVS even at no load. This feature is quite different from the characteristics of the conventional FB ZVS where the capacitances of the laggingleg switches are discharge by the energy stored in the output filter inductor, whereas the discharge of the capacitances of the leadingleg switches is done by the energy stored in the leakage inductance of the transformer or external inductance. Because in the circuit in FIG. 2 the energy required to create ZVS conditions at light loads does not need to be stored in the leakage inductance, the transformer leakage inductance can be minimized. As a result, the loss of the duty cycle on the secondaryside is minimized, which maximizes the turns ratio of the transformer and, consequently, minimizes the conduction losses. In addition, the minimized leakage inductance of the transformer significantly reduces the secondaryside ringing caused by the resonance between the leakage inductance and junction capacitance of the rectifier, which greatly reduces the power dissipation of a snubber circuit that is usually used to damp the ringing.

[0014]
In this invention, the concept employed to achieve ZVS of the primary switches in the converter in FIG. 2 is generalized. The generalized concept is used to derive a family of FB ZVS converters with the same characteristics.
SUMMARY OF THE INVENTION

[0015]
The present invention discloses a family of isolated, constantfrequency, phaseshiftmodulated FB ZVSPWM converters that provide ZVS of the bridge switches in a wide range of input voltage and load current. Generally, the converters of this family employ two transformers that are connected to the bridge legs so that a change in the phase shift between the two legs of the bridge increases the voltsecond product on the windings of one transformer and decreases the voltsecond product on the windings of the other transformer. By connecting a load circuit to the secondary winding(s) of one transformer and by regulating the output of the load circuit, the energy stored in a properly selected magnetizing inductance of the other transformer can be used for creating ZVS conditions. Specifically, as the load current and/or input voltage decreases, the phase shift between the bridge legs changes so that the voltsecond product on the windings of the transformer connected to the load also decreases. At the same time, the voltsecond product on the windings of the other transformer increases, which increases the energy stored in the magnetizing inductance of the transformer. Therefore, since available energy for ZVS stored in the magnetizing inductance increases as the load current and/or input voltage decreases, the circuits of the present invention can achieve ZVS in a very wide range of input voltage and load current, including no load.

[0016]
Since the energy used to create the ZVS condition at light loads is not stored in the leakage inductances of the transformer, the transformer's leakage inductances can be minimized, which also minimizes the dutycycle loss on the secondary side of the transformer. As a result, the converters of this invention can operate with the largest duty cycle possible, thus minimizing both the conduction loss of the primary switches and voltage stress on the components on the secondary side of the transformer, which improves the conversion efficiency. Moreover, because of the minimized leakage inductances, the secondaryside parasitic ringing caused by a resonance between the leakage inductances and the junction capacitance of the rectifier is also minimized so that the power dissipation of a snubber circuit usually required to damp the ringing is also reduced.

[0017]
The circuits of the present invention can be either implemented as dc/dc converters, or dc/ac inverters. If implemented as dc/dc converters, any type of the secondaryside rectifier can be employed such, for example, the fullwave rectifier with a centertap secondary winding, fullwave rectifier with current doubler, or a fullbridge fullwave rectifier. In addition, in some embodiments of the present invention, the transformer that is not connected to the load circuit reduces to a single winding inductor.
BRIEF DESCRIPTION OF THE DRAWINGS

[0018]
[0018]FIG. 1 shows the conventional fullbridge ZVSPWM converter: (a) circuit diagram of power stage; (b) gatesignal timing diagrams. (prior art).

[0019]
[0019]FIG. 2 shows the improved fullbridge ZVSPWM converter with wide ZVS range.

[0020]
[0020]FIG. 3 shows a generalized embodiment of the fullbridge ZVSPWM converter of this invention.

[0021]
[0021]FIG. 4 shows the control timing diagrams of the switches and the voltages across the primary windings of transformers TX and TY (voltages v_{AB }and v_{CO}, respectively).

[0022]
[0022]FIG. 5 shows a simplified circuit diagram of the converter in FIG. 3 when output Y is regulated.

[0023]
[0023]FIG. 6 shows the key current and voltage waveforms of the circuit in FIG. 5.

[0024]
[0024]FIG. 7 shows a simplified circuit diagram of the converter in FIG. 3 when output X is regulated.

[0025]
[0025]FIG. 8 shows the key current and voltage waveforms of circuit in FIG. 7.

[0026]
[0026]FIG. 9 is another generalized embodiment of the fullbridge ZVSPWM converter of this invention.

[0027]
[0027]FIG. 10 is another generalized embodiment of the circuit in FIG. 3 obtained by splitting the primary winding of transformer TY.

[0028]
[0028]FIG. 11 is another generalized embodiment of the circuit in FIG. 9 obtained by splitting the primary winding of transformer TY.

[0029]
[0029]FIG. 12 shows the implementation of the dc/dc FB ZVSPWM converter derived from the circuit in FIG. 3 when output Y is regulated.

[0030]
[0030]FIG. 13 shows implementation of dc/dc FB ZVSPWM converter derived from the circuit in FIG. 9 when output Y is regulated.

[0031]
[0031]FIG. 14 shows the implementation of the dc/dc FB ZVSPWM converter derived from the circuit in FIG. 11 when output X is regulated.

[0032]
[0032]FIG. 15 shows the implementation of the dc/dc FB ZVSPWM converter derived from the circuit in FIG. 9 when output X is regulated.

[0033]
[0033]FIG. 16 shows the implementation of the dc/dc FB ZVSPWM converter derived from the circuit in FIG. 3 when output X is regulated.

[0034]
[0034]FIG. 17 shows the implementation of a highpower dc/dc converter that employs two FB ZVSPWM converters that share the same currentdoubler rectifier. Each FB ZVSPWM converter is derived from the circuit in FIG. 3 by regulating output Y.

[0035]
[0035]FIG. 18 shows a precharging circuit for capacitor C_{B1 }for the circuit implementation on FIG. 15.

[0036]
[0036]FIG. 19 shows a precharging circuit for capacitors C_{B1 }and C_{B2 }for the circuit implementation in FIG. 2.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT OF THE INVENTION

[0037]
[0037]FIG. 3 shows one of the generalized embodiments of the isolated, phaseshiftcontrolled FB ZVSPWM converter of this invention. The circuit in FIG. 3, employs two transformers TX and TY, which have their respective secondary outputs connected to two output circuits X and Y. Generally, in the dc/dc implementations of the converter in FIG. 3, each output circuit X and Y includes a rectifier, lowpass filter, and load, whereas in the dc/ac (inverter) applications each output circuit X and Y consists only of a combination of a load and filter. Two constant voltage sources V_{1 }and V_{2}, connected in series with the primary winding of transformer TX, are employed to provide the voltsecond balance on the windings of both transformers so that the transformers do not saturate.

[0038]
Generally, the voltsecond products of the windings of transformers X and Y in the circuit in FIG. 3 are dependent on the phaseshift between the turnon instances of the corresponding switches in bridge legs S_{1}S_{2 }and S_{3}S_{4}, as illustrated in FIG. 4. Namely, for the zero phase shift, i.e., when switches S_{1 }and S_{2 }and their corresponding switches S_{3 }and S_{4 }are turned on and off in unison (D=0 in FIG. 4), voltage v_{AB }across the primary of transformer TX is zero. As a result, for the zero phase shift, the voltsecond product of the primary winding of transformer TX is also zero. At the same time, since voltage v_{AC }across winding AC must be equal to voltage v_{CB }across winding CB because windings AC and CB have the same number of turns, and since v_{AB}=v_{AC}+v_{CB}=0, it follows that v_{AC}=v_{BC}=0. As a result, voltage vco across the primary winding of transformer TY is V_{IN}/2, i.e., the voltsecond product of the primary winding of this transformer is maximal. Similarly, when switches S_{1 }and S_{2 }and their corresponding switches S_{3 }and S_{4 }are turned on and off in antiphase, i.e., with a 180° phase shift (D=1 in FIG. 4), the voltsecond product on the primary of transformer TX is maximal, whereas the voltsecond product of the primary winding of transformer TY is zero (minimal). Because the output voltages of output circuits X and Y are directly proportional to the voltsecond products of the corresponding primary windings, the circuit in FIG. 3 delivers power to outputs X and Y in a complementary fashion. Specifically, for zero phase shift (D=0), the maximum power is delivered to output Y, whereas no power (or minimal power) is delivered to output X. For 180° phase shift (D=1), the maximum power is delivered to output X, whereas no power is delivered to output Y.

[0039]
Because the incremental changes of the delivered power to outputs X and Y with phaseshift changes are in opposite directions, the circuit in FIG. 3 cannot simultaneously regulate both outputs if constantfrequency control is employed. Nevertheless, the property of the circuit to deliver power to outputs X and Y in the complementary fashion makes the circuit ideal for implementing ZVS of the primary switches in a wide range of input voltage and load current. Namely, as already explained, the conventional FB ZVSPWM converter has difficulties achieving ZVS of the leadingleg switches. Specifically, as the load decreases the energy available for discharging the capacitance of the leadingleg switch that is about to be turned on, which is stored in the leakage inductance of the transformer and any seriesly connected external inductance, is decreasing as the load decreases. If in the converter in FIG. 3 one output is regulated, the energy in that output will decease as the load decreases. At the same time, the energy stored in the magnetizing inductance of the associated transformer will also decrease because a lighter load requires a smaller voltsecond product on the primary winding of the transformer. However, the energy in the other, unregulated, output circuit and in the magnetizing inductance of the corresponding transformer will increases because of an increased voltsecond product on the primary of the transformer. This increased energy in the unregulated output circuit and in the magnetizing inductance of its transformer can be used to create the ZVS condition for the primary switches at lighter loads, including no load.

[0040]
To facilitate the analysis of the operation of the circuit in FIG. 3, FIG. 5 shows its simplified circuit diagram when output Y is regulated. In the simplified circuit in FIG. 5, it is assumed that only energy stored in the magnetizing inductance of transformer TX of the unregulated output is used to create the ZVS condition. Because no energy stored in output circuit X is used to create the ZVS condition, output circuit X and the associated secondary of transformer X are not shown in FIG. 5. In fact, since in the circuit in FIG. 5 only the primary windings of transformer TX are used, transformer TX operates as a coupled inductor. Generally, this simplification does not have a significant effect on the operation of the circuit. Namely, if energy stored in output circuit X is used for ZVS in addition to the energy stored in the magnetizing inductance of transformer TX, the only effect of output circuit X is to increase the total available energy that can be used for creating the ZVS condition. However, due to a reduced component count, the implementation in FIG. 5 is preferred in practice.

[0041]
The further simplified the analysis, it is assumed that the resistance of the conducting semiconductor switches is zero, whereas the resistance of the nonconducting switches is infinite. In addition, the leakage inductances of both transformers are neglected since their effect on the operation of the circuit is not significant. Finally, the magnetizing inductance of transformer TY of the regulated output is also neglected since it does not have a significant effect on the operation of the circuit (although the energy stored in this inductance could be used to assist ZVS at heavier loads). However, the magnetizing inductance of transformer TX, which operates as a coupled inductor, and output capacitances of primary switches C_{1}C_{4 }are not neglected in this analysis since they play a major roll in the operation of the circuit. Consequently, in FIG. 5, transformer TX is modeled as an ideal transformer with magnetizing inductance L_{MX }connected across the series connection of primary windings AC, whereas transformer TY is modeled only by an ideal transformer with turns ratio n_{Y}. It should be noted that magnetizing inductance L_{MX }of transformer TX represents the inductance measured between terminals A and B.

[0042]
With reference to FIG. 5, the following relationships between currents can be established:

i _{PY} =i _{PX1} +i _{PX2}, (1)

N _{PY} i _{PY} =N _{SY} i _{SY}, (2)

i _{1} =i _{PX1} +i _{MX} (3)

i _{2} =i _{PX2} −i _{MX} (4)

[0043]
Since the number of turns of winding AC and winding CB of transformer TX are the same, it must be that

i _{PX1} =i _{PX2}. (5)

[0044]
Substituting Eq. (5) into Eqs. (1)(4) gives
$\begin{array}{cc}{i}_{{\mathrm{PX}}_{1}}={i}_{{\mathrm{PX}}_{2}}=\frac{{i}_{\mathrm{SY}}}{2\ue89e{n}_{Y}},& \left(6\right)\\ {i}_{1}=\frac{{i}_{\mathrm{SY}}}{2\ue89e{n}_{Y}}+{i}_{\mathrm{MX}},& \left(7\right)\\ {i}_{2}=\frac{{i}_{\mathrm{SY}}}{2\ue89e{n}_{Y}}{i}_{\mathrm{MX}},& \left(8\right)\end{array}$

[0045]
where N_{Y}=N_{PY}/N_{SY }is the turns ratio of transformer TY.

[0046]
As can be seen from Eqs. (7) and (8), currents of both bridge legs i_{1 }and i_{2 }are composed of two components: loadcurrent component i_{SY}/2n_{Y }and magnetizingcurrent component i_{MX}. The loadcurrent component is directly depended on the load current, whereas the magnetizing current does not directly depend on the load, but rather on the voltsecond product across the magnetizing inductance. Namely, a change of the magnetizing current with a change in the load current occurs only if the phase shift is changed to maintain the output regulation. Usually, the change of the phase shift with the load change is greater at light loads, i.e., as the load decreases toward no load, than at heavier loads. Since in the circuit in FIG. 5 the phase shift increases as the load approaches zero, the voltsecond product of L_{MX }also increases so that the circuit in FIG. 5 exhibits the maximum magnetizing current at no load, which makes possible to achieve ZVS at no load.

[0047]
Because magnetizing current i_{MX }does not contribute to the load current, but flows between the two bridge legs, as seen in FIG. 5, it represents a circulating current. Generally, this circulating current and its associated energy should be minimized to reduce losses and maximize the conversion efficiency. Due to an inverse dependence of the voltsecond product of L_{MX }on the load current, circuit in FIG. 5 circulates less energy at the full load than at a light load, and, therefore, features ZVS in a wide load range with a minimum circulating current.

[0048]
To further understand the operation of the circuit in FIG. 5, FIG. 6 shows its key current and voltage waveforms when the circuit is implemented as a dc/dc converter. The waveforms in FIG. 6 are obtained based on the analysis described in patent application Ser. No. 09/652,869 that assumes that output circuit Y comprises a lowpass LC filter, which has a large filter inductance L
_{F }so that during a switching cycle the reflected load current into the primary of transformer TY is constant, as shown in waveform (k) in FIG. 6. As can bee seen from waveforms (m) and (n) in FIG. 6, for all four primary switches S
_{1 }through S
_{4 }the magnitude of the current flowing trough the switch at the turnoff moment is the same, i.e.,
$\begin{array}{cc}\uf603{i}_{1}\ue8a0\left({T}_{1}\right)\uf604=\uf603{i}_{2}\ue8a0\left({T}_{4}\right)\uf604=\uf603{i}_{1}\ue8a0\left({T}_{7}\right)\uf604=\uf603{i}_{2}\ue8a0\left({T}_{10}\right)\uf604=\uf603\frac{{i}_{\mathrm{PY}}}{2}\uf604+\uf603{i}_{\mathrm{MX}}\uf604,& \left(9\right)\end{array}$

[0049]
where, I_{MX }is the amplitude of the magnetizing current i_{MX}.

[0050]
According to Eq. (9), the commutation of the switches in both legs, during which the capacitance of the turnedoff switch is charging (voltage across the switch is increasing) and the capacitance of the switch that is about to be turned on is discharging (voltage across the switch is decreasing), is done by the energy stored by both primary current i_{PY }and magnetizing current i_{MX}. While the commutation energy contributed by magnetizing current i_{MX }is always stored in magnetizing inductance L_{MX }of transformer TX, the commutation energy contributed by current i_{PY }nis stored either in the filter inductance (not shown in FIG. 5) of output circuit Y, or leakage inductances (not shown in FIG. 5) of transformers TX and TY. Specifically, for leadingleg switches S_{1 }and S_{2}, the commutation energy contributed by i_{PY }is stored in outputfilter inductor L_{F}, whereas for laggingleg switches S_{3 }and S_{4 }it is stored in the leakage inductance of the transformers. Since it is desirable to minimize the leakage inductance of transformer TY to minimize the secondaryside parasitic ringing, the energy stored in its leakage inductances is relatively small, i.e., much smaller than the energy stored in outputfilter inductance. As a result, in the circuit in FIG. 3, it is easy to achieve ZVS of leadingleg switches S_{1 }and S_{2 }in the entire load range, whereas ZVS of the laggingleg switches S_{3 }and S_{4 }requires a proper sizing of the magnetizing inductance L_{MX }since at light loads almost entire energy required to create the ZVS condition of laggingleg switches S_{3 }and S_{4 }is stored in the magnetizing inductance.

[0051]
A similar analysis can be performed by assuming that output X of the circuit in FIG. 3 is regulated. A simplified circuit diagram when output X is regulated is shown in FIG. 7. In the simplified circuit in FIG. 7, it is assumed that only energy stored in the magnetizing inductance of transformer TY of the unregulated output is used to create the ZVS condition. Because no energy stored in output circuit Y is used to create the ZVS condition, output circuit Y is not shown in FIG. 7. Furthermore, because of the absence of output circuit Y, transformer TY operates with the open secondary winding, i.e., only the primary winding of the transformer is involved in the operation of the circuit. Therefore, in the circuit in FIG. 7, transformer TY operates as an inductor. In the simplified circuit in FIG. 7, this inductor is modeled by inductance L_{MY}. Also, in FIG. 7, the magnetizing inductance of transformer TX is neglected because it has no important roll in the operation of the circuit. Generally, this simplification does not have a significant effect on the operation of the circuit. Namely, if energy stored in output circuit Y is used for ZVS in addition to the energy stored in the magnetizing inductance of transformer TY, the only effect of output circuit Y is to increase the total available energy that can be used for creating ZVS condition. However, due to a reduced component count, the implementation in FIG. 7 is preferred in practice.

[0052]
With reference to FIG. 7, the following relationships between currents can be established:

N_{PX} i _{1} −N _{PX} i _{2} −N _{SX} i _{SX}=0 (10)

i _{MY} =i _{1} +i _{2} (11)

[0053]
Solving Eqs. (10) and (11) for i
_{1 }and i
_{2 }gives
$\begin{array}{cc}{i}_{1}=\frac{{i}_{\mathrm{MY}}}{2}+\frac{{i}_{\mathrm{SX}}}{2\ue89e{n}_{X}},& \left(12\right)\\ {i}_{2}=\frac{{i}_{\mathrm{MY}}}{2}\frac{{i}_{\mathrm{SX}}}{2\ue89e{n}_{X}},& \left(13\right)\end{array}$

[0054]
where n_{X}−N_{PX}/N_{SX }is the turns ratio of transformer TX.

[0055]
As can be seen from Eqs. (12) and (13), currents of both bridge legs i_{1 }and i_{2 }are composed of two components: loadcurrent component i_{SX}/2n_{X }and magnetizingcurrent component i_{MY}/2. The loadcurrent component is directly depended on the load current, whereas the magnetizing current does not directly depend on the load, but rather on the voltsecond product across the magnetizing inductance. Namely, a change of the magnetizing current with a change in the load current occurs only if the phase shift is changed to maintain the output regulation. Usually, the change of the phase shift with the load change is greater at light loads, i.e., as the load decreases toward no load, than at heavier loads. Moreover, since in the circuit in FIG. 7 the phase shift decreases as the load approaches zero, the voltsecond product of L_{MY }also increases so the circuit in FIG. 7 exhibits the maximum magnetizing current at no load, which makes possible ZVS at no load.

[0056]
As can be seen from FIG. 7, magnetizing current i_{MY }does not contribute to the load current because onehalf of this current flows through primary windings AC and CB of transformer X in opposite directions. Therefore, current i_{MY }represents a circulating current that should be minimized. Due to an inverse dependence of the voltsecond product of L_{MY }on the load current, the circuit in FIG. 7, likewise the circuit in FIG. 5, circulates less energy at full load than at light load, and, therefore, features ZVS in a wide load range with a minimum circulating current.

[0057]
[0057]FIG. 8 shows key current and voltage waveforms of the circuit in FIG. 7, when the circuit is implemented as a dc/dc converter. The waveforms in FIG. 8 are obtained by assuming that output circuit X comprises a lowpass LC filter, which has a large filter inductance L
_{F }so that during a switching cycle the reflected load current into the primary of transformer TX is constant, as shown in waveform (k) in FIG. 8. As can be seen from waveforms (m) and (n) in FIG. 8, for all four primary switches S
_{1 }through S
_{4 }the magnitude of the current flowing trough the switch at the turnoff moment is the same, i.e.,
$\begin{array}{cc}\uf603{i}_{2}\ue8a0\left({T}_{1}\right)\uf604=\uf603{i}_{1}\ue8a0\left({T}_{4}\right)\uf604=\uf603{i}_{2}\ue8a0\left({T}_{7}\right)\uf604=\uf603{i}_{1}\ue8a0\left({T}_{10}\right)\uf604=\uf603\frac{{i}_{\mathrm{SX}}}{2\ue89e{n}_{X}}\uf604+\uf603\frac{{I}_{\mathrm{MY}}}{2}\uf604,& \left(14\right)\end{array}$

[0058]
where, I_{MY }is the amplitude of the magnetizing current i_{MY}.

[0059]
However, it should be noted that opposite from the implementation in FIG. 5, in the implementation in FIG. 7 the energy for creating the ZVS condition of the laggingleg switches are S_{3 }and S_{4 }is stored in the output filter inductor, whereas the energy for creating the ZVS condition of leadingleg switches are S_{1 }and S_{2 }is stored in the leakage inductances of transformer TX and inductance L_{MY}. Therefore, in the circuit in FIG. 7, it is harder to achieve ZVS of the leadingleg switches than the leggingleg switches. In fact, since almost all energy for zerovoltage commutation of leadingleg switches S_{1 }and S_{2 }is stored in inductance L_{MY}, to achieve ZVS of the leadingleg switches in a wide load range requires a proper sizing of the magnetizing inductance L_{MY}.

[0060]
Other generalized embodiments of the isolated, phaseshiftcontrolled FB ZVSPWM converter of this invention are shown in FIGS. 9, 10, and 11. The operation and characteristics of the generalized circuits in FIGS. 9, 10, and 11, are identical to those of the circuit in FIG. 3. In fact, the circuit in FIG. 9 is obtained by shifting of voltage sources V_{1 }and V_{2 }from the respective primaries of transformer TX into the primary of transformer TY. Since this circuit transformation does not change any of the circuit's branch currents and node voltages, it also does not change the waveforms of the circuit. Circuits in FIGS. 10 and 11 are obtained from the circuits in FIGS. 3 and 9, respectively, by splitting the primary winding of transformer Y. Since this transformation also does not change any of the circuit's branch currents and node voltages, the operation of all generalized circuits shown in FIGS. 3, 9, 10, and 11 is identical.

[0061]
According to the generalized embodiments shown in FIGS. 3, 9, 10, and 11, a number of FB ZVSPWM converter circuits can be derived. FIGS. 12 through 17 shows some examples of these circuits implemented as dc/dc converters. It should be noted that other implementations, or variations of the shown implementations are possible. Specifically, the presented generalized circuits and their implementations can be implemented as dc/ac inverters, as well.

[0062]
The circuit in FIG. 12 is derived from the circuit in FIG. 3 by implementing output circuit Y with the currentdoubler rectifier. Transformer TX of the unregulated output is implemented as coupled inductor L_{C}, whereas voltage sources V_{1 }and V_{2 }are implemented with capacitors C_{B1 }and C_{B2}, respectively. Namely, if capacitors C_{B1 }and C_{B2 }are large enough so that the resonant frequency of the series resonant circuit formed by these capacitors and the magnetizing inductance of L_{C }is much smaller than the switching frequency than the voltage across capacitors is constant and equal to V_{IN}/2. It also should be noted that the circuit in FIG. 12 could be also implemented with other types of the secondaryside rectifier circuit such, for example, the fullwave rectifier, as shown in FIG. 2.

[0063]
[0063]FIG. 13 shows an embodiment of the circuit in FIG. 9. In this embodiment voltage source V_{1 }is implemented by splitting the rail voltage with two capacitors C_{B1}. Theoretically, capacitor C_{B}, which serves to prevent the saturation of transformer TX if the switching waveforms of the bridge legs are not identical, is not necessary. However, it is always used in practice. Generally, the voltage across capacitor C_{B }is small (close to zero) since this capacitor only takes on the voltage difference caused by a mismatching of the bridge legs, which is usually small.

[0064]
[0064]FIG. 14 shows the implementation of the FB ZVSPWM converter according to the circuit in FIG. 11 when Y is regulated output, whereas FIG. 15 shows the circuit in FIG. 11 when X is the regulated output. Both embodiments employ capacitor C_{B1 }to implement source V_{1}. It should be noted that the circuit in FIG. 14 uses coupled inductor L_{C }to store energy for ZVS, whereas inductor L in the circuit in FIG. 15 is uncoupled. In both circuits, voltage source V_{1 }can also be implemented by splitting the rail as it was done in FIG. 13.

[0065]
Finally, FIGS. 16 and 17 show two more implementations of the FB ZVSPWM converter. The circuit in FIG. 16 is derived from the generalized circuit in FIG. 3 by regulating output X. The circuit in FIG. 17, which is suitable for highpower applications with a high input voltage, employs two FB ZVSPWM converters as in FIG. 12 that share the same currentdoubler rectifier. In this circuit, switch pairs Q_{1}Q_{6}, Q_{2}Q_{5}, Q_{3}Q_{8}, and Q_{4}Q_{7 }are turned on and off simultaneously.

[0066]
As already explained, in the circuits of this invention, it is more difficult to achieve ZVS of the switches in one bridge leg than in the other because the energy available for creating the ZVS condition in the two legs is different. Generally, the ZVS condition is harder to create for the switches that are in the bridge leg which utilizes the energy stored in the magnetizing inductance of the transformer in the unregulated output and energy stored in the leakage inductances of the transformers. To achieve ZVS this energy must be at least equal the energy required to discharge the capacitance of the switch which is about to be turned on (and at the same time charge the capacitance of the switch that just has been turned off). At heavier load currents, ZVS is primarily achieved by the energy stored in the leakage inductances of transformers TX and TY. As the load current decreases, the energy stored in the leakage inductances also decreases, whereas the energy stored in the magnetizing inductance of the transformer of the unregulated output increases so that at light loads this magnetizing provides an increasing share of the energy required for ZVS. In fact, at no load, this magnetizing inductance provides the entire energy required to create the ZVS condition. Therefore, if the value of the magnetizing inductance of the transformer in the unregulated output is selected so that ZVS is achieved at no load and maximum input voltage V_{IN(max)}, ZVS is achieved in the entire load and inputvoltage range.

[0067]
Neglecting the capacitances of the transformer's windings, magnetizing inductance L
_{MX }necessary to achieve ZVS of leggingleg switches in the implementations where output Y is regulated is
$\begin{array}{cc}{L}_{\mathrm{MX}}\le \frac{1}{32\ue89e{\mathrm{Cf}}_{S}^{2}},& \left(15\right)\end{array}$

[0068]
whereas, magnetizing inductance L
_{MY }required to achieve ZVS of leadingleg switches in the implementations where output X is regulated is
$\begin{array}{cc}{L}_{\mathrm{MY}}\le \frac{1}{128\ue89e\text{\hspace{1em}}\ue89e{\mathrm{Cf}}_{S}^{2}}& \left(16\right)\end{array}$

[0069]
where C is the total capacitance across the primary switches (parasitic and external capacitance, if any) in the corresponding legs.

[0070]
As can be seen from FIG. 5, current i_{MX }flowing through magnetizing inductance L_{MX }introduces a current asymmetry in the two bridge legs. Namely, since in the circuits of this invention that have output Y regulated i_{1}=i_{2}+2i_{MX }(as can be derived from Eqs. (3)(5)), leading leg S_{1}S_{2 }always carries a higher current than lagging leg S_{3}S_{4}. On the other hand, for the circuits of this invention that have output X regulated, as for example that shown in FIG. 7, both legs carry the same current. Furthermore, if the current imbalance in the circuits with regulated output Y is significant, i.e., if current i_{2 }in lagging lag S3S_{4 }is significantly lower than current i_{1 }in leading leg S_{1}S_{2}, different size switches can be selected for the two legs, which may reduce the cost of the implementation without sacrificing the circuit performance.

[0071]
Finally, it should be noted that in the circuits of this invention the parasitic ringing on the secondary side is significantly reduced because these circuits do not require increased leakage inductances of the transformers, or a large external to store the required energy for ZVS of the laggingleg switches. Since the transformers in the circuits of this invention can be made with small leakage inductances, the secondaryside ringing between the leakage inductances of the transformers and the junction capacitance of the rectifier can be greatly reduced. Any residual parasitic ringing can be damped by a small (lowpower) snubber circuit.

[0072]
The control of the circuits of this invention is the same as the control of any other constantfrequency FB ZVS converter. In fact, any of the integrated phaseshift controllers available on the market can be used implement the control of the proposed circuit. However, it should be noted that in the circuits with regulated output Y the maximum output voltage (voltsecond product) is obtained when the bridge legs are operated in phase (0° phase shift), whereas the maximum output voltage (voltsecond product) for the circuits with regulated output X occurs when the bridge legs are operated in antiphase (180° phase shift). This difference in the control characteristics of the two circuit implementations has a minor effect on the control loop design since a simple controlsignal inversion in the voltage control loop solves the problem.

[0073]
Because voltage sources V_{1}=V_{IN}/2 and V_{2}=V_{IN}/2 in FIGS. 3, 9, 10, and 11 are implemented with capacitors C_{B1 }and C_{B2}, respectively, as shown in FIGS. 2 and 12 through 17, it is necessary to precharge these capacitors to V_{IN}/2 before the startup moment. Namely, without precharging the voltages of the capacitors are zero, which causes a voltsecond imbalance on the windings of the transformers during the startup. This voltsecond imbalance may lead to the saturation of the transformers, which produces excessive currents in the primary that may damage the switches. FIGS. 18 and 19 show examples of precharging circuits. FIG. 18 shows a precharging circuit implemented with resistors Rc for the circuit shown in FIG. 15, whereas FIG. 19 shows a precharging circuit implementation for the circuit in FIG. 2. It should be noted that many other implementations of the precharging circuit are possible for any circuit of this invention.

[0074]
It also should be noted the above detailed descriptions are provided to illustrate specific embodiments of the present invention and are not intended to be limiting. Numerous variations and modifications within the scope of this invention are possible. The present invention is set forth in the following claims.