US20020050400A1 - Method and component for forming an embedded resistor in a multi-layer printed circuit - Google Patents
Method and component for forming an embedded resistor in a multi-layer printed circuit Download PDFInfo
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- US20020050400A1 US20020050400A1 US09/826,636 US82663601A US2002050400A1 US 20020050400 A1 US20020050400 A1 US 20020050400A1 US 82663601 A US82663601 A US 82663601A US 2002050400 A1 US2002050400 A1 US 2002050400A1
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
- H05K1/167—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed resistors
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
- H05K1/092—Dispersed materials, e.g. conductive pastes or inks
- H05K1/095—Dispersed materials, e.g. conductive pastes or inks for polymer thick films, i.e. having a permanent organic polymeric binder
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0388—Other aspects of conductors
- H05K2201/0391—Using different types of conductors
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/06—Lamination
- H05K2203/061—Lamination of previously made multilayered subassemblies
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/022—Processes for manufacturing precursors of printed circuits, i.e. copper-clad substrates
- H05K3/025—Processes for manufacturing precursors of printed circuits, i.e. copper-clad substrates by transfer of thin metal foil formed on a temporary carrier, e.g. peel-apart copper
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/388—Improvement of the adhesion between the insulating substrate and the metal by the use of a metallic or inorganic thin film adhesion layer
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
Definitions
- an optional support substrate 20 that constitutes a discardable element in the forming of a printed circuit board, is shown attached to metallic layer 16 along the periphery thereof, to protect the surface of metallic layer 16 and to provide structural rigidity to component 10 .
- Laminating component 10 to an inner laminate by means of an adhesive wherein areas 18 are embedded within the resulting component and separated from the inner laminate 40 by an adhesive layer.
- Lamination of component 10 to an inner laminate 40 comprises compressing component 10 together with elements forming inner laminate 40 under conditions of heat and pressure to create a multi-layer printed circuit.
Abstract
A component for use in forming a multi-layer printed circuit comprised of a film substrate formed of a first polymeric material. At least one layer of a flash metal is applied to a first side of the film substrate, and at least one layer of copper is applied on the layer of flash metal. A discrete area of a resistive material is disposed on a second side of the film substrate.
Description
- The present invention relates generally to printed circuits, and more specifically, to a method and component for manufacturing embedded resistive elements in printed circuit boards.
- In recent years, printed circuit components have become widely used in a variety of electronic devices. Of particular interest are multi-layer printed circuit board laminates which have been developed to meet the demand for miniaturization of electronic components and the need for printed circuit boards having a high density of electrical interconnections and circuitry. In the manufacture of multi-layer printed circuit boards, conductive foils, which are usually copper foils, are secured to opposite sides of a core which is conventionally a reinforced or non-reinforced dielectric. (Throughout this specification, the use of the term “core” is meant to include any one of a variety of core materials, all of which may be reinforced or non-reinforced and may include an epoxy, polyester, polyimide, a polytetrafloroethylene, and in some applications, a core material which includes previously formed printed circuits).
- The process includes one or more etching steps in which the undesired or unwanted copper is removed by etching away portions of the conductive foil from the laminate surface to leave a distinct pattern of conductive lines and formed elements on the surface of the etched laminate. The etched laminate and other laminate materials may then be packaged together to form a multi-layer circuit board package. Additional processing, such as hole drilling and component attaching, will eventually complete the printed circuit board product.
- The trend in recent years has been to reduce the size of electronic components and provide printed circuit boards having multi-chip modules, etc. This results in a need to increase the number of components, such as surface-mount components provided on the printed circuit board. This in turn results in a so-called “densely populated” or simply “dense” printed circuit board. A key to providing a densely populated printed circuit board is to produce close and fine circuit patterns on the outer surfaces (i.e., the exposed surfaces) of the resulting multi-layer printed circuit board. The width and spacing of conductive paths on a printed circuit board are generally dictated by the thickness of the copper foil used thereon. For example, if the copper foil has a thickness of 35 μm (which is a conventional 1-ounce foil used in the manufacture of many printed circuits), exposing the printed circuit board to an etching process for a period of time to remove such a foil thickness will also reduce the width of the side areas of the printed circuit path in approximately the same amount. In other words, because of the original thickness of the copper foil, a printed circuit board must be designed to take into account that an etching process will also eat away the sides of a circuit path (i.e., undercut a masking material). In other words, the thickness of the spacings between adjacent circuit lines is basically limited by the thickness of the copper foil used on the outer surface of the multi-layer printed circuit board.
- Thus, to produce “densely populated” printed circuit boards, it is necessary to reduce the thickness of the copper, at least on the outermost surface of the multi-layer printed circuit package. (The thickness of the copper foil sheet is generally limited by the ability of a foil manufacturer to handle and transport such sheets. In this respect, as the thickness of the foil decreases below 35 μm, the ability to physically handle such foil becomes more difficult).
- Many printed circuit boards also include conductive layers containing patterned components that perform as specific, discrete components. One such discrete component is a resistive element. It is conventionally known to form a resistive element using a resistor foil. A resistor foil is basically a copper foil having a thin layer of a resistive material, typically a metal or metal alloy, deposited onto one surface thereof. The resistor foil is attached to a dielectric substrate with the resistor material being adhered to the dielectric substrate. Portions of the copper foil and resistive material are etched away, using conventionally known etching and masking techniques, to produce a trace line comprised of copper and the resistive material therebelow. A section of the copper layer is removed leaving only a resistive material trace line remaining on the surface of the dielectric to connect the two separated ends of the copper portion of the trace line. Because the resistive material typically has a conductivity less than copper, it essentially acts as a resistor between the separated ends of the copper portion of the trace line. As will be appreciated, the foregoing subtractive procedure requires several masking and etching steps to remove unwanted copper and resistive material to form the actual resistive element. Such steps are both time-consuming and expensive. Further, the resistive materials used in forming the resistor foil are somewhat limited to those materials that can be etched using known etching chemicals. In this respect, the resistive material must be material that is compatible with chemicals used to etch copper.
- The present invention provides an outer surface component for forming resistive elements in a multi-layer printed circuit board and a method of forming embedded resistive elements in a multi-layer printed circuit board that utilizes a process that is not limited by known resistive materials.
- It is an object of the present invention to provide a component for use in forming multi-layer circuits.
- Another object of the present invention is to provide a component for use as the outermost layer of a multi-layer printed circuit, wherein the component has an exceptionally thin layer of copper that facilitates fine circuit lines and a “densely populated” circuit surface.
- Another object of the present invention is to provide a component as described above that has resistive elements thereon for forming embedded resistors within the multi-layered printed circuit.
- Another object of the present invention is to provide a component as described above that has an exposed copper surface having improved photoresist adhesion properties that further facilitates the creation of fine circuit lines and a “densely populated” circuit surface by an etching process.
- Another object of the present invention is to provide a component as described above, wherein one side of the component includes an adhesive layer for attachment to core laminates.
- Another object of the present invention is to provide an outer surface laminate as described above, wherein the outer surface laminate is comprised of a polymeric film having a thin layer of copper adhered to one side of the polymeric film and at least one resistive element applied to a second side of the polymeric film.
- These and other objects and advantages will become apparent from the following description of preferred embodiments of the invention, taken together with the accompanying drawings.
- The invention may take physical form in certain parts and arrangement of parts, embodiments of which are described in detail in the specification and illustrated in the accompanying drawings, wherein:
- FIG. 1 is a perspective view of a component for use in forming a multi-layer printed circuit board having embedded resistors, illustrating a preferred embodiment of the present invention;
- FIG. 2 is a perspective view of the component shown in FIG. 1 attached to a core showing the component with trace lines formed thereon that are connected to an embedded resistor;
- FIG. 3 is a cross-sectional view of a multi-layer printed circuit board formed from components according to the present invention, wherein such components form the outermost elements of the circuit board;
- FIG. 4 is a perspective view of a component for use in forming a multi-layer printed circuit having embedded resistors, illustrating another embodiment of the present invention;
- FIG. 5 is a cross-sectional view taken along lines5-5 of FIG. 4; and
- FIG. 5A is a schematic representation of the resistive element shown in FIG. 5.
- Referring now to the drawings wherein the showings are for the purpose of illustrating preferred embodiments of the invention only, and not for the purpose of limiting same, FIG. 1 shows a cross-sectional view of a
surface component 10 illustrating a preferred embodiment of the present invention. Broadly stated,surface component 10 is comprised of apolymeric film 12 having afirst surface 12 a and a second surface 12 b. A thinmetallic layer 14 of a flash metal (conventionally referred to as a “tiecoat”) is applied tosurface 12 a ofpolymeric film 12. At least onemetallic layer 16, preferably formed of copper, is applied toflash layer 14. One or morediscrete areas 18 of resistive material are formed on surface 12 b ofpolymeric film 12. In the embodiment shown, anoptional support substrate 20, that constitutes a discardable element in the forming of a printed circuit board, is shown attached tometallic layer 16 along the periphery thereof, to protect the surface ofmetallic layer 16 and to provide structural rigidity tocomponent 10. -
Polymeric film 12 is preferably formed of polyimide and has a thickness of between 12.5 μm and 125 μm. Specific examples of materials that may formpolymeric film 12 include Kapton-E or Kapton-HN (manufactured by I. E. DuPont), Upilex-S or Upilex-SGA (manufactured by Ube) and Apical NP (manufactured by Kaneka). -
Flash layer 14 may be formed from metals selected from the group consisting of chromium, nickel, titanium, aluminum, vanadium, silicon, iron and alloys thereof. Flashlayer 14 is preferably formed of chromium and preferably has a thickness of between 0 Å (none) and 500 Å, and more preferably, between about 50 Å to 200 Å. - As indicated above,
metallic layer 16 is preferably formed of copper, and has a preferable thickness of between 0.1 μm (1000 Å) and 70 μm. The copper forming metallic layer orlayers 16 may be applied by vacuum-metallization, electrodeposition, electroless deposition or combinations thereof on flash layer orlayers 14. In accordance with a preferred embodiment of the present invention,metallic layer 16 is electrodeposited ontoflash layer 14. -
Areas 18 are preferably thin layers formed of a material having a resistivity greater than copper.Areas 18 may be formed of a metal deposited onto surface 12 b by conventionally known deposition processes such as vacuum-metallization, electrodeposition, electroless deposition or combinations thereof. By way of example, but not limitation, metals deposited onto surface 12 b may include chromium, nickel, titanium, aluminum, molybdenum, tantalum, gold, tin, indium, vanadium, silicon, iron and alloys thereof. The thickness ofareas 18 is preferably between about 50 Å and about 300 Å. As shall be understood from a further reading of the specification, the thickness of areas 18 (as well as their width and length) will depend upon the desired resultant resistance of the resistive element formed thereby. -
Areas 18 may also be formed of a polymer ink that is sprayed, wiped or painted onto surface 12 b. Resistive polymer inks manufactured and sold by Metech of Elverson, Pa. may find advantageous application as part ofcomponent 10. - In the embodiment shown,
areas 18 are shown as elongated, rectangular strips of generally uniform width and thickness. As will be appreciated, other shapes may also be used. According to the present invention,areas 18 are formed to be discrete areas isolated from each other. -
Support substrate 20 is provided as a temporary, protective covering formetallic layer 16 to protect the outer surface thereof from contamination prior to laminating, and further to provide rigidity tocomponent 10 to prevent cracking or flaking ofareas 18 resulting frompolymeric film 12 flexing or bending. Accordingly,support substrate 20 is preferably dimensioned, i.e., has a thickness, sufficient to preventing cracking or flaking ofareas 18. As will be appreciated, differentmaterials forming areas 18 will require different rigidities fromsupport substrate 20. As indicated above,substrate 20 is removed fromcomponent 10 and discarded during formation of a printed circuit board.Substrate 20 is preferably formed of a metal having a polished, substantially contamination-free surface for attachment tometallic layer 16.Substrate 20 may be formed of aluminum, steel, stainless steel, copper or the like.Substrate 20 is attached to the periphery ofmetallic layer 16, typically by a flexible adhesive. - According to one aspect of the present invention,
component 10 is preferably formed as an individual component for later use in forming a multi-layer printed circuit.Component 10 is preferably used as the outermost component in a multi-layer printed circuit, whereinmetallic layer 16 forms the outermost layer of the printed circuit. - FIG. 2 shows a multi-layer printed
circuit 30 formed usingcomponent 10 as the outer surface sections thereof. Multi-layer printedcircuit 30 is generally comprised of aninner laminate section 40, that is shown in phantom in FIG. 2. FIG. 2 showscomponent 10 after it has been attached, i.e., laminated, toinner laminate section 40 by anadhesive layer 42 and then circuitized by conventionally known processes to formcircuit trace lines side 12 a ofpolymeric film 12. - More specifically, FIG. 2 illustrates how an embedded
resistor 70 may be formed usingarea 18 on side 12 b ofcomponent 10. Preferably, the ends oftrace lines 56, 58 are disposed in vertical alignment, i.e., in registry, with the ends ofarea 18, as illustrated in FIG. 2. Throughholes 62 are drilled intoboard 30 using conventional techniques, to connect one end of each trace lines 56, 58 to ends ofarea 18. Throughholes 62 are filled by conventional, electroplating techniques to form a continuous circuit comprised oftrace lines 56, 58 andarea 18. Sincearea 18 is formed of a resistive material, it acts as a resistor element to current flow from trace line 56 to traceline 58. FIGS. 1 and 2 thus illustrate how an embeddedresistor 70 may be formed by an additive process by forming anarea 18 of a resistive material ontopolymeric film 12, and then embeddingarea 18 of a resistive material in a printedcircuit 30 and then connecting opposite ends ofarea 18 to spaced-aparttrace lines 56, 58 by throughholes 62. - Referring now to FIG. 3, inner laminate section40 (shown in phantom in FIG. 2) is schematically illustrated in cross-section to show more clearly the connection between
trace line 56, 58 andarea 18. In FIG. 3,inner laminate 40 is illustrated as comprised of two previously formed printed circuit laminates 80. Circuit laminates 80 are separated by anintermediate dielectric layer 92. Each printed circuit laminate 80 is comprised of aninner core 82 having circuit leads orconnectors 84 formed on the outer surfaces thereof. As indicated above,cores 82 may be reinforced or non-reinforced and may include an epoxy, polyester, cyanate ester, bismaleimide triazine, polynorborene, teflon, polyimide or a resinous material, and mixtures thereof, as is conventionally known. Printed circuit laminates 80 are secured todielectric layer 92, as is conventionally known. As shown in FIG. 3, throughhole 62 does not extend throughadhesive layer 42, although throughhole 62 may extend intoadhesive layer 42. FIG. 3 thus illustrates how an embeddedresistor 70 can be formed usingtrace lines 56, 58 on the surface ofmulti-layer circuit 30. - FIG. 3 also illustrates how
component 10 may also be used to form an embedded resistor using internal trace lines. In this respect, FIG. 3 shows a lower component designated 10′. Likecomponent 10,component 10′ is comprised of apolymeric film 12, a metallic flash layer 14 (tiecoat), ametallic layer 16 and at least onearea 18′ of a resistive material.Flash layer 14 andmetallic layer 16 are masked and etched by conventional techniques to formcircuit trace lines surface 12 a ofpolymeric film 12.Area 18′ of a resistive material is oriented and disposed to be in spaced relationship with circuit leads 84 a, 84 b on circuit laminate 80. Throughholes 62 extending throughpolymeric film 12,area 18′,adhesive layer 42 and into the ends of circuit leads 84 a, 84 b, electrically connect circuit leads 84 a, 84 b to the ends of the resistive material ofarea 18′.Area 18′ thus forms an embedded resistor element to embedded circuit leads 84 a, 84 b of printed circuit laminate 80. - The resulting multi-layer printed
circuit 30 thus hascomponents metallic layers 16 available for a subsequent etching process to define a specific surface path or pattern frommetallic layer 16. Importantly, as indicated above, because metallic layer(s) 16 are deposited onto apolymeric film 12, the thickness ofmetallic layer 16 may be extremely thin as compared to conventional metallic foil. As also indicated above,metallic layer 16 may have a thickness as low as 0.1 μm (1000 Å). Such thin layers of copper on the outer surfaces of multi-layer printedcircuit 30 facilitate forming extremely fine and closely spaced circuit lines and patterns by an etching process. (The exposed, electrodeposited copper surface ofmetallic layer 16 is generally rougher than the typically flat surface of standard copper foils, thereby providing increased photoresist adhesion, which also facilitates forming extremely fine and closely spaced circuit lines and patterns by an etching process). As described above, depositing a resistive material onto side 12 b ofpolymeric film 12 facilitates formation of embeddedresistors 70 within multi-layer printedcircuit 30. Unlike prior processes, the present invention provides an additive process for forming resistor elements. An advantage of the present invention is that the resistive materials that may be used in forming resistive elements according to the present invention are not limited by their compatibility with etching chemicals that are required for forming resistive elements according to conventionally known subtractive processes. Moreover, the absence of glass fibers (typically found in glass-reinforcing prepregs) makes for easier laser drilling of microvias and through holes to connect trace lines formed frommetallic layer 16 with circuit leads 84 on printed circuit laminates 80 orresistive areas 18. Still further, polymeric materials, such as polyimide, have better dielectric properties as compared to conventional glass-reinforced prepregs, thereby providing improved electrical performance, such as for example, reduced attenuation of high speed signals. Furthermore, the high heat stability of materials such as polyimides can provide better resistance to thermal expansions that arise during the chip attachment process. Thus,components resistors 70 by an additive process, as well as the production of more densely packed multi-layer printed circuit boards. - A contemplated method of forming an embedded resistor within a printed circuit would be as follows:
- 1) Forming a
component 10 as described above, comprised of apolymeric film 12 having on one side thereof aflash layer 14 of a tiecoat metal and ametallic layer 16 deposited onflash layer 14, and on the other side thereof, discrete,isolated areas 18 of resistive material. Asupport substrate 20 may optionally be provided to protect the exposed surface ofmetallic layer 16.Substrate 20 may also be provided to prevent flexing or bending ofcomponent 10 so as to prevent cracking or separating of certain types of resistivematerials forming areas 18. - 2) Laminating
component 10 to an inner laminate by means of an adhesive, whereinareas 18 are embedded within the resulting component and separated from theinner laminate 40 by an adhesive layer. Lamination ofcomponent 10 to aninner laminate 40 comprises compressingcomponent 10 together with elements forminginner laminate 40 under conditions of heat and pressure to create a multi-layer printed circuit. - 3) Removing
support substrate 20 so as to exposemetallic layer 16 and circuitizingmetallic layer 16 by conventionally known masking and etching processes to form circuit trace lines frommetallic layer 16 andflash layer 14. - 4) Drilling through holes through the ends of spaced-apart trace lines, the through holes extending through
polymeric film 12 into remote portions ofareas 18. - 5) Plating or filling the through holes with conductive material to create an electrical connection between the ends of trace lines formed on the outer surface of
component 10 and the embeddedareas 18 of a resistive material, so as to form a resistive element. - The foregoing description is a specific embodiment of the present invention. It should be appreciated that this embodiment is described for the purpose of illustration only, and that numerous alterations and modifications may be practiced by those skilled in the art without departing from the spirit and scope of the invention. For example, FIGS.4-5A show a
component 110 illustrating another embodiment of the present invention.Component 110 is similar tocomponent 10 in that it includes apolymeric film 12 having afirst surface 12 a and a second surface 12 b. Aflash layer 14 of a tiecoat metal is applied to surface 12 a, andmetallic layer 16 is applied toflash layer 14. As heretofore described,component 110 is similar tocomponent 10 and therefore like elements have been designated with like reference numbers. In the embodiment shown, discrete areas 118 of overlappingresistive materials 118 a and 118 b are formed on side 12 b ofpolymeric film 12. Areas 118 may be formed of overlapping metal layers of the type heretofore described, or may be comprised of overlapping layers of a polymer ink of the type heretofore described. Preferably, eachlayer 118 a is different from layer 118 b and has different resistive characteristics. - In a manner similar to that described above,
component 110 is laminated as part of a multi-layer printed circuit to aninner core laminate 140. Throughholes 162 connect the ends of resistive areas 118 to tracelines outer surface 16 ofcomponent 110. As described above, an embedded resistor is formed as a result of area 118 connectingtrace lines - It is intended that all such modifications and alterations be included insofar as they come within the scope of the invention as claimed or the equivalents thereof.
Claims (20)
1. A method of forming resistive elements in a multi-layer printed circuit, comprising the steps of:
a) forming an inner core from one or more printed circuit laminates, each of said printed circuit laminates having a core substrate and a first surface with at least one strip conductor disposed thereon,
b) forming at least one surface laminate, said surface laminate comprised of:
a film substrate formed of a first polymeric material;
at least one layer of a flash metal applied to a first side of said film substrate;
at least one layer of copper on said layer of flash metal; and
a discrete area of a resistive material formed on a second side of said film substrate;
c) applying an adhesive material between said surface laminate and said inner core,
d) compressing said inner core and said surface laminate together under conditions of heat and pressure to create a first multi-layer printed circuit, wherein said discrete area of resistive material is embedded within said first multi-layer printed circuit between said film substrate and said adhesive layer;
e) circuitizing said layer of copper on said surface laminate to form at least one strip conductor thereon;
f) connecting an end of a first strip conductor with a first end of said resistive area by a through hole connection; and
g) connecting an end of a second strip conductor with a second end of said resistive area by a through hole connection.
2. A method as defined in claim 1 , wherein said at least one flash layer is comprised of a metal selected from the group consisting of nickel, chromium, titanium, aluminum, iron, vanadium, silicon and alloys thereof.
3. A method as defined in claim 2 , wherein said at least one flash layer has a thickness of about 50 Å to about 500 Å.
4. A method as defined in claim 3 , wherein said at least one layer of copper has a thickness of about 1000 Å to about 35 μm.
5. A method as defined in claim 4 , wherein said first polymeric material is a polyimide.
6. A method as defined in claim 5 , wherein said adhesive layer is formed from a material selected from the group consisting of acrylics, epoxies, nitrile rubbers, phenolics, polyamides, polyarylene ethers, polybenzimidazoles, polyesters, polyimides, polyphenylquinoxalines, polyvinyl acetals, polyurethanes, silicones, vinyl-phenolics, urea-formaldehyde and combinations thereof.
7. A method as defined in claim 1 , wherein said resistive material is a metal or metal alloy having a resistivity greater than copper.
8. A method as defined in claim 7 , wherein said metal is selected from the group consisting of chromium, nickel, titanium, aluminum, vanadium, silicon, iron and alloys thereof.
9. A method as defined in claim 1 , wherein said resistive material is a polymer resistor ink.
10. A multi-layer printed circuit, comprising:
a) an inner core formed from one or more printed circuit laminates, said printed circuit laminates comprised of a core substrate having a first surface with a strip conductor disposed thereon,
b) at least one surface component attached to said inner core, said surface component, comprised of:
a film substrate formed of a first polymeric material;
at least one layer of copper on one side of said polymeric material; and
a discrete area of a resistive material disposed on a second side of said film substrate, said surface laminate attached to said inner core with said discrete area of resistive material embedded within said multi-layer printed circuit between said core and said film substrate,
c) a first through hole connecting one end of said discrete area to a first circuit trace line of said multi-layer printed circuit; and
d) a second through hole connecting another end of said discrete area to a second trace line of said multi layer printed circuit.
11. A multi-layer printed circuit as defined in claim 10 , wherein said resistive material is a metal or metal alloy having a resistivity greater than copper.
12. A multi-layer printed circuit as defined in claim 11 , wherein said metal is selected from the group consisting of chromium, nickel, titanium, aluminum, vanadium, silicon, iron and alloys thereof.
13. A multi-layer printed circuit as defined in claim 10 , wherein said resistive material is a polymer resistor ink.
14. A multi-layer printed circuit as defined in claim 10 , wherein at least one layer of a flash metal is disposed between said polymeric material and said at least one layer of copper.
15. A component for use in forming a multi-layer printed circuit comprised of:
a film substrate formed of a first polymeric material;
at least one layer of a flash metal applied to a first side of said film substrate;
at least one layer of copper on said layer of flash metal; and
a discrete area of a resistive material disposed on a second side of said film substrate.
16. A component as defined in claim 15 , further comprising a metal support substrate that constitutes a discardable element in the formation of a printed circuit board, one surface of said metal support substrate being essentially uncontaminated and engageable with said layer of copper, said support substrate attached to said layer of copper at its borders to define a substantially uncontaminated central zone of copper inwardly of the edges of the copper layer.
17. A component as defined in claim 15 , wherein said resistive material is a metal or metal alloy having a resistivity greater than copper.
18. A component as defined in claim 17 , wherein said metal is selected from the group consisting of chromium, nickel, titanium, aluminum, vanadium, silicon, iron and alloys thereof.
19. A component as defined in claim 15 , wherein said resistive material is a polymer resistor ink.
20. A component as defined in claim 15 , wherein said discrete area of resistive material is dimensioned to be attached to an inner core of a multi-layer printed circuit board with said discrete area of resistive material embedded within said multi-layer printed circuit between said core and said film substrate.
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Application Number | Priority Date | Filing Date | Title |
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US09/826,636 US20020050400A1 (en) | 2000-08-18 | 2001-04-05 | Method and component for forming an embedded resistor in a multi-layer printed circuit |
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US09/641,304 US6284982B1 (en) | 2000-08-18 | 2000-08-18 | Method and component for forming an embedded resistor in a multi-layer printed circuit |
US09/826,636 US20020050400A1 (en) | 2000-08-18 | 2001-04-05 | Method and component for forming an embedded resistor in a multi-layer printed circuit |
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US09/641,304 Division US6284982B1 (en) | 2000-08-18 | 2000-08-18 | Method and component for forming an embedded resistor in a multi-layer printed circuit |
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US20020050400A1 true US20020050400A1 (en) | 2002-05-02 |
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US09/641,304 Expired - Fee Related US6284982B1 (en) | 2000-08-18 | 2000-08-18 | Method and component for forming an embedded resistor in a multi-layer printed circuit |
US09/826,636 Abandoned US20020050400A1 (en) | 2000-08-18 | 2001-04-05 | Method and component for forming an embedded resistor in a multi-layer printed circuit |
US09/826,635 Abandoned US20020020553A1 (en) | 2000-08-18 | 2001-04-05 | Method and component for forming an embedded resistor in a multi-layer printed circuit |
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US09/641,304 Expired - Fee Related US6284982B1 (en) | 2000-08-18 | 2000-08-18 | Method and component for forming an embedded resistor in a multi-layer printed circuit |
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Application Number | Title | Priority Date | Filing Date |
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US09/826,635 Abandoned US20020020553A1 (en) | 2000-08-18 | 2001-04-05 | Method and component for forming an embedded resistor in a multi-layer printed circuit |
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US20030166342A1 (en) * | 2001-05-07 | 2003-09-04 | Applied Materials, Inc. | Integrated method for release and passivation of MEMS structures |
US20040108937A1 (en) * | 2002-12-04 | 2004-06-10 | Craig Ernsberger | Ball grid array resistor network |
US20060028288A1 (en) * | 2004-08-09 | 2006-02-09 | Jason Langhorn | Ball grid array resistor capacitor network |
US20060286742A1 (en) * | 2005-06-21 | 2006-12-21 | Yageo Corporation | Method for fabrication of surface mounted metal foil chip resistors |
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US6201194B1 (en) * | 1998-12-02 | 2001-03-13 | International Business Machines Corporation | Multi-voltage plane, multi-signal plane circuit card with photoimageable dielectric |
-
2000
- 2000-08-18 US US09/641,304 patent/US6284982B1/en not_active Expired - Fee Related
-
2001
- 2001-04-05 US US09/826,636 patent/US20020050400A1/en not_active Abandoned
- 2001-04-05 US US09/826,635 patent/US20020020553A1/en not_active Abandoned
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US20030166342A1 (en) * | 2001-05-07 | 2003-09-04 | Applied Materials, Inc. | Integrated method for release and passivation of MEMS structures |
US20040108937A1 (en) * | 2002-12-04 | 2004-06-10 | Craig Ernsberger | Ball grid array resistor network |
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US20060028288A1 (en) * | 2004-08-09 | 2006-02-09 | Jason Langhorn | Ball grid array resistor capacitor network |
US7342804B2 (en) | 2004-08-09 | 2008-03-11 | Cts Corporation | Ball grid array resistor capacitor network |
US20060286742A1 (en) * | 2005-06-21 | 2006-12-21 | Yageo Corporation | Method for fabrication of surface mounted metal foil chip resistors |
CN104427762A (en) * | 2013-09-02 | 2015-03-18 | 深圳崇达多层线路板有限公司 | Buried resistance printed board and manufacturing method thereof |
Also Published As
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US20020020553A1 (en) | 2002-02-21 |
US6284982B1 (en) | 2001-09-04 |
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Legal Events
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AS | Assignment |
Owner name: GOULD ELECTRONICS INC., OHIO Free format text: CHANGE OF NAME;ASSIGNOR:GA-TEK INC. (DBA GOULD ELECTRONICS INC.);REEL/FRAME:012928/0661 Effective date: 20020417 |
|
STCB | Information on status: application discontinuation |
Free format text: EXPRESSLY ABANDONED -- DURING EXAMINATION |