BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for dynamic matching of the elements of an integrated multibit digital-to-analog converter with balanced output for audio applications.
2. Description of the Related Art
As is known, multibit digital-to-analog conversion for audio applications is performed by generating the output analog signal as the sum, at each sampling instant, of a given number of elementary quantities or contributions, which may be, for example, currents supplied by current generators or generated by means of resistors, or charges stored in capacitors.
It is also known that digital-to-analog conversion can be roughly divided into two major categories according to the approach adopted in the conversion. Belonging to the first category are those digital-to-analog conversions performed adopting an approach known in the literature as “thermometric coding”, whereas belonging to the second category are those digital-to-analog conversions performed adopting an approach known in the literature as “binary coding”.
In particular, in thermometric coding the elementary contributions used for generating the output analog signal assume values identical to one another and are generated by distinct generator elements numbering N, where N represents the number of levels of the output analog signal. In addition, in order to obtain a balanced output analog signal, i.e., an output signal of mean value zero able to assume either positive values or negative values that are symmetrical with respect to zero, one half of the generator elements supplies a positive elementary contribution and one half of the generator elements supplies a negative elementary contribution, and the value of each elementary contribution is 2AMAX/N, where AMAX represents the maximum amplitude, either positive or negative, which it is desired that the output analog signal should assume.
In binary coding, instead, the number of distinct generator elements to be implemented for generating the elementary contributions is equal to n, where n represents the number of bits of the digital-to-analog converter and is equal to n=log2N, and the dimensions of said generator elements are appropriately scaled in such a way that the elementary contributions generated thereby are submultiples of a power of 2 with respect to the maximum value AMAX, in which the least significant bit (LSB) has a weight of 2AMAX/N, whilst the most significant bit (MSB) has a weight of AMAX.
It may be readily appreciated how the element generating the MSB has a larger area than the element generating the LSB, and hence, in terms of area occupied, binary coding does not differ much from thermometric coding on account of the increase in the size of the generating elements due to the decrease in their number.
In addition, the heavy bearing that the errors on the most significant bits have in binary coding and the relatively high complexity of implementation, in said binary coding, of so-called “scrambling” techniques, i.e., ones through which the generator elements to be activated are appropriately chosen each time from the set of the ones available with the purpose of rendering the conversion error not correlated to the signal to be converted, have recently given a strong impulse to the development of thermometric coding.
At the highest level of abstraction, a digital-to-analog converter, hereinafter designated for reasons of convenience by the term “DAC”, can be represented with the block diagram shown in FIG. 1, where s[n] designates the numerical sequence that is obtained from the sampling of the input audio signal, said sequence being then processed by the blocks downstream until the reconstruction s(t) of the signal is obtained at output from the power stage.
In particular, in FIG. 1 the part of numerical processing of the DAC, designated by 1, is formed by an interpolator 2 and a noise shaper 4, and has the purpose of reducing the number of bits with which the signal is encoded, without however worsening the quality thereof in terms of in-band noise level.
In detail, in order to maintain the high audio fidelity, the interpolator 2 performs an oversampling of the input signal s[n]; i.e., it increases the sampling frequency by a factor R, and this technique makes it possible to reduce the intensity in frequency of all spurious spectral components, at the same time eliminating undesired spectral repetitions.
The interpolation is followed by the noise-shaping operation performed by the noise shaper 4. The said operation consists in differentiating the signal transfer function and the requantization error transfer function: whilst the input signal is transferred from the input to the output unaltered, the requantization error “sees” a transfer typical of a high-pass filtering having a modulus smaller than one within the audio band and greater than one outside. The joint effect of these two operations is that of obtaining a decidedly high precision even in the presence of a quantizer with a very limited number of bits, even just one.
The numerical processing part is then followed by a block 6 which performs the actual analog-to-digital conversion and by an amplification and filtering block 8. The block 6 that performs the actual analog-to-digital conversion represents the interface between the two domains, the digital one and the analog one, and contained inside it are, as shown in FIG. 2, a thermometric encoder 10 and the set of the generator elements 12, which are known in the literature also as “unitary elements”.
It is moreover known that, in the context of thermometric coding, it is not possible to integrate N generator elements that are perfectly identical to each other, and this entails the need to arrange an additional block downstream of the noise shaper, the said additional block having the purpose of offsetting the effects of the mismatch between the components, represented particularly by a non-linearity of the transfer characteristic and by the consequent distortion of the signal.
The complete block diagram of a DAC with mismatch compensation thus becomes the one shown in FIG. 3, in which the compensation block is designated by 14.
In the case, for instance, in which the generator elements are constituted by current generators formed by MOS transistors, the latter, although designed identical, have different dimensions and characteristics owing to the limited accuracy that characterizes any technological integration process; the causes can be diffusion imprecisions, irregularities in the masks used in the lithographic step, undesirable variations in the thicknesses of the oxide or metal layers, etc.
In addition, one of the technological processes most widely used for integration of current generators, known as Bipolar CMOS DMOS 5 (BCD5)—the most recent one among the processes able to integrate logic, linear and power circuits on the same chip—is not a technological process devised exclusively for the integration of MOS signal circuits (as may instead be the technological process known as HCMOS), and thus from said technological process very low tolerance values cannot be expected on the dimensions of the MOS transistors forming the current generators. The mismatches that take place are in fact reflected in a substantially proportional way on the values of the currents supplied by the generators on account of the linearity of the link between the drain current of a MOS transistor and its W/L shape ratio. The error that modifies the behavior of the output with respect to the desired one is strongly correlated to the signal, and consequently worsens the quality of the signal above all in terms of harmonic distortion.
Each of the generator elements supplies an elementary contribution different from the expected nominal contribution, and the error thus generated is transferred unaltered onto the output analog signal in so far as it is the sum of the various elementary contributions.
Given the extent of the latter (but for drifts in time) and assuming as predefined the set of generator elements activated for the synthesis of a given level K of the output analog signal, there will always be superimposed on the latter an error δK that is constant and equal to the sum of the errors introduced by the individual generator elements on account of the mismatches that characterize them.
The error δK is to be considered altogether independent of the errors δj (where j≠K, 1≦j≦N) superimposed on the other levels of the output analog signal on account of the randomness of the mismatches present, and this entails a deformation of the transfer characteristic of the DAC (a typical staircase characteristic) which is not foreseeable a priori and hence cannot be eliminated in a simple way, for example by means of a block having an inverse characteristic, on account of the complexity characterizing said block.
In particular, the fact that the curve passing through the mean points of the levels of the transfer characteristic of the DAC is not a straight line is an index of the non-linearity of the converter itself, and from this there derives a distortion of the signal which is all the greater the more marked is the diversity between the generator elements used for the generation of the elementary contributions that concur to form the output analog signal.
Since it is not possible to perform a “static” compensation of the non-ideality of the generator elements of the DAC (on account of the excessive increase in production costs, laser trimming of the values of the individual integrated elements proves impracticable), in order to minimize the effects of the mismatches on the output signal, improving as far as possible the in-band spectrum, it has been proposed to resort to a “dynamic” compensation, which envisages modification, instant by instant, of the set of the generator elements that is used for generating the output analog signal, whatever the pattern of the input signal.
The philosophy lying at the basis of dynamic compensation of the non-ideality of the generator elements may be readily understood if the errors due to the mismatches are assumed as being zero-average random ones, and if a constant input signal, for example equal to K, is considered: by always activating the same set of generator elements, at output a constant signal equal to K+δK will be obtained, whilst if a variation is made in the generator elements activated at each sampling instant, the output will follow an oscillating pattern with a mean value K. In this way, then, the error present on the output analog signal will no longer be constant but will vary in time (δ=δ(t)), and it will be possible to eliminate it by performing an average in time, which can be represented in the frequency domain by a low-pass filter.
The methodology described above is known in the literature as “Dynamic Element Matching” (DEM) and has different applications according to the modalities with which the generator elements to be activated are each time chosen.
Numerous DEM techniques have been proposed for compensating the non-linearity of a DAC, the simplest being known in the literature as “Randomization” or “Scrambling”. This envisages that the generator elements to be activated are chosen altogether at random among the ones available, thus determining a variable error even in the presence of a constant input.
The aforesaid methodology, however, has proved unable to lead to satisfactory results for audio applications, in so far as the random choice of the generator elements to be activated results in a considerable increase of in-band background noise, which entails a worsening of the signal to noise-and-distortion (SINAD) ratio, often unacceptable for this type of application.
In addition to the unacceptable increase in the amount of noise, a second aspect which renders the above methodology useful only at a theoretical level is the clear unrealizability of a block implementing it: at each sampling instant, a high number of random values must be generated simultaneously, and this is only possible with a logic of considerable dimensions, which is not integratable on a chip on which it is intended to implement also the filtering stage necessary for eliminating the aforesaid time-varying error (δ=δ(t)) presents on the output analog signal.
In order to overcome the drawbacks referred to above, numerous other DEM methodologies have been proposed that are able to eliminate the effects of the non-idealities of a DAC, the said methodologies being known in the literature as “Full/Partial Randomization”, “Barrel Shifting”, “Clocked Averaging”, etc. A fair share of these, however, are not to be held satisfactory for an integrated audio design; acceptable performance can in fact be reached only at the expense of a considerable theoretical and implementational complexity.
Two methodologies which, instead, have appeared advantageous in the context of digital-to-analog power conversion are known in the literature as “Individual Level Averaging” (ILA) and “Data Weighted Averaging” (DWA).
The basic idea behind the above two methodologies is guaranteeing erasure of the error on the DAC output whatever the pattern of the input signal, and this may be possible if, for each level of the output signal, all the generator elements available are activated in turn. As the number of levels of the output signal increases, the time averaging operation that is necessary for eliminating undesired high-frequency fluctuations becomes more precise.
In particular, if for example an n-bit DAC for audio applications with an N-level balanced output is considered, i.e., a DAC able to supply at output an N-level analog signal with zero-averaging value, N/2 levels being positive and N/2 levels being negative, and the levels being symmetrical with respect to zero, the ILA methodology can be represented schematically as in FIGS. 4 and 5, which respectively regard the case where the input code X is positive and the case where the input code X is negative.
In particular, as illustrated in FIGS. 4 and 5, ILA envisages:
a) using N/2 positive generator elements (positive current generators) and N/2 negative generator elements (negative current generators) for the first audio channel (channel +) and as many positive and negative generator elements for the second channel (channel −); the said generator elements are represented in FIGS. 4 and 5 by squares designated with EU;
b) attributing to the positive generator elements and to the negative generator elements of each audio channel the same progressive addresses; this type of indexing is represented schematically in FIGS. 4 and 5 by organizing, for each audio channel, the positive generator elements in a first vector, designated by V1, and the negative generator elements in a second vector, designated by V2. In this way, the progressive addresses of the positive generator elements and of the negative generator elements are found to correspond to the positions of said generator elements within the respective vectors, and the addresses of the positive generator elements are found to be the same as those of the negative generator elements; and
c) defining an index Ix for each input code X supplied to the DAC, with (−N/2+1)≦X≦N/2.
Whenever an input code X appears on the input of the DAC, according to the sign of the input code X, for each of the two audio channels a set of X generator elements belonging to the vector V1 or to the vector V2 (indicated by hatched areas) is activated, in such a way as to obtain a first set of generator elements activated formed exclusively by positive generator elements, and a second set of generator elements activated formed exclusively by negative generator elements.
In particular, the same index Ix is applied both to the vector V1 (or V2) of the first audio channel and to the vector V1 (or V2) of the second audio channel, and each set of generator elements activated is formed by the generator elements comprised between the one having index Ix and the one having index Ix+X−1.
In particular, if the input code X is positive, then, as illustrated in FIG. 4, a first set of X positive generator elements belonging to the vector V1 of the first channel and a second set of X negative generator elements belonging to the vector V2 of the second channel are activated. The elementary contributions supplied by the X positive generator elements of the first set are added together, so giving rise to a positive output YP, and the elementary contributions supplied by the X negative generator elements of the second set are added together, so giving rise to a negative output YN.
If, instead, the input code X is negative, then, as illustrated in FIG. 5, a first set of X negative generator elements belonging to the vector V2 of the first channel and a second set of X positive generator elements belonging to the vector V1 of the second channel are activated. The elementary contributions supplied by the X negative generator elements of the first set are added together, so giving risen to a negative output YN, and the elementary contributions supplied by the X positive generator elements of the second set are added together, so giving rise to a positive output YP.
The positive output YP and the negative output YN are then respectively applied to the positive (+) terminal and to the negative (−) terminal of the load (loudspeaker), which is thus driven in a differential way.
Before the arrival of a new input code X at input to the DAC, the index Ix is then updated in such a way as to identify a new set of generator elements to be used the next time that the input code X appears again at input to the DAC.
When an updating of the index Ix causes the maximum value to be exceeded, the index Ix is set equal to the difference between the value calculated exceeding the maximum value and the maximum value itself, so returning to the first generator elements of the vectors V1 and V2.
The same reasoning applies to the set of generator elements to be activated: if these go beyond the (N/2)-th generator element, the remaining generator elements are activated from the initial part of the vectors V1 and V2, and from this there derives that in ILA, as in all methodologies that are based upon an indexing of the generator elements, the vectors V1 and V2 are in fact circular vectors.
According to the procedure for updating the index Ix, ILA is distinguished into “Rotational Individual Level Averaging” (RILA) and “Additional Individual Level Averaging” (AILA).
The assessment of the efficacy of the above-mentioned two methodologies derives from the consideration that has led to the definition of ILA: within the said methodology, an algorithm is all the more satisfactory the shorter is the duration of its “erasure cycle”, i.e., the time interval that must elapse for the index Ix to return to its initial value. The practical justification for this statement is found in the case of a constant input: superimposed on the desired mean value there is present a random and periodic pattern, with a period equal to the time interval necessary for the index Ix to return to its initial value, and as the duration of this period decreases the spectral components linked to the random oscillations will translate towards high frequencies, moving away from the base band.
In RILA, the law of updating of each index Ix is as follows: Ix(t+1)=Ix(t)+1; this means activating at the sampling instant (t+1) a set of generator elements which differs by a single generator element with respect to the set of generator elements activated at the preceding sampling instant. Whatever the value of X, then, the erasure cycle always lasts N/2 sampling instants, equal to the time interval necessary for the index Ix to return to the value 1.
In AILA, instead, the law of updating of each index Ix is as follows: Ix(t+1)=Ix(t)+|X|; this means activating at the sampling instant (t+1) a set of generator elements completely separate from the set of generator elements extracted at the preceding sampling instant. It follows that when the input code X and N/2 have factors in common, the erasure cycle is shorter than that of RILA, and in particular when the input code X is a sub-multiple of N, the erasure cycle is reduced to (N/2)/X sampling instants, thus determining approach of the spectral components due to the mismatches to half the sampling frequency.
The implementation of a dynamic matching algorithm based on ILA is via a state logic which exploits the theory of state diagrams or trellis diagrams, the index of complexity of which (and consequently of the algorithm represented thereby), which is equal to the number of states characterizing the trellis diagram itself, is found to be equal to (N−1)N−1 both for RILA and for AILA.
Such a high complexity inevitably leads to somewhat long erasure cycles, and hence to a far from effective modulation of the undesired spectral components present in the band, and this applies above all to RILA on account not only of the longer time interval required by the algorithm for activation of all the generator elements, but also on account of the fact that the indices are updated with a constant quantity.
To reduce the circuit complexity of the logic implementing the dynamic matching algorithm, the aforementioned Data Weighted Averaging (DWA) methodology has been then proposed, the aim of which is to cause all the generator elements of the DAC to be activated in the shortest time possible, at the same time ensuring that each of them is activated the same number of times, even in short time intervals.
In particular, DWA is a simplification of AILA obtained by drastically reducing the “degrees of freedom” defined by the high number of indices used (one for each input code X supplied to the DAC input). In particular, in DWA only one index is used, which is each time modified by the input code X, and this methodology envisages selecting, at each sampling instant, |X| consecutive generator elements starting from the first element not used at the preceding sampling instant. Consequently, in this methodology only one index is required, which is each time updated according to the relation I(t+1)=I(t)+|X|, which is very similar to the relation of AILA, but no longer contains a distinction between the indices according to the input code X.
Erasure of the error is controlled exclusively by the pattern of the input code X, whence the name of the methodology. With a single index, moreover, the circuit complexity of the logic implementing this methodology, evaluated according to the same criteria as those used for evaluating the complexity of the RILA and AILA methodologies, proves to be equal to (N−1)2, i.e., decidedly lower than that of ILA.
Although DWA presents a circuit complexity decidedly lower than those of RILA and AILA and a decidedly good performance in terms of SINAD ratio both in the presence of positive input signals (ie., encoded with levels of between 0 and N−1) and in the presence of zero-averaging input signals (i.e., characterized by a high number of zero crossings) having a sufficiently high amplitude (greater than −30 dB), it, however, affords a performance that becomes noticeably poorer as the amplitude of the zero-average signals decreases. Consequently, its use does not make it possible to render the non-linearities of the two branches, the positive one and the negative one, of the transfer characteristic uncorrelated as the amplitude of the input signal varies, and hence does not make it possible to achieve a SINAD ratio acceptable for audio applications.
BRIEF SUMMARY OF THE INVENTION
The disclosed embodiments of the present invention provide a digital-to-analog conversion method that enables the drawbacks described above to be overcome at least in part, and in particular that provides a good behavior of the digital-to-analog converter even in the presence of zero-average signals characterized by frequent zero crossings and reduced amplitudes, this being a fundamental constraint for audio devices with differential output, and hence zero-averaging value.
In accordance with one embodiment of the invention, a method for digital-to-analog conversion of a digital input code into a first and a second output analog signal to be supplied to a first terminal and a second terminal of a load, the conversion being performed by a digital-to-analog converter with an N-level balanced output is provided. The method includes providing N/2 positive generator elements that supply respective positive elementary contributions that are nominally equal to one another, and N/2 negative generator elements supplying respective negative elementary contributions that are nominally equal to one another and, in absolute value, equal to the positive elementary contributions; attributing the same progressive addresses to the positive generator elements and to the negative generator elements; defining a first index for positive input codes and a second index for negative input codes; and, in response to an input code at the input of the digital-to-analog converter: selecting, between the first and second index, the index corresponding to a sign of the input code; activating a first set of positive generator elements and a second set of negative generator elements, the number of negative and positive generator elements activated being equal to one another and a function of the input code, the addresses of the negative and positive generator elements activated being a function of the selected index; generating the first output analog signal as a function of the positive elementary contributions and generating the second output analog signal as a function of the negative elementary contributions; and updating the selected index according to the input code.