|Publication number||US20020123170 A1|
|Application number||US 10/017,053|
|Publication date||Sep 5, 2002|
|Filing date||Dec 13, 2001|
|Priority date||Mar 2, 2001|
|Also published as||US6348365|
|Publication number||017053, 10017053, US 2002/0123170 A1, US 2002/123170 A1, US 20020123170 A1, US 20020123170A1, US 2002123170 A1, US 2002123170A1, US-A1-20020123170, US-A1-2002123170, US2002/0123170A1, US2002/123170A1, US20020123170 A1, US20020123170A1, US2002123170 A1, US2002123170A1|
|Inventors||John Moore, Terry Gilton|
|Original Assignee||Moore John T., Gilton Terry L.|
|Export Citation||BiBTeX, EndNote, RefMan|
|Referenced by (73), Classifications (20)|
|External Links: USPTO, USPTO Assignment, Espacenet|
 This invention relates to semiconductor fabrication processing and more particularly, to methods for forming programmable capacitor dynamic random access memories (PCRAMs) utilizing a programmable metallization cell.
 Memory devices are used in electronic systems and computers to store information in the form of binary data. These memory devices may be characterized as either volatile memory, where the stored data is lost if the power source is disconnected or removed or non-volatile, where the stored data is retained even during power interruption. An example of a non-volatile memory device is the programmable conductor random access memory (PCRAM) that utilizes a programmable metallization cell (PMC).
 A PMC comprises a fast ion conductor such as a chalcogenide-metal ion and at least two electrodes (e.g., an anode and a cathode) comprising an electrically conducting material and disposed at the surface of the fast ion conductor a set distance apart from each other. When a voltage is applied to the anode and the cathode, a non-volatile metal dendrite rapidly grows from the cathode along the surface of the fast ion conductor towards the anode. The growth rate of the dendrite is a function of the applied voltage and time; the growth of the dendrite may be stopped by removing the voltage or the dendrite may be retracted back towards the cathode, or even disintegrated, by reversing the voltage polarity at the anode and cathode. Changes in the length and width of the dendrite affect the resistance and capacitance of the PMC.
 One of the important elements of the PMC is the fast ion conductor, which plays a critical part during the programming of the PMC. The construction of the fast ion conductor is key to providing effective and reliable programming of the PMC and is a significant focus of the present invention.
 Thus, the present invention comprises fabrication techniques to form a programmable metallization cell, for use in a programmable conductor random access memory, that will become apparent to those skilled in the art from the following disclosure.
 An exemplary embodiment of the present invention includes a method for forming a programmable cell by forming an opening in a dielectric material to expose a portion of an underlying first conductive electrode, forming a recessed chalcogenide-metal ion material in the opening and forming a second conductive electrode overlying the dielectric material and the chalcogenide-metal ion material.
 A method for forming a recessed chalcogenide-metal ion material comprising forming a glass material being recessed approximately 50% or less, in the opening in the dielectric forming a metal material on the glass material and diffusing metal ions from the metal material into the glass material by using ultraviolet light or ultraviolet light in combination with a heat treatment, to cause a resultant metal ion concentration in the glass material.
FIG. 1 is a cross-sectional view depicting a semiconductor substrate covered with layers of silicon dioxide, tungsten, which forms the first conductor of the programmable metallization cell, and silicon nitride.
FIG. 2 is a subsequent cross-sectional view taken from FIG. 1 after patterning and etching a via into the silicon nitride to expose the underlying tungsten.
FIG. 3 is a subsequent cross-sectional view taken from FIG. 2 following the formation of a recessed germanium/selenium material into the via.
FIG. 4 is a subsequent cross-sectional view taken from FIG. 3 following the formation of a silver layer that overlies the silicon nitride and the recessed germanium/selenium material.
FIG. 5 is a subsequent cross-sectional view taken from FIG. 4 following the planarization of the silver layer to the level of the surface of the silicon nitride.
FIG. 6 is a subsequent cross-sectional view taken from FIG. 5 following the formation of a planarized second conductive electrode for the programmable metallization cell.
 An exemplary implementation of the present invention is directed to a process for forming a programmable metallization cell (PMC) for a PCRAM device as depicted in FIGS. 1-6.
 The following exemplary implementation is in reference to the fabrication of programmable conductor random access memory (PCRAM) device. While the concepts of the present invention are conducive to the fabrication of PCRAMs, the concepts taught herein may be applied to other semiconductor devices that would likewise benefit from the use of the process disclosed herein. Therefore, the depiction of the present invention in reference to the manufacture of a PCRAM (the preferred embodiment), is not meant to so limit the extent to which one skilled in the art might apply the concepts taught hereinafter.
 Referring to FIG. 1, a semiconductive substrate 10, such as a silicon wafer, is prepared for the processing steps of the present invention. As described above, a PMC may be implemented in various different technologies. One such application is in memory devices. Insulating material 11, such as silicon dioxide, is formed over substrate 10. Next, conductive material 12, such as tungsten, is formed over insulating material 11. Conductive material 12 will function as one of the conductive electrodes of the PMC. Next, dielectric material 13, such as silicon nitride, is formed over conductive material 12.
 Referring now to FIG. 2, masking material 21 is patterned and then followed by an etch to removed an unmasked portion of dielectric material 13, with the etch stopping once it reaches conductive material 12. This etch results in the formation of via (opening) 22 in preparation for the subsequent formation of a chalcogenide-metal ion material, such as metal ion laced glass material.
 Referring now to FIG. 3, masking material 21 of FIG. 2 is stripped and glass material 31, such as Ge3Se7, is formed such as to substantially fill via 22. Glass material 31 is then planarized down to the surface of dielectric material 13, by using an abrasive planarization etching technique, such as chemical mechanical planarization (CMP).
 Referring now to FIG. 4, planarized glass material 31 is recessed within via 22, by using either a dry or wet etch. A specific, exemplary wet etch would incorporate the use of NH4OH. A specific, exemplary dry etch would incorporate the use of a fluorine based chemistry, though any dry etch that will remove oxide would be effective. Regardless of the type of etch used, it is desirable that glass material 31 is recessed within via 22 approximately 50% or less (ideally 40-50%) the depth of opening 22, the importance of which will become apparent later in the description of the process.
 Next, a metal material 41, such as silver, is formed over dielectric material 13 and recessed glass material 31. Other metal materials that may be used for metal material 41 include tellurium and copper. Then, metal material 41 is either irradiated with ultraviolet light or thermally treated in combination with irradiation to cause sufficient diffusion of metal ions from metal material 41 into recessed glass material 31. For example, metal material 41 may be irradiated for 15 minutes at 4.5 mw/cm2 with the ultraviolet light at 405 nm wavelength. Additionally, the irradiation may be used in combination with a thermal process using the settings of 110° C. for 5-10 minutes. The irradiation process is sufficient to cause the desired diffusion of ion metals; however, the disclosed thermal process by itself is not and thus must be used in combination with the irradiation process. It is preferred that the resultant metal ion concentration in the glass material be approximately 27%+/−10%, to ensure the formation of a conductive path/dendrite during the eventual programming of the PMC.
 Referring now to FIG. 5, metal material 41 is planarized back to the top surface of dielectric material 13, leaving a residual layer of metal material 41 on top of recessed glass material 31 (shown in FIG. 4), which is now laced with metal ions to form a metal ion-laced glass material 51. By recessing glass material 31 within via 22 by 40-50% in a previous step, a sufficient amount of metal material 41 is guaranteed to remain after the metal material is planarized so that residual metal material 41 provides an ample source of metal material for diffusion of metal ions into the glass material. Also, residual metal material 41 must be thin enough to allow penetration of the ultraviolet light and the metal ion laced glass material 51 must maintain sufficient thickness in order to function properly as a fast ion conductor.
 Referring now to FIG. 6, a second conductive electrode 61 is formed over dielectric material 13 and residual metal material 41 to complete the formation of the PMC. Suitable conductive materials that can be used to form electrode 61 include a conductive material that will effectively alloy with the metal material selected to form metal material 41, of which silver is preferred. In the case where silver is used to form conductive material 41, suitable conductive materials for electrode 61 include tungsten, tantalum, titanium, tantalum nitride, tungsten nitride and so forth. The resulting structure forms a fast ion conductor comprising a chalcogenide-metal ion material (i.e., such as glass layer 51 containing a concentration of silver ions) and at least two conductive electrodes, namely electrodes 12 and 61. The PCRAM is then completed in accordance with fabrication steps used by those skilled in the art.
 The PMC is programmed by applying a sufficient voltage across electrodes 12 and 61 to cause the formation of a conductive path/dendrite (or referred to simply as a dendrite) between the two electrodes 12 and 61, by virtue of a conductor (i.e., such as silver) that is now present in metal ion laced glass layer 51. In general terms, the dendrite can grow at any point on the cell starting with the electrode that is opposite the excess metal. In the specific example of the present invention, with the programming voltage applied across electrodes 12 and 61, the dendrite grows vertically at the surface of fast ion conductive material 51 and along the inside of via 22, with the dendrite extending from electrode 12 towards electrode 61.
 It is to be understood that, although the present invention has been described with reference to a preferred embodiment, various modifications, known to those skilled in the art, may be made to the disclosed process herein without departing from the invention as recited in the several claims appended hereto.
|Citing Patent||Filing date||Publication date||Applicant||Title|
|US6646902||Aug 30, 2001||Nov 11, 2003||Micron Technology, Inc.||Method of retaining memory state in a programmable conductor RAM|
|US6709887||Oct 31, 2001||Mar 23, 2004||Micron Technology, Inc.||Method of forming a chalcogenide comprising device|
|US6709958||Aug 30, 2001||Mar 23, 2004||Micron Technology, Inc.||Integrated circuit device and fabrication using metal-doped chalcogenide materials|
|US6710423||Aug 23, 2002||Mar 23, 2004||Micron Technology, Inc.||Chalcogenide comprising device|
|US6727192||Mar 1, 2001||Apr 27, 2004||Micron Technology, Inc.||Methods of metal doping a chalcogenide material|
|US6730547||Nov 1, 2002||May 4, 2004||Micron Technology, Inc.||Integrated circuit device and fabrication using metal-doped chalcogenide materials|
|US6731528||May 3, 2002||May 4, 2004||Micron Technology, Inc.||Dual write cycle programmable conductor memory system and method of operation|
|US6734455||Mar 15, 2001||May 11, 2004||Micron Technology, Inc.||Agglomeration elimination for metal sputter deposition of chalcogenides|
|US6737312||Aug 27, 2001||May 18, 2004||Micron Technology, Inc.||Method of fabricating dual PCRAM cells sharing a common electrode|
|US6751114||Mar 28, 2002||Jun 15, 2004||Micron Technology, Inc.||Method for programming a memory cell|
|US6784018||Aug 29, 2001||Aug 31, 2004||Micron Technology, Inc.||Method of forming chalcogenide comprising devices and method of forming a programmable memory cell of memory circuitry|
|US6791859||Nov 20, 2001||Sep 14, 2004||Micron Technology, Inc.||Complementary bit PCRAM sense amplifier and method of operation|
|US6791885||Feb 19, 2002||Sep 14, 2004||Micron Technology, Inc.||Programmable conductor random access memory and method for sensing same|
|US6800504||Nov 1, 2002||Oct 5, 2004||Micron Technology, Inc.||Integrated circuit device and fabrication using metal-doped chalcogenide materials|
|US6809362||Feb 20, 2002||Oct 26, 2004||Micron Technology, Inc.||Multiple data state memory cell|
|US6812087||Aug 6, 2003||Nov 2, 2004||Micron Technology, Inc.||Methods of forming non-volatile resistance variable devices and methods of forming silver selenide comprising structures|
|US6813176||Nov 5, 2003||Nov 2, 2004||Micron Technology, Inc.||Method of retaining memory state in a programmable conductor RAM|
|US6813178||Mar 12, 2003||Nov 2, 2004||Micron Technology, Inc.||Chalcogenide glass constant current device, and its method of fabrication and operation|
|US6815818||Nov 19, 2001||Nov 9, 2004||Micron Technology, Inc.||Electrode structure for use in an integrated circuit|
|US6818481||Mar 7, 2001||Nov 16, 2004||Micron Technology, Inc.||Method to manufacture a buried electrode PCRAM cell|
|US6825135||Jun 6, 2002||Nov 30, 2004||Micron Technology, Inc.||Elimination of dendrite formation during metal/chalcogenide glass deposition|
|US6831019||Aug 29, 2002||Dec 14, 2004||Micron Technology, Inc.||Plasma etching methods and methods of forming memory devices comprising a chalcogenide comprising layer received operably proximate conductive electrodes|
|US6838307||Jul 14, 2003||Jan 4, 2005||Micron Technology, Inc.||Programmable conductor memory cell structure and method therefor|
|US6847535||Feb 20, 2002||Jan 25, 2005||Micron Technology, Inc.||Removable programmable conductor memory card and associated read/write device and method of operation|
|US6881623||Aug 29, 2001||Apr 19, 2005||Micron Technology, Inc.||Method of forming chalcogenide comprising devices, method of forming a programmable memory cell of memory circuitry, and a chalcogenide comprising device|
|US6903394||Nov 27, 2002||Jun 7, 2005||Micron Technology, Inc.||CMOS imager with improved color response|
|US6912147||Jun 28, 2004||Jun 28, 2005||Micron Technology, Inc.||Chalcogenide glass constant current device, and its method of fabrication and operation|
|US7030405||Jan 22, 2004||Apr 18, 2006||Micron Technology, Inc.||Method and apparatus for resistance variable material cells|
|US7102150||May 11, 2001||Sep 5, 2006||Harshfield Steven T||PCRAM memory cell and method of making same|
|US7126179||Jan 16, 2004||Oct 24, 2006||Micron Technology, Inc.||Memory cell intermediate structure|
|US7132675||Feb 27, 2004||Nov 7, 2006||Micron Technology, Inc.||Programmable conductor memory cell structure and method therefor|
|US7145795||Apr 13, 2004||Dec 5, 2006||Micron Technology, Inc.||Multi-cell resistive memory array architecture with select transistor|
|US7151273||Apr 12, 2002||Dec 19, 2006||Micron Technology, Inc.||Silver-selenide/chalcogenide glass stack for resistance variable memory|
|US7315465||Jan 13, 2005||Jan 1, 2008||Micro Technology, Inc.||Methods of operating and forming chalcogenide glass constant current devices|
|US7410863||Sep 7, 2006||Aug 12, 2008||Micron Technology, Inc.||Methods of forming and using memory cell structures|
|US7423282||Jul 6, 2006||Sep 9, 2008||Infineon Technologies Ag||Memory structure and method of manufacture|
|US7542319||Jan 17, 2007||Jun 2, 2009||Micron Technology, Inc.||Chalcogenide glass constant current device, and its method of fabrication and operation|
|US7646007||Oct 24, 2006||Jan 12, 2010||Micron Technology, Inc.||Silver-selenide/chalcogenide glass stack for resistance variable memory|
|US7663133||Nov 15, 2006||Feb 16, 2010||Micron Technology, Inc.||Memory elements having patterned electrodes and method of forming the same|
|US7663137||Dec 21, 2007||Feb 16, 2010||Micron Technology, Inc.||Phase change memory cell and method of formation|
|US7668000||Jun 25, 2007||Feb 23, 2010||Micron Technology, Inc.||Method and apparatus providing a cross-point memory array using a variable resistance memory cell and capacitance|
|US7682992||May 20, 2008||Mar 23, 2010||Micron Technology, Inc.||Resistance variable memory with temperature tolerant materials|
|US7687793||May 22, 2007||Mar 30, 2010||Micron Technology, Inc.||Resistance variable memory cells|
|US7692177||Jul 5, 2006||Apr 6, 2010||Micron Technology, Inc.||Resistance variable memory element and its method of formation|
|US7700422||Oct 25, 2006||Apr 20, 2010||Micron Technology, Inc.||Methods of forming memory arrays for increased bit density|
|US7701760||Sep 12, 2008||Apr 20, 2010||Micron Technology, Inc.||Resistance variable memory device with sputtered metal-chalcogenide region and method of fabrication|
|US7709289||Apr 22, 2005||May 4, 2010||Micron Technology, Inc.||Memory elements having patterned electrodes and method of forming the same|
|US7709885||Feb 13, 2007||May 4, 2010||Micron Technology, Inc.||Access transistor for memory device|
|US7723713||May 31, 2006||May 25, 2010||Micron Technology, Inc.||Layered resistance variable memory device and method of fabrication|
|US7745808||Dec 28, 2007||Jun 29, 2010||Micron Technology, Inc.||Differential negative resistance memory|
|US7749853||Jan 11, 2008||Jul 6, 2010||Microntechnology, Inc.||Method of forming a variable resistance memory device comprising tin selenide|
|US7759665||Feb 21, 2007||Jul 20, 2010||Micron Technology, Inc.||PCRAM device with switching glass layer|
|US7785976||Feb 28, 2008||Aug 31, 2010||Micron Technology, Inc.||Method of forming a memory device incorporating a resistance-variable chalcogenide element|
|US7791058||Jun 25, 2009||Sep 7, 2010||Micron Technology, Inc.||Enhanced memory density resistance variable memory cells, arrays, devices and systems including the same, and methods of fabrication|
|US7863597||Jan 24, 2008||Jan 4, 2011||Micron Technology, Inc.||Resistance variable memory devices with passivating material|
|US7869249||Mar 11, 2008||Jan 11, 2011||Micron Technology, Inc.||Complementary bit PCRAM sense amplifier and method of operation|
|US7910397||Nov 13, 2006||Mar 22, 2011||Micron Technology, Inc.||Small electrode for resistance variable devices|
|US7924603||Feb 4, 2010||Apr 12, 2011||Micron Technology, Inc.||Resistance variable memory with temperature tolerant materials|
|US7940556||Mar 16, 2010||May 10, 2011||Micron Technology, Inc.||Resistance variable memory device with sputtered metal-chalcogenide region and method of fabrication|
|US8080816||Dec 3, 2009||Dec 20, 2011||Micron Technology, Inc.||Silver-selenide/chalcogenide glass stack for resistance variable memory|
|US8334165 *||Apr 16, 2010||Dec 18, 2012||Seagate Technology Llc||Programmable metallization memory cells via selective channel forming|
|US8466445||Nov 23, 2011||Jun 18, 2013||Micron Technology, Inc.||Silver-selenide/chalcogenide glass stack for resistance variable memory and manufacturing method thereof|
|US20040179390 *||Mar 12, 2003||Sep 16, 2004||Campbell Kristy A.||Chalcogenide glass constant current device, and its method of fabrication and operation|
|US20040223390 *||Jun 14, 2004||Nov 11, 2004||Campbell Kristy A.||Resistance variable memory element having chalcogenide glass for improved switching characteristics|
|US20040233728 *||Jun 28, 2004||Nov 25, 2004||Campbell Kristy A.||Chalcogenide glass constant current device, and its method of fabrication and operation|
|US20050133778 *||Jan 13, 2005||Jun 23, 2005||Campbell Kristy A.||Chalcogenide glass constant current device, and its method of fabrication and operation|
|US20050219901 *||Jun 3, 2005||Oct 6, 2005||Gilton Terry L||Non-volatile memory structure|
|US20050226035 *||Apr 13, 2004||Oct 13, 2005||Ramin Ghodsi||Multi-cell resistive memory array architecture with select transistor|
|US20110240948 *||Oct 6, 2011||Sony Corporation||Memory device and method of manufacturing the same|
|USRE40995||Oct 3, 2007||Nov 24, 2009||Micron Technology, Inc.||Multi-element resistive memory|
|DE102006031339A1 *||Jul 6, 2006||Jan 10, 2008||Altis Semiconductor Snc||Solid electrolyte memory structure, useful in conductive bridging random access memory, dynamic random access memory and programmable metallization cell, comprises a solid electrolyte layer, a metal layer, and a corrosion resistance layer|
|DE102007045812A1 *||Sep 25, 2007||Apr 9, 2009||Altis Semiconductor Snc||Verfahren zum Herstellen einer Speicherzelle, Speicherzelle sowie integrierte Schaltung|
|DE102007045812B4 *||Sep 25, 2007||Dec 22, 2011||Altis Semiconductor Snc||Verfahren zum Herstellen einer Speicherzelle, Speicherzelle sowie integrierte Schaltung|
|U.S. Classification||438/102, 438/103, 257/E45.002, 257/E21.646|
|International Classification||H01L45/00, H01L21/8242|
|Cooperative Classification||H01L45/1683, G11C13/0011, H01L45/143, H01L45/141, H01L45/085, H01L45/1233, H01L45/1658|
|European Classification||G11C13/00R5B, H01L45/08M, H01L45/16M4, H01L45/12D4, H01L45/14B4, H01L45/16P4, H01L45/14B|