US 20020195613 A1
A fast recovery diode has a single large area P/N junction surrounded by a termination region. The anode contact in contact with the central active area extends over the inner periphery of an oxide termination ring and an EQR metal ring extends over the outer periphery of the oxide termination ring. Platinum atoms are diffused into the back surface of the device. A three mask process is described. An amorphous silicon layer is added in a four mask process, and a plurality of spaced guard rings are added in a five mask process.
1. A fast recovery diode comprising a silicon die having a substrate of a first conductivity type; a single central diffusion extending onto the upper surface of said die and of the other conductivity type defining a single continuous P-N junction; a termination region surrounding the outer periphery of said upper surface of said device and including a silicon dioxide layer which overlies the outer edge of said diffusion and which defined the diffusion window for said single diffusion; an anode contact metal in contact with the surface of said diffusion and overlying the inner peripheral edge of said silicon dioxide layer to define a field plate; an EQR conductive ring which is separated from said anode contact and which extends over the outer peripheral edge of said silicon dioxide layer; and platinum atoms diffused into the back surface of said die to act as life time killers.
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12. A reduced mask process for forming a fast recovery diode comprising the steps of forming a field oxide atop a silicon die; applying a first mask to said top surface of said field oxide and etching a large area window in the center thereof and leaving an outer oxide termination ring; diffusing impurity atoms through said window to define a large area P/N junction; applying a second mask to said surface and etching a window therein to clear said central area for the application of an anode contact; evaporating platinum metal on the back surface of said die and heating said die to drive platinum atoms into said die; depositing metal atop said top surface of said die and to the top of the P/N junction and over the oxide termination ring; and applying a third mask to said top surface and opening windows to etch said metal to define an anode contact which overlies the inner periphery of said termination ring and a separate EQR ring which overlies the outer periphery of said termination ring.
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FIG. 1 shows, in cross-section, a portion of a fast recovery diode die 50 and its termination. The diode consists of a simple large area P type diffusion 51 in an N type epitaxial layer 52 atop the die 50. Diffusion 51 is a boron diffusion having a depth of 6 μm and a peak concentration of 2E19/cm3. A field oxide 54 is formed atop the silicon surface and a conductive (aluminum) field plate 52 which is an extension of the anode electrode is also formed. A metal (aluminum) EQR ring 53 completes the termination. An anode contact is connected to the P type diffusion 51 over substantially the full top area of die 50 and a cathode contact (not shown) is connected to its bottom surface. Platinum atoms are diffused into the back surface of the die (wafer) which are driven in from a 10 Å thick layer of platinum for 30 minutes at 950° C. Note that the dimensions on FIG. 1 (and FIGS. 2 and 3) are out of scale and are in microns.
 The novel structure of FIG. 1 is made by the following novel 3 mask process of the invention for a FRED rated at 200 volts. The starting wafer has an N+ arsenic doped substrate which has an N− phosphorus doped epitaxial layer 52. The epitaxial layer thickness is 25 μm and has a resistivity of 10 ohm-cm. The process steps used are given in the following Table:
FIG. 2 shows a cross-section like that of FIG. 1, but with a termination modified to make the device a 400 volt device with a 4 mask process. Components similar to those of FIG. 1 have similar identifying numerals.
 In order to withstand 400 volts, the device of FIG. 2 employs an added diffusion defining termination P ring 60, an added field plate 61 and an amorphous silicon layer 63 on top of the termination surface, including field plates 52 and 61 and EQR ring 53.
 The device of FIG. 2 is made by a novel 4 mask process to increase the device rating to 400 volts. The process begins with a wafer like that of FIG. 1, except that the epitaxial layer 52 is 47 μm thick, and has a resistivity of 15 ohm-cm.
 The process for the devices of FIG. 2 starts with steps 1 to 22 above up to (“photorest strip” and before “Al sinter”) for the device of FIG. 1. Following step 22, and before Al sinter, a layer 63 of amorphous silicon, 1 800 Å thick, is deposited atop the wafer surface. A mask 4 step is then carried out to etch the amorphous silicon to open the active area; specifically, a wet etch (DFK) process.
FIG. 3 is a cross-section like that of FIGS. 1 and 2 with elements added to permit the device to operate at 600 volts. The process used is a 5 mask process. The elements added are P diffusion rings 70 to 73 and N+ diffusion 74 in the cutting street and surrounding the die edge to act as an N+ EQR ring, and a modified metal EQR ring 75. The starting wafer for the 600 volt device has an epitaxial layer 52 thickness of 61 μm and resistivity of 21.5 ohm-cm. The novel 5 mask process for making the device of FIG. 3 employs the steps used for the 400 volt device of FIG. 2, except that a further mask step is used after step 8 above and following the B Br Ox step. Following this added mask step, there is a BOE etch for 17 minutes to open windows for the guard ring diffusions and the process continues as described for FIGS. 1 and 2.
 In each of FIGS. 1, 2 and 3, the novel FRED device employs a single large P diffusion for the active area and platinum atoms for life time killing. In FIGS. 2 and 3, the device termination is covered with amorphous silicon.
 Although the present invention has been described in relation to particular embodiments thereof, many other variations and modifications and other uses will become apparent to those skilled in the art.
FIG. 1 is a cross-section of a portion of a novel FRED die made in accordance with the invention by a 3 mask process for a 200 volt device.
FIG. 2 is a cross-section of a portion of a novel FRED die made in accordance with the invention by a 4 mask process for a 400 volt device.
FIG. 3 is a cross-section of a portion of a novel FRED device made in accordance with the invention by a 5 mask process for a 600 volt device.
 This invention relates to semiconductor devices and processing and more specifically relates to a low cost process for the manufacture of a fast recovery diode and to a novel fast recovery diode structure.
 Fast recovery diodes are well known. The processes used for the manufacture of such devices frequently employ cellular and/or stripe and/or trench technologies in a silicon die with electron irradiation for lifetime killing. Such devises use a high mask count and are relatively expensive.
 It would be desirable to make a fast recovery diode (FRED) with a reduced mask count and lifetime killing but with equal or better characteristics to those of existing FRED devices.
 In accordance with the invention a novel FRED is formed using a single large area junction with platinum lifetime killing. A simplified termination structure is employed using a simple field plate termination at low voltages (200 volts); amorphous silicon on the field plate at intermediate voltage (400 volts); and plural floating guard rings and an equipotential ring in the cutting street in a higher voltage (600 volts) device. Three, four and five masks are used for the 200 volt, 400 volt and 600 volt devices respectively. Excellent characteristics, equivalent to or better than those of existing FREDs with higher mask counts, are obtained.
 This application claims the benefit of U.S. Provisional Application No. 60/280,972, filed Apr. 2, 2001.