US 20040001561 A1 Abstract A method and system for the transmission, reception, and processing of 4-level and 8-level signaling symbols is provided. An inventive modulator is provided for modulating 4-level signaling symbols using an 8-level modulator. Further, this inventive modulator is able to produce 4-level modulation when modulating 4-level signaling symbols using an 8-level modulator, where the 4-level modulation represents the 4-level symbol sequence modulated. Further, a constrained/unconstrained demodulator is provided which is able to demodulate both 4-level signaling symbols and 8-level signaling symbols. The inventive demodulator accomplishes this by limiting the number of new symbol hypotheses and path histories to 4 when working with 4-level signaling symbols, and setting the number of new symbol hypotheses and path histories to 8 when working with 8-level signaling symbols. Additionally, an error correction decoder is provided which is also able to decode a demodulated signal which contains both 4-level and 8-level signaling symbols. The inventive error correction decoder accomplishes this by utilizing an interleaver that only places bits in the 2-bit positions of the 3-PSK soft values that correspond to the 2-bits of QPSK to decode 4-level signalling symbols, and utilizing an interleaver that places bits in all three of the possible bit positions of a symbol to decode 8-level signalling symbols.
Claims(47) 1. A method for modulating 4-level signaling symbols using an 8-level modulator, the method comprising:
receiving 4-level signaling symbols to be modulated, each 4-level signaling symbol containing 2-bits of information; expanding said 4-level signaling symbols into 8-level signaling symbols, each 8-level signaling symbol containing 3-bits of information; and modulating said 8-level signaling symbols. 2. The method of 3. The method of 4. The method of 5. The method of 6. The method of 7. The method of 8. Method for demodulating a received signal containing at least one of 4-level modulation and 8-level modulation, the method comprising:
demodulating said received signal under a first assumption that said received signal contains 4-level modulation and determining a value of a first quality factor by performing error correction decoding on symbols demodulated under said first assumption; demodulating said received signal under a second assumption that said received signal contains 8-level modulation and determining a value of a second quality factor by performing error correction decoding on symbols demodulated under said second assumption; determining a received modulation present in said received signal using said first and said second quality factors; and demodulating said received signal as said received demodulation. 9. The method of 10. The method of 11. Method for demodulating a received signal containing at least one of 4-level modulation and 8-level modulation, the method comprising:
determining whether 4-level modulation or 8-level modulation is present in said received signal; if it is determined that 4-level modulation is present in said received signal, operating a demodulator in a constrained 4-level demodulation mode by restricting possible levels for the received signal to four levels, determining which level out of said four levels is being received, and producing 4-level signaling symbol decisions having 2-bits each; and if it is determined that 8-level modulation is present in said received signal, operating said demodulator in an unconstrained 8-level demodulation mode by determining which level out of eight possible levels is being received, and producing 8-level signaling symbol decisions having 3-bits each. 12. The method of 13. The method of 14. The method of 15. The method of 16. The method of 17. Method for decoding a received signal containing at least one of 4-level signaling symbols and 8-level signaling symbols, the method comprising:
receiving a signal; demodulating said received signal as 8-level modulation; determining whether 4-level signaling symbols or 8-level signaling symbols are present in said received signal; if it is determined that 4-level signaling symbols are present in said received signal, selecting and deinterleaving two bitwise-soft-information values from the 4-level symbols and processing them in an error correction decoder; and if it is determined that 8-level signals are present in said received signal, selecting and deinterleaving three bitwise-soft-information values from the 8-level symbols and processing them in an error correction decoder. 18. The method of 19. The method of 20. The method of 21. The method of 22. The method of 23. Method for decoding a received signal containing at least one of 4-level signaling symbols and 8-level signaling symbols, the method comprising:
receiving a signal; demodulating said received signal as 8-level modulation; performing error correction decoding under a first assumption that a 4-level signaling symbols are present in the received signal and determining a first quality factor; performing error correction decoding under a second assumption that 8-level signaling symbols are present in the received signal and determining a second quality factor; determining a received modulation in said received signal using said first and second quality factors; and decoding said received signal as said received modulation. 24. The method of 25. The method of 26. A system for modulating 4-level signaling symbols using an 8-level signaling symbol modulator comprising:
a processor for processing information into a plurality of 4-level signaling symbols to be modulated; an expander coupled to said processor for expanding said plurality of 4-level signaling symbols each containing 2-bits of information to expanded 8-level signaling symbols each containing 3-bits of information; and an 8-level modulator coupled to said expander for modulating said expanded 8-level signaling symbols. 27. The system of 28. The system of 29. The system of 30. The system of 31. The system of 32. The system of 33. A system for demodulating a received signal containing at least one of 4-level modulation and 8-level modulation, the system comprising:
a receiver for receiving said received signal; a demodulator coupled to said receiver for operating under at least one of a first assumption that said received signal contains 4-level modulation, wherein said demodulator operates as a constrained demodulator by restricting possible levels of said received signal to a set of four levels, determining which level out of said four levels is received, and produces 4-level signaling symbol decisions having 2-bits each, and a second assumption that said received signal contains 8-level modulation, wherein said demodulator operates as an unconstrained demodulator by restricting possible levels of said received signal to a set of eight levels, determining which level out of said eight levels is received, and produces 8-level signaling symbol decisions having 3-bits each. 34. The system of 35. The system of when said demodulator is operating under said first assumption, said first error correction decoder decodes said 4-level signaling symbol decisions, and
when said demodulator is operating under said second assumption, said second error correction decoder decodes said 8-level signaling symbol decisions.
36. The system of said controller uses said first and said second quality factors to determine whether 4-level modulation or 8-level modulation is present in said received signal, and
directs said demodulator to operate as said constrained demodulator if it is determined that 4-level signaling symbols are present in said received signal, and
directs said demodulator to operate as said unconstrained demodulator if it is determined that 8-level signaling symbols are present in said received signal.
37. The system of directs said demodulator to operate as said constrained demodulator if it is determined that 4-level signaling symbols are present in said received signal, and
directs said demodulator to operate as said unconstrained demodulator if it is determined that 8-level signaling symbols are present in said received signal.
38. The system of 39. The system of 40. A system for decoding a signal containing at least one of 4-level modulation and 8-level modulation, the system comprising:
a receiver for receiving a signal; a demodulator coupled to said receiver for demodulating said signal as 8-level modulation; an error correction decoder coupled to said demodulator for performing error correction decoding under at least one of the assumptions that either:
4-level signaling symbols are present in said signal; or
8-level signaling symbols are present in said signal.
41. The system of said controller determines a received modulation from said first and said second quality factors and sends a control signal to said error correction decoder to decode said signal as said received modulation.
42. The system of 43. The system of 44. The system of 45. The system of directs said error correction decoder to operate under the first assumption if it is determined that 4-level signaling symbols are present, or
directs said error correction decoder to operate under the second assumption if it is determined that 8-level signaling symbols are present.
46. The system of 47. The system of Description [0001] This invention relates to the transmission and reception of digital data over radio links, and more particularly, to the transmission and reception of 4-level and 8-level signaling symbols according to prevailing conditions so as to achieve a greater data rate when conditions allow. [0002] In a typical cellular telephone system, speech compression is used in order to accommodate as many mobile users as possible within the spectrum allocated to any particular operator. Speech compression involves a tradeoff between the total number of users that can be served by the system, and the speech quality delivered by the system. Where less speech compression is used, a better speech quality is achieved; however, less users can be served by the system. Where a greater amount of speech compression is used, the total number of users that can be served by a system is increased; however, the speech quality is degraded. Similarly, there is a tradeoff between the quality of a data communication service and the number of users that can be accommodated by the service. The quality of a data service may be measured in terms of the time required to transfer a data file. Thus, using a higher bit rate may succeed in completing data transfer faster, thereby leading to increased quality of data communications; however, other users are then prevented from using the spectrum at the same time. Additionally, the number of users that can be accommodated in the spectrum may be increased; however, the quality of data communications is degraded. Thus, an improved system would be one which is able to use less speech compression or use a higher bit rate to transmit data, without reducing the number of users that can be accommodated by the system. [0003] Further, in a cellular telephone system, a transmitted signal may travel from a transmitter to a receiver over multiple paths, for example, a direct path and one or more reflected paths. In digital cellular phone systems, an equalizer and an error correction decoder are used to process the received signal which may have traveled over multiple paths. In situations where the received signal contains two modulation types, for example, 4-level modulation and 8-level modulation, two equalizers and two error correction decoders are required to process the received signal, where the first equalizer and first error correction decoder are suitable for processing 4-level modulation and the second equalizer and second error correction decoder are suitable for processing 8-level modulation. This increases the hardware cost of a cellular station since multiple equalizers and error correction decoders are required. Furthermore, in a field where products are being manufactured increasingly smaller for convenience, the user of multiple equalizers and error correction decoders require greater printed circuit board (PCB) real estate, resulting in a physically larger product than cellular stations using only one equalizer and error correction decoder. [0004] The present invention is directed to overcoming one or more of the problems discussed above in a novel and simple manner. [0005] In accordance with the invention, there is disclosed a method and system for the transmission of both 4-level and 8-level signalling symbols using an 8-level modulator. There is further disclosed a method and system for demodulating and error correction decoding a signal containing both 4-level and 8-level modulation. [0006] It is an object of the present invention to provide a method for modulating 4-level signaling symbols using an 8-level modulator, where the method comprises receiving 4-level signaling symbols to be modulated, where each 4-level signaling symbol contains 2-bits of information. The method further includes expanding the 4-level signaling symbols into eight-level signaling symbols, where each 8-level signaling symbol contains 3-bits of information. The method further includes modulating the 8-level signaling symbols. [0007] In a preferred embodiment, the step of expanding the 4-level signaling symbols into 8-level signaling symbols includes manufacturing a third bit for each 4-level signaling symbol and appending the third bit to the 2-bits of information. In this preferred embodiment, the third bit is the exclusive-OR of the 2-bits. In another preferred embodiment, the method includes performing a progressive 45° phase shift between a modulation of consecutive symbols. In a further preferred embodiment, modulating and expanding 4-levels signaling symbols with the 8-level modulator causes the 8-level modulator to produce 4-level modulation. In a yet further embodiment of the invention, the 4-level signaling symbols are a subset of the 8-level signaling symbols. In another preferred embodiment of the invention, the method includes the step of sending an indication signal indicating which of expanded 4-level signaling symbols and 8-level signaling symbols are being transmitted. [0008] It is another object of the present invention to provide a method for demodulation of a received signal containing at least one of 4-level modulation and 8-level modulation where the method includes demodulating the received signal under a first assumption that the received signal contains 4-level modulation and determining a value of a first quality factor by performing error correction decoding on symbols modulated under the first assumption. The method further includes demodulating the received signal under a second assumption that the received signal contains 8-level modulation and determining a value of a second quality factor by performing error correction decoding on symbols modulated under the second assumption. Additionally, the method determines a received modulation present in the received signal using the first and the second quality factors, and demodulates the received signal as the received modulation. [0009] In a preferred embodiment, the step of determining from the first and second quality factors may be performed before the demodulation under the first and the second assumptions is completed. In a further preferred embodiment, the first and second quality factors are determined using metrics generated by an error correction decoder. [0010] It is another object of the invention to provide a method for demodulating a received signal containing at least one of 4-level modulation and 8-level modulation, where the method determines whether 4-level modulation or 8-level modulation is present in the received signal. The method continues by operating a demodulator in a constrained 4-level demodulation mode by restricting possible levels for the received signal to four levels, determining which level out of the four levels is being received, and producing 4-level signaling symbol decisions having 2-bits each if it is determined that 4-level modulation is present. If however, it is determined that 8-level modulation is present in the received signal, the method continues by operating the demodulator in an unconstrained 8-level demodulation mode by determining which level out of 8 possible levels is being received, and producing 8-level signaling symbol decisions having 3-bits each. [0011] In a preferred embodiment, the step of determining whether 4-level modulation or 8-level modulation is present includes the step of receiving an indication signal indicating whether 4-level modulation or 8-level modulation is present in the received signal. In a further preferred embodiment, the indication signal is transmitted using at least one of a SYNCWORD, a CDVCC, and a FACCH message. In a further preferred embodiment, the step of determining whether 4-level modulation or 8-level modulation is present includes the step of using a predetermined transmission format to determine whether a 4-level signaling symbol or an 8-level signaling symbol is present in the received signal. [0012] It is another object of the invention to provide a method for decoding a received signal containing at least one of 4-level signaling symbols and 8-level signaling symbols, the method comprises receiving a signal, demodulating the received signal as 8-level modulation, and determining whether 4-level signaling symbols or 8-level signaling symbols are present in the received signal. If it is determined that 4-level signaling symbols are present in the received signal, the method operates an error correction decoder in a constrained 4-level decoding mode and produces 4-level signaling symbol decisions having 2-bits each. If it is determined that 8-level signaling symbols are present in the received signal, the method operates the error correction decoder in an unconstrained 8-level mode and produces 8-level signaling symbol decisions having 3-bits each. [0013] In a preferred embodiment, the step of determining whether 4-level signaling symbols or 8-level signaling symbols are present further includes the step of receiving an indication signal indicating whether 4-level signaling symbols or 8-level signaling symbols are present in the received signal. In a further preferred embodiment, the step of determining whether 4-level signaling symbols or 8-level signaling symbols are present further includes the step of using a predetermined transmission format to determine whether 4-level signaling symbols or 8-level signaling symbols are present in the received signal. In another preferred embodiment, the step of decoding the received signal in the unconstrained 8-level mode includes removing a third bit from the 3-bits of the 8-level signaling symbol decision. [0014] It is another object of the invention to provide a method for decoding a received signal containing at least one of 4-level signaling symbols and 8-level signaling symbols, where the method comprises receiving a signal, demodulating the received signal as 8-level modulation, and performing error correction decoding under a first assumption that 4-level signaling symbols are present in the received signal and determining a first quality factor. The method continues by performing error correction decoding under a second assumption that 8-level signaling symbols are present in the received signal and determining a second quality factor. The method then performs the step of determining a received modulation in the received signal using the first and the second quality factors, and decodes the received signal as the received modulation. [0015] In a preferred embodiment, the step of determining from the first and second quality factors may be performed before the decoding under the first and the second assumptions is completed [0016] It is another object of the invention to provide a system for modulating 4-level signaling symbols using an 8-level signaling symbol modulator, where the system comprises a processor for processing information into a plurality of 4-level signaling symbols to be modulated. The system also includes an expander coupled to the processor for expanding the plurality of 4-level signaling symbols each containing 2 bits of information to expanded 8-level signaling symbols each containing 3-bits of information. The system further includes an 8-level modulator coupled to the expander for modulating the expanded 8-level signaling symbols. [0017] In a preferred embodiment, the system applies a progressive 45° phase shift between the modulation of consecutive symbols. In a further preferred embodiment of the system, the 4-level signaling symbols are a subset of the expanded 8-level signaling symbols. In another preferred embodiment of the invention, the 8-level modulator produces 4-level modulation when modulating the expanded 8-level signaling symbols. [0018] It is yet another object of the invention to provide a system for demodulating a received signal containing at least one of 4-level modulation and 8-level modulation, where the system comprises a receiver for receiving the received signal, and a demodulator coupled to the receiver. The demodulator operates under at least one of a first assumption that the received signal contains 4-level modulation, and a second assumption that the received signal contains 8-level modulation. If the demodulator is operating under the first assumption that the signal contains 4-level modulation, the demodulator operates as a constrained demodulator by restricting the possible levels of the received signal to a set of four levels, determining which level out of the four levels is received, and producing 4-level signaling symbol decisions having 2-bits each. If the demodulator is operating under the second assumption that the received signal contains 8-level modulation, the demodulator operates as an unconstrained demodulator by restricting possible levels of the received signal to a set of eight levels, determining which level out of the eight levels is received, and produces 8-level signaling symbol decisions having 3-bits each. [0019] In a preferred embodiment, the system may further include a first error correction decoder coupled to the demodulator and a second error correction decoder coupled to the demodulator, where the first error correction decoder decodes the 4-level signaling symbol decisions when the demodulator is operating under the first assumption, and the second error correction decoder decodes the 8-level signaling symbol decisions when the demodulator is operating under the second assumption. In a further preferred embodiment, a controller is coupled to the first and the second error correction decoders and to the demodulator where the first error correction decoder determines a first quality factor, the second error correction decoder determines a second quality factor, and the controller uses the first and the second quality factors to determine whether 4-level modulation or 8-level modulation is present in the received signal. If the controller determines that 4-level modulation is present, the controller directs the demodulator to operate as the constrained demodulator, and if the controller determines that 8-level modulation is present, the controller directs the demodulator to operate as the unconstrained demodulator. In yet another further preferred embodiment, a controller is coupled to the demodulator where the controller determines whether 4-level modulation or 8-level modulation is present in the received signal by using at least one of an indication signal within the received signal and a predetermined transmission format. [0020] It is another object of the invention to provide a system for decoding a signal containing at least one of 4-level modulation and 8-level modulation, where the system comprises a receiver for receiving a signal, and a demodulator coupled to the receiver for demodulating the signal as 8-level modulation. The system also includes an error correction decoder coupled to the demodulator for operating as at least one of a constrained 4-level mode for performing error correction under a first assumption that 4-level signaling symbols are present in the signal, and an unconstrained 8-level mode for performing error correction decoding under a second assumption that 8-level signaling symbols are present in the signal. [0021] In a preferred embodiment, the system comprises a controller coupled to the error correction decoder wherein the error correction decoder determines a first quality factor when operating under the first assumption, and a second quality factor when operating under the second assumption, and the controller determines a received modulation from the first and the second quality factors. The controller then sends a control signal to the error correction decoder to decode the signal as the received modulation. In another preferred embodiment of the invention, the error correction decoder removes a third bit from the 3-bits created by the demodulator when performing error correction decoding under the second assumption. In a further preferred embodiment, the system includes a controller coupled to the error correction decoder wherein the controller determines whether 4-level or 8-level signaling symbols are present in the demodulated signal, and the controller directs the error correction decoder to operate in the constrained mode if it is determined that 4-level signaling symbols are present, and directs the error correction decoder to operate in the unconstrained mode if it is determined that 8-level signaling symbols are present. In a further preferred embodiment, the controller uses at least one of an indication signal within the received signal and a predetermined transmission format to determine whether 4-level or 8-level signaling symbols are present. [0022]FIG. 1 is a functional block diagram showing a prior art two-way radio; [0023]FIG. 2 is a functional block diagram illustrating digital signal processing functions; [0024]FIG. 3 is a generalized block diagram of a transmitter in communication with a receiver in accordance with the invention; [0025]FIG. 4 [0026]FIG. 4 [0027]FIG. 5 is a drawing illustrating the allowable symbol transitions for Π/4-DQPSK and 8-PSK constellation charts; [0028]FIG. 6 is a flow chart illustrating the transmission of a 4-level signaling symbol using an 8-level modulator in accordance with an embodiment of the invention; [0029]FIG. 7 [0030]FIG. 7 [0031]FIG. 8 is a functional block diagram showing signal processing in accordance with the invention; [0032]FIG. 9 is a functional block diagram illustrating the sequential MLSE processor in accordance with the invention; [0033]FIG. 10 is a diagram showing an MLSE processor switching from an unconstrained mode to a constrained mode in accordance with the invention; [0034]FIG. 11 is a diagram showing an MLSE processor switching from a constrained mode to an unconstrained mode in accordance with the invention; [0035]FIG. 12 is a functional block diagram illustrating a cellular station with an unconstrained/constrained demodulator in accordance with an embodiment of the invention; [0036]FIG. 13 is a flow chart illustrating the demodulation of a received signal containing at least one of 4-level modulation and 8-level modulation in accordance with an embodiment of the invention; [0037]FIG. 14 is a flow chart illustrating the demodulating of a received signal containing at least one of 4-level modulation and 8-level modulation in accordance with an embodiment of the invention; [0038]FIG. 15 is a diagram showing an error correction decoder for decoding 4-level and 8-level signal symbols in accordance with the invention; [0039]FIG. 16 is a functional block diagram illustrating a cellular station with an unconstrained/constrained error correction decoder in accordance with an embodiment of the invention; [0040]FIG. 17 is a flow chart illustrating the decoding of a received signal containing at least one of 4-level signaling symbols and 8-level signaling symbols in accordance with an embodiment of the invention. [0041]FIG. 18 is a functional block diagram illustrating a 4-level/8-level error correction decoder in accordance with an embodiment of the invention; and [0042]FIG. 19 is a flow chart illustrating the decoding of a received signal containing at least one of 4-level signaling symbols and 8-level signaling symbols in accordance with an embodiment of the invention. [0043] When a cellular system is able to utilize 8-level modulation for the transmission of data over a communications channel, a greater amount of information is passed between the cellular stations than for systems utilizing 4-level modulation, thereby allowing increased voice quality and data transfer. However, the transmission of 8-level modulation requires the prevailing conditions to be such that the receiving station is able to distinguish between the 45° phase shifts in the modulated carrier. Further, even when prevailing conditions allow the use of 8-level modulation, it is desirable to use 4-level modulation for certain fields of the modulated signal, such as the SYNCWORD, to allow cellular stations in neighboring time slots having only 4-level demodulation capability to utilize the transmitted information. [0044] The invention disclosed describes a system and method for modulating both 4-level and 8-level signaling symbols using an 8-level modulator. Thus, increased voice quality or data transfer rate may be utilized in situations where prevailing conditions allow. The invention further describes a demodulator which is able to demodulate both 4-level and 8-level modulation. Additionally, an error correction decoder is provided according to the invention for performing error correction decoding on both 4-level and 8-level signaling symbols. The demodulator and error decoder allow for the demodulation and decoding of signals from a single transmitter which is able to transmit using both 4-level and 8-level modulation. Further, the demodulator and error correction encoder allow demodulation and decoding of transmissions from multiple transmitters, where some transmitters have 4-level modulation capabilities, and others have 8-level modulation capabilities. [0045]FIG. 1 illustrates a two-way radio block diagram as known in the art. An antenna [0046] The transmitter section of FIG. 1 includes a source of information to transmit, such as a microphone [0047] A modulator [0048]FIG. 2 is a functional block diagram illustrating the prior art digital signal processing functions. The digitized samples from the log polar A/D converter [0049] If, on the other hand, the message is neither speech nor signalling, but rather a digital data message intended for some digital data terminal service, such as a personal computer, or alternatively, intended for display on the cellular telephones display, it is routed instead to the user data terminal [0050] A dual mode radio communications device for receiving alternatively analog frequency modulated signals or Π/4-DQPSK digitally modulated signals and transmitting the same is described in U.S. Pat. No. 5,745,523 and is hereby incorporated by reference herein. U.S. Pat. No. 5,048,059 “Log-Polar Signal Processing” describes converting signals received on a radio carrier frequency to an stream of representative numerical samples for digital processing while retaining their complex vector nature and is hereby incorporated by reference herein. Digitizing phase related signals is described in U.S. Pat. No. 5,084,669 “Direct Phase Digitation” and U.S. Pat. No. 5,148,373 “Method and Arrangement for Accurate Digital Determination of the Time or Phase Position of a Signal Pulse Train” which are hereby incorporated by reference herein. [0051] When a logarithmic amplifier generates a logarithmic signal strength indication from multiple amplifier detector stages with interstage filters, relative contributions from different stages are preferably combined using delay compensation as described in U.S. Pat. No. 5,070,303 “Logarithmic amplifier/detector delay compensation” and is hereby incorporated by reference herein. Alternatively, a received radio signal may be down converted and digitized using a HOMODYNE receiver, such as described in U.S. Pat. No. 5,241,702 “D.C. offset compensation in a radio receiver” which is hereby incorporated herein by reference. Improvements to Homodyne Receivers as described in U.S. Pat. No. 5,568,520 “Slope Drift and Offset Compensation in Zero-IF Receivers” is hereby incorporated by reference herein. Further, improvements to HOMODYNE receivers as described in U.S. Pat. No. 5,749,051 “I.P. 2 Compensation in HOMODYNE Receivers” may be useful in implementing the current invention and is hereby incorporated by reference herein. Additionally, demodulators for demodulating Π/4-DQPSK signals and compensating for ISI end fading are described in U.S. Pat. No. 5,331,666 “Adaptive Maximum Likelihood Demodulator” and U.S. Pat. No. 5,335,250 “Method and Apparatus by Directional Demodulation of Digitally Modulated Signals” describes maximum likelihood demodulation of recorded signal samples in both a time reversed order and a non-time reversed order and selection of each demodulated symbol from the direction of demodulation giving the better result for that symbol. The '666 and '250 patents are hereby incorporated by reference herein. Such demodulators can make use of estimates of the effects of the propagation path on signal phase and amplitude through the use of “channel models” which are updated during the progress of demodulation on the assumption that demodulated symbols are correct. [0052] When several as yet unresolved hypotheses of a demodulated symbol string are simultaneously held in memory for future resolution after receiving more signals, corresponding, multiple unresolved hypotheses for the channel model must be also held, as described in U.S. Pat. No. 5,164,961 “Method and Apparatus for Adapting a Viterbi Algorithm to a Channel Having Varying Transmission Properties” and is hereby incorporated herein by refernce. Any equalizing demodulator that simultaneously estimates unknown symbols and the unknown channel that they were transmitted through is known as a “blind equalizer” and such an algorithm is described in U.S. Pat. No. 5,557,645 “Channel Independent Equalizer Device” which is hereby incorporated by reference herein. Such algorithms are called “channel model per state” algorithms and a channel model can sometimes be simplified to or can additionally comprise an estimate of frequency error and a gain setting constant as described in U.S. Pat. No. 5,136,616 “Method of Rapidly Controlling the Frequency of a Coherent Radio Receiver and Apparatus for Carrying out the Method”, and U.S. Pat. No. 5,568,518 “Fast Automatic Gain Control” both of which are hereby incorporated by reference herein. Alternatively, to reduce processing complexity, a single estimate of frequency error can be computed from the demodulated symbol hypothesis having the highest likelihood indication of being correct, as described in U.S. Pat. No. 5,093,848 “Method of Controlling the Frequency of a Coherent Radio Receiver and Apparatus for Carrying out the Method” which is hereby incorporated by reference herein. Another low complexity equalizer demodulator is described in U.S. Pat. No. 5,467,374 “Low Complexity Adaptive Equalizer for U.S. digital cellular Radio Receivers” which is incorporated by reference herein. [0053] Reception quality in the current invention can be improved by using diversity receivers, as described in U.S. Pat. No. 5,361,404 “Diversity Receiving System” and U.S. patent application Ser. No. 08/218,236, both of which are incorporated herein by reference. The application Ser. No. 08/218,236 also describes using one of a plurality of demodulation algorithms selected from a repetoire of available algorithms according to quantisized sync quality indicators. U.S. patent application Ser. No. 08/305,727 is also hereby incorporated by reference and describes combining the algorithms for demodulation and decoding of a coded radio signal into a single algorithm by appropriate choice of interleaving pattern. The invention described herein comprises further adaptations to the improved Π/4-DQPSK modulator described in the above-incorporated '722 patent. [0054]FIG. 3 is a drawing illustrating the process of transmitting and receiving signals in accordance with the invention. FIG. 3 shows a transmitter [0055] As shown in FIG. 3, a sequence of data symbols [0056] Transmitted signal [0057]FIG. 4 [0058] In Π/4-QPSK, the relative angular relationship of the four possible 2 bit patterns are preferably allocated using Grey coding, in which patterns that differ by only 1 bit are angularly adjacent, while bit patterns that differ by 2 bits are diametrically opposite. This ensures that the most likely form of error, in which one constellation point is mistaken for an adjacent one, only causes a single bit error, while 2 bit errors are caused only in the less likely event of a constellation point being mistaken for a diametrically opposite one. Therefore, it may be seen that Π/4-QPSK modulation comprises transmitting a signal representing one of the 4 possible angular positions 0°, 90°, 180°, and 270° for even symbols, or 45°, 135°, 225°, or 315° for odd symbols. This corresponds to transmitting one of the four complex vectors: (1+0j); 0+j); (−1+0j), or (0−j) for even bits, or (0.707+j0.707); (−0.707+j0.707); (−0.707−j0.707), or (−0.707−j0.707) for odd bits, where the real and imaginary values are equal to the cosine and the sine of the angle respectively. [0059] In Π/4-DQPSK, the phase change from one symbol to the next, of +/−45° or +/−135° is used to encode the 2 information bits, and phase changes differing by 180° are used to represent bit patterns differing in both bits, while phase changes differing by only 90° are used to represent bit patterns differing in only one bit. [0060] In practice for either Π/4-QPSK or Π/4-DQPSK, the transmit part of the digital signal processor forms sequences of one of the first four complex values alternating with one of the second four complex values and then digitally filters the sequences while up-sampling it to a higher sampling rate, thereby generating multiple samples per 2-bit symbol that are more accurately representative of a desired continuous waveform. It is necessary to transmit a continuous waveform in order to contain the transmission spectrum within an allocated radio channel. The filtering specified for D-AMPS is called “Root Raised Cosine” (RRC) filtering. The RRC filtered and up-converted complex samples (I,Q) are then D/A converted and output to the quadrature modulator and up-converter as described in the above incorporated U.S. Pat. No. 5,530,722 patent. It may be seen that Π/4-DQPSK modulation comprises the transmission of only one of four out of the possible eight phase angles 0°, 45°, 90°, 135°, 180°, 225°, 270° and 315° at each symbol instant, and generation of only one of four out of the possible eight corresponding complex vectors. On the other hand, 8-phase modulation does not restrict transmission to a subset of four phases at each symbol instant, but allows any of the eight to be transmitted, thereby conveying 3 rather than 2-bits of information per symbol. [0061] This can be further seen in FIG. 5, which shows the allowable transitions from one constellation point to the next for Π/4-DQPSK and 8-PSK symbols. [0062]FIG. 5 illustrates the allowable transitions from one constellation point to the next for Π/4-DQPSK and 8-PSK. In Π/4-DQPSK, of a previous constellation point was at one of the angular positions 45, 135, 225 or 315°, then the next constellation point transmitted must be at 0, 90, 180 or 270° and vice versa. This is shown in box [0063]FIG. 4 [0064] Any allocation of 8-PSK symbols to constellation points may be used, including variation or not between successive symbols, and as long as it is systematic it is possible to determine which 3-bit symbols will represent the four Π/4-DQPSK symbols at any symbol position in the symbol sequence. [0065] It can be seen that the 2-bits representing each QPSK symbol of constellation chart [0066] This inventive allocation of 8-PSK symbols on an 8-PSK constellation chart allows QPSK signaling symbols to be modulated using an 8-PSK modulator. Further, the inventive allocation allows QPSK modulation to be produced by the 8-PSK modulator. This is shown in conjunction with FIG. 6. [0067]FIG. 6 shows a flow chart illustrating how QPSK symbols may be transmitted using an 8-PSK modulator in accordance with the invention. In step [0068] In the same manner, differential QPSK (DQPSK) signaling symbols may be expanded and modulated by an 8-DPSK modulator utilizing the inventive allocation of symbols shown on constellation chart [0069] Thus, when Π/4-DQPSK is used, it is a simple matter to construct the sequence of equivalent Π/4-QPSK symbols, by starting with an arbitrary constellation point, such as angular position 0, and then applying one of the four rotations +/−45° or +/−135° to obtain the next constellation point according to the 2-bits of data. This process continues cumulatively, applying a rotation to the vector used for the previous symbol to obtain the next symbol vector. Likewise, there is a differential form and an absolute form of 8-PSK. The absolute or coherent form of multi-phase modulations was previously known from its use in the 2-phase case in the European cellular system known as GSM, and has later been extended to the multi-phase case in U.S. patent application Ser. No. 08/599,011 entitled “Coherent CPFSK” (Ramesh) filed Feb. 9, 1996 which is hereby incorporated by reference. [0070] When differential 8-PSK is used, a bit triple is represented by one of the eight rotations 0°, 45°, 90°, 135°, 180°, 225°, 270° or 315° being applied cumulatively to the vector transmitted for the previous symbol to obtain the vector for the next symbol. However, every vector transmitted lies at one of the same 8-phase positions and there is no restriction to a first subset of four for even bits or a second subset of four for odd bits, as with Π/4-DQPSK as shown in FIG. 5. [0071] In practice, both Π/4-DQPSK and differential 8-PSK are received, equalized and demodulated first as if they were the coherent or absolute phase versions Π/4-QPSK or coherent 8-PSK, respectively, and then a differential decoding is used to determine the rotation that has occurred between one coherently decoded symbol and-the next. Therefore, it will not be necessary to specify whether differential or coherent modulation is used, as the receiver processing is similar in both cases. The main difference is in how soft information is generated for a differential as opposed to coherent modulation, which is discussed infra. [0072]FIG. 7 [0073]FIG. 7 [0074] Having a system which is able to modulate both QPSK and 8-PSK signaling symbols using only an 8-PSK modulator is advantageous as only one modulator need be present for the modulation of both QPSK and 8-PSK signaling symbols, thereby reducing PCB real estate and reducing production costs as redundant modulators are not necessary. Furthermore, an 8-PSK modulator which is able to produce QPSK modulation is very useful in situations where some cellular stations, for example cellular telephones or cellular base stations, possess QPSK signal processing capability only, and other stations possess 8-PSK signal processing capability. This 8-PSK modulator which is able to produce QPSK modulation has a distinct advantage of being able to communicate to both. [0075] Additionally, in situations where prevailing conditions allow the transmission of 8-PSK signaling symbols, a cellular station is able to transmit more information in any field of a time slot without preventing other users from using the spectrum at the same time. In this way, the cellular station is able to use less speech compression, thereby providing increased speech quality, without reducing the total number of users that can be served by the system. Similarly, the cellular system is able to increase the quality of data communications without reducing the number of users that can be accommodated by the system. [0076] In another aspect of the invention, an inventive adaptive equalizer is provided for demodulating both 4-level signaling symbols and 8-level signaling symbols. Because some transmitters possess 4-level modulation capability and others possess 8-level modulation capabilities, the inventive adaptive equalizer allows communication with both. Additionally, where a single transmitter possesses capabilities for transmitting using both 4-level and 8-level modulation, the inventive adaptive equalizer allows communication for both modulation types, thereby allowing a greater amount of information to be transmitted when prevailing conditions allow. [0077] An adaptive equalizer utilizing the maximum likelihood sequence estimation (MLSE) process may require one last symbol and one current symbol to determine a last symbol transmitted. This assumes the maximum overlap (intersymbol interference) of symbols in the received signals caused by reflected signal paths will be less than or equal one symbol. The adaptive equalizer works by running each last symbol possibility and a corresponding channel model parameter one at a time through a channel model with a new symbol hypothesis. The output of the channel model represents what a received signal sample should look like if the specific last symbol possibility with channel conditions represented by corresponding channel model parameters and the current new symbol hypothesis were transmitted. This channel model output is compared with the actual received signal sample, where a delta metric is computed. The delta metric is the magnitude squared of the difference between the received signal sample and the predicted signal sample. The smaller the delta metric, the more likely it is that the specific last symbol possibility and the current new symbol hypothesis were the transmitted symbols. The delta metric is then added to a cumulative metric for that last symbol possibility, and the new metric is stored into a temporary metric area in a location corresponding to the last symbol possibility. Thus, after each last symbol possibility has been run through the channel model with a single new symbol hypothesis, the temporary metric area holds newly computed temporary metrics for each last symbol possibility for the new symbol hypothesis. The lowest temporary metric is then chosen. The last symbol possibility corresponding to the lowest temporary metric is shifted into the rightmost position of its corresponding path history. The new path history and temporary metric then replace the cumulative metric and path history for the last symbol possibility having the new symbol hypothesis. [0078]FIG. 8 is a functional block diagram showing signal processing in accordance with the invention. Specifically, FIG. 8 shows the modifications needed to the signalling processing in a cellular terminal in order to benefit from adaptive transmission bit rates according to the invention. Constrained/unconstrained equalizer [0079] The signalling decoder [0080] The MLSE processor of constrained/unconstrained equilizer [0081] In some situations, it is necessary for the adaptive equalizer according to the invention to switch operation modes from an unconstrained 8-level demodulation mode to a constrained 4-level demodulation mode. These situations include transmitters switching from 8-level modulation to 4-level modulation due to degradation of prevailing conditions thereby preventing the receiver from distinguishing among the smaller phase shifts utilized by 8-PSK modulation, or a switch in communications from a station having a transmitter with 8-level modulation capabilities to a station with a transmitter having only 4-level modulation capabilities. Such a situation may also arise where, although prevailing conditions allow for the transmission of 8-level modulation, it is desirable for certain fields of the transmission for the present time slot, such as the SYNCWORD, to be transmitted using 4-level modulation. (This may arise where a cellular station in a neighboring time slot has only 4-level demodulation capabilities, but needs to access the SYNCWORD of the present time slot.) [0082]FIG. 9 is a functional block diagram illustrating the sequential MLSE processor in accordance with the invention. FIG. 9 shows a controller [0083]FIG. 10 is a functional block diagram showing an adaptive equalizer utilizing an MLSE processor switching operation modes from an unconstrained mode to a constrained mode in accordance with the invention. FIG. 10 shows an MLSE processor [0084] Temporary metric area [0085] New memory table [0086] The MLSE processor [0087] Just prior to switching operation modes from an unconstrained to a constrained mode, the adaptive equalizer according to the invention operates in an unconstrained mode as an 8-PSK adaptive equalizer as known in the art. To switch to a constrained mode in accordance with the invention, the new symbol hypotheses possibilities entering the channel model [0088] A last symbol possibility [0089]FIG. 11 is a functional diagram showing an MLSE processor switching from a constrained mode to an unconstrained mode in accordance with the invention. Components of FIG. 11 which correspond with components identified in FIG. 10 have the same identification and a detailed description will not be repeated. The necessity for switching from a constrained mode to an unconstrained mode arises in situations where the prevailing conditions improve, thereby allowing the receiver to distinguish among the smaller phase shifts utilized by 8-PSK modulation, or a switch in communications from a station having a transmitter with 4-level modulation capabilities to a station with a transmitter having 8-level modulation capabilities. Before switching from a constrained mode to an unconstrained mode, the inventive adaptive equalizer will be operating in a constrained mode suitable for adaptively equalizing QPSK signaling symbols as currently known in the art. [0090] To switch from a constrained mode to an unconstrained mode in accordance with the invention, the new symbol hypothesis possibilities entering the channel model [0091] A last symbol possibility 0 of last symbol possibility area [0092] Controller [0093]FIG. 12 is a functional block diagram illustrating a receiver utilizing the inventive MLSE process described in relation to FIGS. 10 and 11. FIG. 12 shows a receiver [0094]FIG. 13 is a flow chart showing the steps carried out by a cellular station of a cellular telephone system to demodulate a received signal containing at least one of QPSK and 8-PSK modulation. FIG. 13 begins in step [0095] Step [0096] The adaptive equalizer may receive an indication signal indicating which mode it should operate in. This indication signal may be encoded within a SYNCWORD, a Coded Digital Voice Color Code (CDVCC), or a Fast Associated Control Channel Message (FACCH). Currently, there are six available SYNCWORDs in use. To encode the indication signal into the SYNCWORD, a cellular telephone system could use 12 SYNCWORDs where the original 6 SYNCWORDs could indicate when QPSK signaling symbols are to be demodulated, and the new 6 SYNCWORDs could be used to indicate the presence of 8-PSK signaling symbols to be demodulated. Alternatively, the order of the 6 original SYNCWORDs used could indicate whether the demodulator should operate in a constrained mode or an unconstrained mode. [0097] As the CDVCC is specific to the base station, this could also be used as an indication signal indicating whether the inventive adaptive equalizer should operate in a constrained or an unconstrained mode. For example, the CDVCC could be inverted when the adaptive equalizer is to switch from a constrained mode to an unconstrained mode. Alternatively, a flag bit could be used in the CDVCC to indicate that the adaptive equalizer should switch between the unconstrained and constrained modes. [0098] Additionally, the FACCH message could be used to indicate which of constrained or unconstrained modes the inventive adaptive equalizer should operate in. [0099] Furthermore, an indication signal in the form of a control signal could be sent at call setup indicating whether the inventive adaptive equalizer should operate in a constrained or an unconstrained mode. In this circumstance, a received signal strength indication (RSSI) could be used to indicate which of constrained or unconstrained mode is to be used. For example, if the RSSI is above or equal to a threshold, the unconstrained mode would be used as the signal is strong enough to differentiate between the smaller phase shift utilized by the unconstrained mode. However, where the RSSI is below the threshold, the constrained mode would be used as a larger phase shift would be required to adequately transmit the information. [0100] Further, a cellular station's capabilities could be used to indicate whether to use the constrained or unconstrained modes. For example, where the other station possesses only 4-level transmission capabilities, the control signal at call set up would set the demodulator to the constrained mode. However, where 8-level transmission capabilities exist, the demodulator would be set to the unconstrained mode. [0101] Additionally, a predetermined transmission format could be used to indicate to the inventive adaptive equalizer whether to operate in a constrained or an unconstrained mode. This predetermined transmission format could include specified fields in a time slot being transmitted using 8-PSK modulation, and other fields in a time slot using QPSK modulation. For example, a format could be set up where only the user traffic field would be transmitted using 8-PSK modulation. All other fields would use QPSK modulation. In this case, the inventive adaptive equalizer would know to operate in an unconstrained mode when demodulating the user traffic field, and a constrained mode for all other fields, such as the SYNCWORD, the CDVCC and the slow access control channel (SACCH). Further, within the user traffic field the predetermined format could be used where a FACCH message could be transmitted using QPSK modulation and the voice data could be transmitted using 8-PSK. [0102] If it is determined that QPSK modulation is present in step [0103] If it is determined that 8-PSK modulation is present in the signal in step [0104] A controller [0105] If an indication signal, a control signal or a predetermined transmission format is not used, the controller [0106]FIG. 14 is a flow chart showing the steps carried out by a cellular station to demodulate a received signal containing at least one of QPSK and 8-PSK modulation in accordance with another embodiment of the invention. FIG. 14 begins in step [0107] The method then continues on to step [0108] At step [0109] In another aspect of the invention, an error correction decoder is provided for decoding both 4-level signaling symbols and 8-level signaling symbols. Some transmitters possess 4-level modulation capability and others possess 8-level modulation capabilities. Additionally, some transmitters possess capabilities for transmitting using both 4-level and 8-level modulation. Where a receiver does not possess an adaptive equalizer suited to demodulate both 4-level and 8-level modulation, a demodulator suited for demodulating 8-level modulation may be provided with the inventive error correction decoder herein described. Such a combination allows the receiver the same advantages as a receiver utilizing the inventive unconstrained/unconstrained demodulator, set out above in relation to FIG. 10. [0110] A cellular station provides forward error correction where the sequence of data symbols is error encoded and interleaved before modulation and transmission to help protect against transmission errors. To accomplish this, an error correction encoder may contain a shift register which holds a limited number of symbols n. The error encoder then shifts a specific symbol sequence into the shift register n. This specific sequence of signals is processed in a combinatorial logic network to generate a BOOLEAN combination of the bits known as a parity bit. In the case of rate ½ code, the specific sequence of symbols would then be processed in a second combinatorial logic network to generate a second parity bit. These parity bits are then interleaved, grouped to form modulation symbols, modulated and transmitted. [0111] After symbols are received and demodulated, the individual bits of the symbols are deinterleaved (unpacked) and processed by the error correction decoder, using the redundancy provided by the parity bits to correct transmission errors in the received signal. [0112] The demodulator preferably demodulates symbols and uses the MLSE metrics to determine bitwise soft information for each of the 3-bits of each 8-PSK symbol. Due to the specific assignment of 2 or 3-bit groups to 4 or 8 signalling levels as taught herein, when QPSK symbols are demodulated by an 8-PSK demodulator, 2 out of 3 of the demodulated bits will correspond to the 2-bits that would be demodulated by a QPSK demodulator receiving the same signal, and will be represented by soft information related to the log-likelihood of each bit having the given polarity. [0113] When the error correction coded bit stream is modulated into 2-bit (e.g., 4-level) symbols, a first grouping of bit pairs will be used according to a first determined interleaving pattern. For example, the first and 65th encoded bit may be combined to form transmitted symbol No. 15 in a block of transmitted symbols, such as a TDMA burst. This is just an example, and the interleaving table can specify any pairs of bits be combined to form each transmitted symbol, as long as the same interleaving table is used at both the transmitter and the receiver. [0114] When, on the other hand, the error correction coded bitstream is modulated into 3-bit (i.e., 8-level) symbols, a second interleaving table is used to define a second grouping of bits into triples in order to define each symbol. For example, bits [0115] A receiver for data that has been error correction coded and transmitted using either 4-level modulation and a first interleaving table or 8-level modulation and a second interleaving table employs a copy of both coding and interleaving processes. A first error correction decoder using MSLE to hypothesize information bit sequences, uses a copy of the first coding and interleaving process to determine the coded bit values that would have been sent and into which bits of which modulated symbols they would have been placed. The soft information for those bits of those symbols is then extracted from the demodulated values and used to form metrics for the first error correction decoder, in order to determine the most likely transmitted information sequence under the assumption that 4-level modulation was used. [0116] Also, a second error correction decoder using MSLE to hypothesize information bit sequences employs a copy of the second coding and interleaving process to determine coded bit values and to determine into which of the 3-bits of 8-level modulation symbols they would have been placed. The soft information for those demodulated bits is then used to form metrics for the second error correction decoder, in order to determine the most likely transmitted information sequence under the assumption that 8-level modulation was used. [0117] Inevitably, the decoder that makes the wrong assumption about the modulation and the interleaving will be less able to correctly predict the received symbols and bits and will acquire higher metric values during decoding. Consequently, the decoder that achieves lower metric values is more likely to be making the correct modulation assumption. As described in the incorporated '003 patent, it can be necessary to scale the metrics of the two decoders before comparison in order to obtain the most reliable decision. The scaling may be determined by computer-simulating the system off-line to determine the distribution of metrics for the four cases of decoding as QPSK when QPSK was transmitted, decoding as QPSK when 8-PSK was transmitted, decoding as 8-PSK when QPSK was transmitted, and decoding as 8-PSK when 8-PSK was transmitted. [0118] The metric distributions for QPSK and 8-PSK decoding may be combined into a first two-dimensional distribution for QPSK transmitted and a second two-dimensional distribution for 8-PSK transmitted. Then a line that best separates the two distributions may be drawn to split the two-dimensional plane into two regions, one corresponding to deciding that QPSK was transmitted and the other region corresponding to deciding 8-PSK was transmitted. Then when a pair of metric values from the first and second error correction decoder are available, the region in which they lie may be determined and a decision made on the most likely modulation. [0119] As also described in the incorporated '003 patent, it may be possible to make a reliable decision before decoding an entire block of information to the end. It is possible to compare metrics after partial decoding if simulations indicate that a sufficiently reliable decision could be taken early. After taking a decision to believe the results of one decoder, the other decoder could be terminated to save processing resources. It is even possible to compare metrics after each new bit is decoded, and a decision made if the difference in the metrics is sufficiently strong in favor of one decoder. The disfavored decoder may then be terminated early to save processing resources. If, however, there is no need to save processing resources, both decoders can be allowed to run to completion, and a decoding check, such as a Cyclic Redundancy Check or other error detection code used to determine which decoder to believe. Only then in the rare case of both error detection checks indicating no errors might metric values need to be compared for a final arbitration. [0120]FIG. 15 illustrates the error correction decoder [0121] A memory [0122] The parity bits for a particular selection of current state [0123] Likewise, the second parity bit is determined by interleaver [0124] The above description applies to the 8-PSK assumption because the associated interleaver placed bits in all three of the possible bit positions of a symbol, bit position 1 in the first block [0125] One application of 8-PSK, which allow 50% more bits to be transmitted than QPSK, is to allow use of a speech coder that codes speech using a higher bit rate, thus giving higher quality than existing cellular systems, such as IS54 that use QPSK. IS 54 interleaves one coded speech frame over two successive QPSK bursts to disperse error events. Greater interleaving gives better error dispersion at the expense of greater delay. This may be a good trade-off, and one possibility for the interleaving pattern to use with 8-PSK is to allocate bit [0126] In U.S. Pat. No. 5,673,291 to Dent, which is commonly assigned, a method is disclosed for improving demodulation and decoding of data transmitted by the above method of interleaving, wherein at least one bit per symbol in a TDMA burst belongs to a previously decoded frame of speech or data. The above patent is hereby incorporated by reference herein. Having decoded a previous frame and obtained an indication of correct decoding, such as a CRC check, the TDMA burst may be demodulated again with the already decoded 1-bit per symbol replaced with the now known bit value, effectively reducing the uncertainty in the remaining part of the symbol to be decoded by a factor of two. For example, if the symbols were 8-PSK, but 1-bit of certain symbols are now known as a result of decoding a previous frame, those symbols may now be demodulated as QPSK symbols. If, after decoding a further frame successfully, 2-bits of certain symbols are known, those symbols may be re-demodulated as 2-PSK symbols. To obtain maximum advantage from the reduction of the constellation size, the remaining two possibilities in the latter case should ideally be diametrically opposite symbols. However, the constellation of FIG. 4 [0127] IS54 requires occasionally to steal a speech frame in order to transmit an urgent Fast Associated Control Channel message (FACCH). An FACCH message only comprises 65-bits before coding, and so is coded using a rate ¼ code in IS54 to obtain 260-bits, which replace 130 of the speech bits in one TDMA slot and the other 130 bits of the speech frame in the same slot of the next TDMA frame. Using 8-PSK, the number of information symbols per frame would preferably remain as 130, but each now carries 3-bits of information, making 390-bits available per 20 mS TDMA frame for carrying coded speech. A 13 kilobit per second speech coder giving high speech quality can be used, and coded using a rate ⅔rds code to give 19.5 kilobits/sec., which fills the 390-bits per 20 mS available. The rate ⅔rds error correction code is preferably a punctured convolutional code which, although appearing to be rate ⅔rds on average, provides a lower rate, i.e., more error protection coding, for the more important speech bits and a higher rate code, i.e., less error protection, for the less important speech bits. [0128] One method of stealing an 8-PSK speech frame to replace by FACCH data is to also code the 65 FACCH bits to 390 bits by using a rate ⅙th code. The invention of the '003 patent may then be applied to determine whether a given frame contains rate ⅔rds coded speech or rate ⅙th coded FACCH. Alternatively, if a speech frame is omitted when a 3-frame diagonal interleaving is employed, this effectively allows the three frames that would have each contained 1-bit per symbol of the omitted frame to use 2-bits per symbol, i.e., QPSK instead. To now insert an FACCH message does not necessarily require all of the now QPSK symbols to be converted back to 8-PSK symbols to provide the extra bits. If, for example, half of the 130 symbols per frame were converted back to 8-PSK symbols, thereby providing 65-bits in each of three successive frames, this could accommodate the 65 FACCH bits using rate ⅓ coding. This invention is particularly useful then for detecting frames in which some symbols are 8-PSK symbols carrying a mixture of speech and FACCH data coded in their respective ways, alternatively, 8-PSK symbols carrying high quality encoded speech or yet again QPSK symbols carrying normal quality encoded speech. [0129]FIG. 16 is a functional block diagram illustrating a cellular receiver utilizing the inventive error correction decoder. Cellular receiver [0130]FIG. 17 is a flow chart showing the steps performed by the inventive error correction decoder [0131] The method continues on to step [0132] The method continues in step [0133]FIG. 18 is a functional block diagram illustrating selection of operation modes for error correction decoder [0134] In operation, received complex samples are received by 8-PSK demodulator [0135] Error correction decoder [0136]FIG. 19 is a flow chart showing the steps carried out by the inventive error correction decoder to decode a received signal containing at least one of 4-level signaling symbols and 8-level signaling symbols. The method begins at step [0137] If it is determined that QPSK symbols are present, the method continues to step [0138] If, however, it is determined that QPSK signaling symbols are not present in step [0139] In situations where a 4-level signaling symbol has been expanded and transmitted by an 8-level modulator to produce 8-level modulation, the inventive error correction decoder [0140] As mentioned above, 4-level signaling symbols may be QPSK signaling symbols; however, it need not be limited to such. 4-level signaling symbols could include DQPSK and Π/4-DQPSK signaling symbols or any combination thereof as well. Additionally, 8-level signaling symbols need not be limited to 8-PSK signaling symbols. 8-level signaling symbols could include 8-DPSK and Π/4-8DPSK signaling symbols, or any combination thereof as well. Furthermore, although the inventive modulator, constrained/unconstrained demodulator, and constrained/unconstrained error correction decoder have been described with respect to a Time Division Multiple Access cellular telephone system, they would be applicable to a code division multiple access cellular telephone system as well. [0141] Furthermore, the concepts of switching the number of path histories and the number of new symbol hypothesis which allow the inventive constrained/unconstrained demodulator to handle both 4-level and 8-level signaling symbols, and the concepts of using an interleaver that only places bits in the 2-bit position of the 3-PSK soft values that correspond to the 2-bits of QPSK could be applied to a decodulator as well, where the number of path histories and new symbol hypothesis utilized in the MLSE processor of the decodulator, and the interleaver would be altered in the same manner discussed herein. [0142] Thus, a method and system for the transmission, reception and the processing of 4-level and 8-level signaling symbols has been provided. An inventive modulator is provided for modulating 4-level signaling symbols using an 8-level modulator. Further, this inventive modulator is able to produce 4-level modulation using an 8-level modulator, where the 4-level modulation represents the expanded 4-level symbol sequence modulated. This inventive modulator allows either less speech compression yielding improved speech quality, or a higher bit rate increasing the quality of the data communication system, without reducing the number of users that can be accommodated by the cellular system. Further, as only one modulator is necessary to modulate both 4-level and 8-level signaling symbols, production costs for the cellular system as well as the size of a cellular station are reduced. [0143] Furthermore, a constrained/unconstrained modulator is provided which is able to demodulate both 4-level signaling symbols and 8-level signaling symbols. Additionally, an error correction decoder is provided which is also able to decode a demodulated signal which contains both 4-level and 8-level signaling symbols. These inventive demodulator and error correction decoder are useful in situations where some cellular stations possess QPSK modulation capability only, and other stations possess 8-PSK capabilities. The inventive modulator and error correction decoder have the distinct advantage of being able to communicate to both. Furthermore, as multiple demodulators and error correction decoders are not required to handle both 4-level and 8-level signaling symbols, the cellular station can be built with reduced component size and cost. [0144] While a particular embodiment of the present has been described and illustrated, it should be understood that the invention is not limited thereto since modifications may be made by persons skilled in the art. The present application contemplates any and all modifications that fall within the spirit and scope of the underlying invention disclosed and claimed herein. Referenced by
Classifications
Rotate |