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Publication numberUS20040029304 A1
Publication typeApplication
Application numberUS 10/635,180
Publication dateFeb 12, 2004
Filing dateAug 5, 2003
Priority dateMar 27, 2002
Also published asUS6660548, US20030186476, WO2003083545A2, WO2003083545A3
Publication number10635180, 635180, US 2004/0029304 A1, US 2004/029304 A1, US 20040029304 A1, US 20040029304A1, US 2004029304 A1, US 2004029304A1, US-A1-20040029304, US-A1-2004029304, US2004/0029304A1, US2004/029304A1, US20040029304 A1, US20040029304A1, US2004029304 A1, US2004029304A1
InventorsMikhail Naydenkov, Sivasubramaniam Yegnanarayanan, Quyen Huynh
Original AssigneeIntel Corporation
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Packaging of multiple active optical devices
US 20040029304 A1
Abstract
A cost effective method is provided for assembly of hybrid optoelectronic circuits requiring flip-chip bonding of multiple active optoelectronic devices onto common substrate or optical bench platform with fine pitch and high accuracy “after-bonding” alignment to the alignment features on substrate and/or to other elements of the hybrid circuit. A Flip-Chip Bonder equipped with high precision Bonding Arm and optical and mechanical system, heated substrate chuck and heated pick-up tool may be used both for alignment and thermal bonding of active component dies to corresponding bonding pads on the common substrate using gold-tin (Au—Sn) solder disposed between die bonding pad and the corresponding substrate bonding pad. During bonding of the first die, tin (Sn) diffuses from a eutectic composition of gold-tin (Au—Sn) solder to (gold (Au) on) the die-bonding pad and/or (gold (Au) on) the substrate bonding-pad resulting in transformation of the Au—Sn eutectic composition to a zeta-phase composition having much higher melting temperature as compared to that of a eutectic composition. As bonding of one or more subsequent dies is performed at temperatures equal to or slightly higher than the melting temperature of a eutectic composition and significantly lower than the melting temperature of a zeta-phase composition, the gold-tin (Au—Sn) solder at the bond of previously attached die does not melt and, consequently, the alignment is not compromised.
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Claims(14)
What is claimed is:
1. An apparatus, comprising:
an active optoelectronic device die bonded to a substrate using a zeta-phase composition of a gold-tin (Au—Sn) solder.
2. The apparatus of claim 1, wherein the zeta-phase composition of Au—Sn solder comprises an 88-90% wt/12-10% wt Au—Sn solder composition.
3. The apparatus of claim 1, wherein the active optoelectronic device die comprises an optical modulator die.
4. The apparatus of claim 3, wherein the substrate comprises a silicon substrate.
5. An apparatus, comprising:
an active optoelectronic device die bonded to a substrate using a gold-tin (Au—Sn) solder composition whose melting temperature is greater than the eutectic temperature of eutectic Au—Sn solder, the die further comprising a gold-layered die bonding pad and a gold-layered substrate bonding pad disposed in a well of the substrate.
6. The apparatus of claim 5, wherein the solder composition whose melting temperature is greater than the eutectic temperature of eutectic Au—Sn solder comprises an Au—Sn solder composition whose melting temperature is greater than approximately two hundred seventy-eight degrees Centigrade.
7. The apparatus of claim 5, wherein the active optoelectronic device die comprises light emitting diode die.
8. The apparatus of claim 7, wherein the substrate comprises a silicon substrate having wire-bonding pads routed to either side of the substrate.
9. A system, comprising:
an active optoelectronic device die bonded to a substrate using a zeta-phase composition of a gold-tin (Au—Sn) solder; and
a waveguide disposed on the substrate and operatively aligned to the active optoelectronic device die.
10. The system of claim 9, further comprising:
a second active device die bonded to the substrate using a zeta-phase composition of a gold-tin (Au—Sn) solder; and
a second waveguide disposed on the substrate and operatively coupled to receive light from the second active optoelectronic device die.
11. The system of claim 10, further comprising a light combiner disposed on the substrate and operatively coupled to receive and combine light from the first and the second active device dies.
12. The system of claim 11, further comprising a third waveguide disposed on the substrate and operatively coupled to receive light from the light combiner.
13. The system of claim 11, wherein the first and second active optoelectronic devices comprise a first and a second laser die having a first and a second operating wavelength, respectively.
14. The system of claim 10, further comprising a demultiplexer disposed on the substrate and operatively coupled to separate and transmit light having a first wavelength to the first active optoelectronic device die and light having a second wavelength to the second active optoelectronic device die.
Description
CROSS REFERENCE TO RELATED APPLICATIONS

[0001] The present application is related to U.S. patent application Ser. No. 10/109,166 [Attorney Docket No. 42390.P13372], filed Mar. 27, 2002 entitled “Packaging of Multiple Active Optical Devices,” with inventors Mikhail Naydenkov, Sivasubramaniam Yegnanarayanan and Quyen Huynh.

BACKGROUND OF THE INVENTION

[0002] 1. Field of the Invention

[0003] The present invention is related to photonic devices and, in particular to hybrid integrated optoelectronic circuits and optical packaging

[0004] 2. Background Information

[0005] Hybrid integrated optoelectronic circuits are commonly fabricated using discrete active and passive photonic devices and electronic devices. Active photonic devices commonly include edge-emitting lasers such as Fabry-Perot (FP) & distributed feedback lasers (DFB), vertical cavity surface-emitting lasers (VCSEL), electro-absorption modulated lasers (EML), photodetectors, semiconductor optical amplifiers, electro-absorption modulators, and other discrete photonic devices. Active optoelectronic (photonic) devices could be combined on the same chip with electronic circuits (devices), for example laser diode and laser driver circuit, and/or photodetector and transimpedance amplifier could be integrated on one chip. At the same time discrete photonic and electronic devices could be bonded to a common substrate, which provides electrical and optical interconnects for the devices. Passive photonic components include guided wave optical elements and optical fibers. Passive photonic components include 1×N (N=2,4,8,16) optical splitters, combiners, wavelength division multiplexed (WDM) or coarse-wavelength division multiplexers or demultiplexers (CWDM/wideband WDM), variable optical attenuators. To fabricate hybrid optoelectronic circuits, passive and active photonic devices typically are formed in a chip substrate using chemical processes and/or are bonded to the substrate using solders or epoxies.

[0006] In the prior art, light is coupled from separately packaged photonic devices into optical fibers and then coupled from the optical fibers to separately packaged waveguide devices. To ensure optimal coupling of light, each photonic device is aligned with its associated optical fiber and each optical fiber is aligned with its corresponding input waveguide of guided wave device.

[0007] One alignment technique involves a self-alignment in which the surface tension force of melted solder pulls each optoelectronic component being bonded to common substrate (or optical bench) into alignment position and when cooled the solder provides mechanical and electrical connection of the optoelectronic component (e.g., laser) die to a bonding pad on the common substrate. In some instances, micro-machined mechanical stops further refine the alignment in that they restrict the movement of the discrete components.

[0008] Another technique involves active alignment, which involves, for example, powering the laser so that it emits light, coupling the light into a waveguide, and monitoring optical power at the output of the waveguide to determine whether light was coupled efficiently. This is a widely used technique for packaging lasers/photodetectors with optical fiber for telecom applications. The optoelectronic device (e.g., laser/photodetector) is fixed onto a ceramic substrate. Micro-optic components such as isolators and lens are then placed in front of the laser. The fiber is then welded into place after optimizing its position to achieve optimum (i.e., >50%) coupling of light between the optical fiber and the optoelectronic device by active alignment. Typically active alignment is a time-consuming, largely manual process that requires expensive equipment, resulting in the packaging dominating the cost of the optoelectronic module.

[0009] With the gradual migration of optical links from long-haul transport to the enterprise and eventually the desktop, there is a growing need for highly functional optical and optoelectronic components that occupy a small form-factor, and that are inexpensive. New optical packaging approaches need to be developed in order to address this need.

[0010] For instance, assembly of small form-factor multiple component hybrid optoelectronic devices requires flip-chip bonding of several active optoelectronic components with fine pitch and high after-bonding alignment accuracy. Currently there are volume manufacturing ready Flip-Chip Bonders that can place an optoelectronic die onto the two-dimensional surface of the substrate with placement accuracy of ±1 μm available, with much shorter cycle times compared to active alignment. In order for edge-emitter devices to couple to each other and onto optical fiber, similar accuracy is required for die placement in the vertical (“z”) direction. To achieve alignment accuracy in the “z” direction, special mechanical pedestals are micro-machined on the substrate.

[0011] Such techniques offer the possibility of high accuracy active optoelectronic component die bonding without using active alignment or relying on self-alignment effect. However heating of the substrate during bonding of subsequent components (e.g., laser dies) can affect the alignment of the previously bonded components. That is, the cooled (solidified) solder bond on the previously bonded component die melts when the substrate is heated to bond the next component die and the previously bonded die moves, thereby affecting its optical coupling to a passive waveguide on the substrate or coupling to/from optical fiber.

BRIEF DESCRIPTION OF THE DRAWINGS

[0012] In the drawings, like reference numbers generally indicate identical, functionally similar, and/or structurally equivalent elements. The drawing in which an element first appears is indicated by the leftmost digit(s) in the reference number, in which:

[0013]FIG. 1 is a cross-section view of a hybrid optical circuit prior to bonding active optoelectronic device dies to a substrate according to an embodiment of the present invention;

[0014]FIG. 2 is a flowchart illustrating an approach to bonding active optoelectronic device dies in FIG. 1 to the substrate in FIG. 1 according to embodiments of the present invention;

[0015]FIG. 3 is a cross-section view of a hybrid optical circuit after bonding active optoelectronic device dies to a substrate according to an embodiment of the present invention;

[0016]FIG. 4 is a graphical representation of the phase equilibrium for a gold-tin (Au—Sn) alloy system;

[0017]FIG. 5 is a top view of the layout of the flip-chip assembly of the hybrid optical circuit in FIG. 1 according to an embodiment of the present invention;

[0018]FIG. 6 is a block diagram of an optical power combiner according to an embodiment of the present invention;

[0019]FIG. 7 is a block diagram of an optical wavelength division multiplexing (WDM) receiver according to an embodiment of the present invention;

[0020]FIG. 8 is a perspective view of the substrate illustrated in FIG. 1 according to embodiments of the present; and

[0021]FIG. 9 is a perspective view of a fragment of the hybrid optical circuit illustrated in FIG. 1 according to embodiments of the present invention.

DETAILED DESCRIPTION OF THE ILLUSTRATED EMBODIMENTS OF THE PRESENT INVENTION

[0022] Embodiments of the present invention utilize unique properties of a gold-tin (Au—Sn) alloy system to electrically and mechanically bond active optoelectronic device dies to a substrate at different times without disturbing previously bonded dies. In the following description, numerous specific details, such as particular processes, materials, devices, and so forth, are presented to provide a thorough understanding of embodiments of the invention. One skilled in the relevant art will recognize, however, that the invention can be practiced without one or more of the specific details, or with other methods, components, etc. In other instances, well-known structures or operations are not shown or described in detail to avoid obscuring various embodiments of the present invention.

[0023] Some parts of the description will be presented using terms such as waveguide, silicon, solder, active optoelectronic device, multiplexer, eutectic, and so forth. These terms are commonly employed by those skilled in the art to convey the substance of their work to others skilled in the art.

[0024] Various operations will be described as multiple discrete blocks performed in turn in a manner that is most helpful in understanding the invention. However, the order in which they are described should not be construed to imply that these operations are necessarily order dependent or that the operations be performed in the order in which the blocks are presented.

[0025] Reference throughout this specification to “one embodiment” or “an embodiment” means that a particular feature, structure, process, block, or characteristic described in connection with the embodiment of the present invention is included in at least one embodiment of the present invention. Thus, the appearances of the phrases “in one embodiment of the present invention” or “in an embodiment of the present invention” in various places throughout this specification are not necessarily all referring to the same embodiment of the present invention. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments of the present invention.

[0026]FIG. 1 is a cross-section view of a hybrid optical circuit 100, prior to bonding components to a substrate or optical bench, according to an embodiment of the present invention. In the illustrated embodiment of the present invention, the hybrid optical circuit 100 includes a set of active optoelectronic device dies (102, 112, 122, 132). Each die (102, 112, 122, 132) includes an active optoelectronic device (104, 114, 124, 134, respectively) and a gold-layered (Au) die bonding pad (106, 116, 126, 136, respectively) disposed on the device (104, 114, 124, 134, respectively).

[0027] In one embodiment of the present invention, A gold-tin (Au—Sn) solder layer (108, 118, 128, 138, respectively) may be disposed on the die bonding pad (106, 116, 126, 136, respectively). In one embodiment of the present invention, the Au—Sn solder layers (108, 118, 128, 138) are eighty percent gold (Au) by weight and twenty percent tin (Sn) by weight (80% wt/20% wt Au—Sn).

[0028] The hybrid optical circuit 100 includes a substrate 150, which has a gold-layered (Au) substrate bonding pads (160, 164, 168, 172) disposed in a well (162, 166, 170, 174, respectively). Each die (102, 112, 122, 132) is aligned to alignment marks on the bottom of a substrate well (162, 166, 170, 174, respectively), positioned on top of a substrate well (162, 166, 170, 174, respectively) so that the die bonding pad (106, 116, 126, 136, respectively), the solder layer (108, 118, 128, 138, respectively), and the substrate bonding pads (160, 164, 168, 172, respectively) are in mechanical contact. Each die (102, 112, 122, 132) is bonded to the substrate 150 using a die bonding pad (106, 116, 126, 136, respectively), the Au—Sn solder layer (108, 118, 128, 138, respectively), and the substrate bonding pad (160, 164, 168, 172, respectively), for example, in such a manner that after-bonding alignment is better than ±2 micron.

[0029] In an alternative embodiment of the present invention, the gold-tin (Au—Sn) solder layer (108, 118, 128, 138, respectively) may be disposed on the substrate-bonding pad (160, 164, 168, 172, respectively), rather than or in addition to being disposed on a die-bonding pad (106, 116, 126, 136, respectively). The active optoelectronic devices (104, 114, 124, 134) also may be aligned to waveguides (shown in FIG. 8) also disposed on the substrate 150 so that optical mode of the active optoelectronic device (104, 114, 124, 134) is efficiently coupled to optical mode of the waveguide.

[0030] According to an embodiment of the present invention, the active optoelectronic device dies (102, 112, 122, 132) may be edge-emitting laser dies, vertical cavity surface-emitting laser dies (VCSEL), photodetector dies, semiconductor optical amplifier dies, and other discrete photonic device dies with devices that generate light when stimulated, that sense light, convert light to electrical signals, or that condition light. The active optoelectronic devices dies (104, 114, 124, 134) may have different operating wavelengths.

[0031] The substrate 150 (or optical bench) may be a silicon substrate, a silicon-on insulator (SOI) substrate, or other suitable substrate that provides good electrical and thermal properties for the placement of the optoelectronic die. For example, when the substrate is an SOI substrate an insulator layer of silicon oxide (e.g., SiO2, glass) may be formed (e.g., by growing, implanting, bonding, etc.) on an intrinsic silicon (Si) substrate in a well-known manner. An intrinsic Si layer may be formed on the insulator layer.

[0032] The SOI substrate may be a bond-and-etchback-silicon-on-insulator (BESOI) substrate, which is obtained by growing SiO2 on the two Si wafers and bonding the Si wafers together by wafer fusion. The top Si wafer is subsequently thinned to the desired thickness. The SOI substrate may be separation-by-implanted-oxygen (SIMOX) SOI substrate, which is obtained by implanting oxygen at a well-defined depth (controlled by implant energy) into silicon and annealing the silicon to form a buried SiO2 (BOX) layer.

[0033] The substrate 150 may be micro-machined in accordance with well-known techniques to form the substrate wells (162, 166, 170, 174). For example, the substrate 150 may be dry etched to form the substrate wells (162, 166, 170, 174).

[0034]FIG. 2 is a flowchart illustrating an example method 200 for mechanically and electrically bonding dies to a substrate according to embodiments of the present invention. In one embodiment of the present invention, the dies are bonded to the substrate with after-bonding accuracy better than ±2 microns. This after-bonding alignment accuracy is sufficient to efficiently couple light into and/or out of various photonic devices when alignment tolerances between optical devices are relaxed using special input/output optical structures such mode-taper structures. In addition, this tolerance would be sufficient for low-coupling applications in short-reach optical links.

[0035] The dies may be bonded to the substrate using a flip-chip bonder. A suitable flip-chip bonder includes a bottom chuck, a bonding arm, a heated pick-up tool, “x”-“y” positioners, and optical viewing system. A suitable flip-chip bonder may be a proprietary flip-chip bonder or one available from FINETECH in Berlin, Germany. A machine-readable medium with machine-readable instructions thereon may be used to cause a processor to perform the process 200.

[0036] In a block 202, a substrate is positioned on the bottom chuck of the flip-chip bonder and the heated pick-up tool picks up a die.

[0037] A block 204 heats the substrate and the substrate bonding pad to a temperature less than or equal to the eutectic temperature of an Au—Sn alloy solder. As used herein, the term “eutectic” refers to a structure, temperature, and/or phase of an alloy system characterized by equilibrium between solid state and liquid state. Alloys of eutectic composition completely (100%) transform into liquid phase when heated above the eutectic temperature and completely (100%) transforms into solid phase when cooled below the eutectic temperature. For example, a common eutectic Au—Sn solder composition has eighty percent gold (Au) by weight and twenty percent tin (Sn) by weight (i.e., 80% wt/20% wt Au—Sn solder), but can be in the eutectic range depicted in phase equilibrium graphical representation for a gold-tin (Au—Sn) alloy system shown in FIG. 4 below.

[0038] When heating the substrate and the substrate-bonding pad, a computer may control the flow of a hot inert (or forming) gas when used to reduce oxidation on the bonding interface between the substrate and the die. The inert gas may be nitrogen. Generally, a forming gas is a mixture of hydrogen and nitrogen and is used to render the inert atmosphere while bonding die to substrate.

[0039] A block 206 heats the die to a temperature greater than or equal to the eutectic temperature of eutectic Au—Sn alloy solder, which also causes the eutectic Au—Sn alloy solder to begin to melt

[0040] A block 208 aligns the die with alignment marks on the substrate or with a waveguide formed in or on the substrate. In one embodiment of the present invention, the die is aligned using the “x”-“y” positioners and the optical viewing system. Unique alignment marks/features may be implemented on the top-layer metallization in the die and the substrate to facilitate machine-vision based rapid alignment between the die and substrate. Such techniques are well known and widely used for flip-chip packaging of optoelectronic die onto substrate.

[0041] In a block 210, the heated pick-up tool brings the die-bonding pad into contact with a eutectic gold-tin (AuSn) solder layer on the substrate pad.

[0042] In a block 212, the bonding arm applies a small force to the die and holds the die in the alignment position until the gold-tin (Au—Sn) solder layer on the gold (Au) substrate-bonding pad transforms from a eutectic composition to zeta-phase (4-phase). As used herein, the term “zeta-phase” refers to a structure, temperature, and/or phase of an alloy system characterized by spontaneous local freezing during the bonding process. Zeta-phase transforms directly from a solid phase to a liquid phase when heated up to a temperatures above the “liquidus” line of the phase equilibrium graphical representation for a gold-tin (Au—Sn) alloy system depicted in FIG. 4 below and transforms directly into a solid phases when cooled down to a temperature below “solidus” line of the phase equilibrium graphical representation for a gold-tin (Au—Sn) alloy system depicted in FIG. 4 below. For example, a common zeta-phase Au—Sn solder composition has eighty-eight percent gold (Au) by weight and twelve percent tin (Sn) by weight (i.e., 88% wt/12% wt Au—Sn solder), but can be in the zeta-phase range depicted in phase equilibrium graphical representation for a gold-tin (Au—Sn) alloy system depicted in FIG. 4 below.

[0043] In the block 212, Sn from the gold-tin (Au—Sn) solder layer will diffuse into gold (Au) on the die-bonding pad and the gold (Au) on the substrate-bonding pad, and the gold-tin (Au—Sn) solder layer begins to “consume” gold (Au) from the die-bonding pad and the substrate-bonding pad. The die is positioned in the “z” direction using the micro-machined pedestals (or mechanical stops). When the solder is melted the bonding arm forces the die against its respective pedestal.

[0044] At a certain weight percentage of gold (Au) in the gold-tin (Au—Sn) solder layer (as illustrated by the phase equilibrium graphical representation for a gold-tin (Au—Sn) alloy system depicted in FIG. 4) the gold-tin (Au—Sn) solder layer transforms into zeta-phase and solidifies completely and a bond between the die and the substrate is formed.

[0045] The melting point of the bond is very high (e.g., 532 degrees Centigrade) as compared to the melting point commonly used to bond dies to substrates. As a result, the bond and die alignment are not disturbed when heating the substrate to bond subsequent dies. According to one embodiment of the present invention, when the weight percentage of gold (Au) in the gold-tin (Au—Sn) solder layer is approximately 88-90% wt, the solder layer transforms into zeta-phase and solidifies completely, and the bond between the substrate and the die is formed.

[0046] According to embodiments of the present invention, the die may not have a gold-tin (Au—Sn) solder layer on its die-bonding pad. Instead, the gold-tin (Au—Sn) solder layer is on the substrate-bonding pad. In this embodiment of the present invention, when heating, the temperature of the substrate is maintained below melting point of eutectic gold-tin (Au—Sn) solder to prevent a dramatic increase in diffusion of tin (Sn) into gold (Au) on the substrate-bonding pad. Thus, the die is heated to a temperature above the melting point of eutectic gold-tin (Au—Sn) solder. Additionally, the amount of gold (Au) on the substrate-bonding pad is not enough to transform the eutectic gold-tin (Au—Sn) solder from eutectic to zeta-phase. Rather, the combined amount of gold on the die-bonding pad and the substrate-bonding pad is sufficient to transform the eutectic gold-tin (Au—Sn) solder from eutectic to zeta-phase.

[0047] In alternative embodiments of the present invention, the eutectic gold-tin (Au—Sn) solder is disposed on the die-bonding pad and the substrate-bonding pad does not have eutectic gold-tin (Au—Sn) solder. In this embodiment of the present invention, when heating, the die-bonding pad is brought to a temperature that is slightly lower than the melting point of eutectic gold-tin (Au—Sn) solder and the substrate-bonding pad is brought to a temperature that is slightly higher than the melting point of eutectic gold-tin (Au—Sn) solder. Additionally, the amount of gold (Au) on the die-bonding pad is not sufficient to transform the eutectic gold-tin (Au—Sn) solder from eutectic to zeta-phase. However, the amount of gold (Au) on the substrate-bonding pad is sufficient to transform the eutectic gold-tin (Au—Sn) solder from eutectic to zeta-phase.

[0048] In other embodiments of the present invention, the eutectic gold-tin (Au—Sn) solder is disposed on the die-bonding pad and the substrate-bonding pad. In this embodiment of the present invention, either of the heating processes performed in the block 212 may be used to bond the die with the substrate.

[0049] In a block 214, the pick-up tool releases the die (e.g., the tool vacuum for the pick-up tool is turned “off”) and the flip-chip bonder ceases the flow of hot inert (or forming) gas.

[0050] In a block 216, the bond between the die and the substrate cools and the method 200 repeats itself (e.g., returns to block 202) for the next die(s). For example, the eutectic Au—Sn solder layer, the die-bonding pad, and/or the substrate bonding-pad are heated to the melting point of eutectic Au—Sn. However, unlike prior art processes, the previously bonded die remains bonded to the substrate and aligned because the bond between the previously bonded die and the substrate melts at a temperature that is greater than eutectic Au—Sn eutectic temperature.

[0051] Of course, there may be other layer arrangements disposed in a multiple layer stack (i.e., instead of the die bonding pad, eutectic Au—Sn solder layer, and the substrate bonding pad arrangement). For example, the eutectic Au—Sn solder layer may be replaced by alternating layers of Sn and Au in predetermined weight ratios such that when melted the alternating layers of Au and Sn form a eutectic Au—Sn solder composition and when heated further form a zeta-phase composition of Au—Sn.

[0052] Additionally, a layer of titanium and a layer of platinum may be present in the bonding-pad structure. In this embodiment of the present invention, the structure of the bonding pad may be titanium over platinum over gold. In other embodiments of the present invention, other materials also may be used.

[0053]FIG. 3 a cross-section view of a hybrid optical circuit 100 after bonding the active optoelectronic device dies (102, 112, 122, 132) to the substrate 150 according to an embodiment of the present invention. In the embodiment of the present invention shown, the eutectic Au—Sn solder layers (108, 118, 128, 138) and the substrate bonding pads (106, 116, 126, 136) have been inter-diffused to create other Au—Sn compositions (302, 304, 306, 308, respectively), such as the zeta-phase Au—Sn composition whose composition is 88-90% wt of gold (Au) and 12-10% wt of tin (Sn) respectively, and whose subsequent melting temperature is greater than 500° Centigrade (approximately 532° Centigrade). Of course, the Au—Sn compositions (302, 304, 306, 308) may be made from the Au from the die bonding pads (160, 164, 168, 172), or Au from the die bonding pads (160, 164, 168, 172) and the substrate bonding pads (106, 116, 126, 136).

[0054]FIG. 4 is a graphical representation 400 of the phase equilibrium for a gold-tin (Au—Sn) alloy system, such as the system created by the eutectic Au—Sn solder layers (108, 118, 128, 138), the die bonding pads (106, 116, 126, 136), and the substrate bonding pads (160, 164, 168, 172). The graphical representation 400 illustrates that for a given weight ratio of Au to Sn, the Au—Sn alloy system will liquefy when it reaches a specific temperature. As the weight ratio of Au to Sn in the Au—Sn alloy system changes, the temperature at which the Au—Sn alloy system liquefies also changes.

[0055] The graphical representation 400 includes an “x” axis 402, which represent temperature in degrees centigrade, and a “y” axis, which represents the percentage of Sn in an Au—Sn alloy system. The graphical representation 400 also includes a (dotted line parabolic) curve 406, the area under which represents the zeta-phase of an Au—Sn alloy system. The graphical representation 400 illustrates that at a point 408 the Au—Sn alloy system is a eutectic composition, the percentage of approximately Sn is twenty and the percentage of Au is approximately eighty, and the melting temperature of the cooled compound (i.e., point of liquefaction) of such an Au—Sn system is approximately 278 degrees Centigrade. Interpretation of the graphical representation 400 is well known.

[0056]FIG. 5 is a top view of a hybrid optical circuit 500 according to an embodiment of the present invention, in which the substrate bonding pads (160, 164, 168, 172) are coupled to wire bonding pads (502, 504, 506, 508, respectively) located in substrate wells (512, 514, 516, 518, respectively). The wire bonding pads (502, 504, 506, 508) may include solder bumps, which electrically connect the active optoelectronic device dies (102, 112, 122, 132) to other circuitry on the substrate 150. The substrate wells 512, 514, 516, 518 may be formed in a manner similar to the substrate wells 162, 166, 170, 174.

[0057] In another embodiment, the wire bonding pads (502, 504, 506, 508) may be routed to the side of the substrate 150 to provide access to both edges of the active optoelectronic device dies (102, 112, 122, 132) so that light may be coupled from both edges of the active optoelectronic device dies (102, 112, 122, 132). This may be useful for applications in which optical waveguides are to be placed at the input and output of dies, in which optical fiber is to be placed at the input and output of dies, in which micro-optic components are to be placed at the input and output of dies (e.g., lens/isolators/diffraction gratings, etc.), and/or when other components, such as photodetector die/laser die, are to be placed at the input and output of dies.

[0058] According to an embodiment of the present invention, each optoelectronic device dies (102, 112, 122, 132) may be an optical amplifier (SOA) or any other optoelectronic die, thereby enables placement of multiple SOA/other optoelectronic die with high-precision and close proximity on the substrate, in order to realize arrays of device. Each die may be optimized to operate at a specific wavelength.

[0059]FIG. 6 is a block diagram of a four-by-one optical power combiner 600 according to an alternative embodiment of the present invention, in which the active optoelectronic device (e.g., laser) dies 102, 112, 122, and 132 are bonded to the substrate 150 as described herein. The substrate 150 includes several waveguides (602, 612, 622, 632), which may be formed on the substrate 150 using reactive ion etching according to well known techniques. Each active optoelectronic device die (102, 112, 122, and 132) is aligned with a waveguide (602, 612, 622, 632, respectively) such that light from the active optoelectronic devices (104, 114, 124, 134, respectively) is efficiently coupled to its respective waveguide (602, 612, 622, 632, respectively).

[0060] Recall from above that in the prior art, light is coupled from separately packaged active optoelectronic devices into optical fibers and then coupled from the optical fibers to separately packaged waveguides on a substrate. According to an embodiment of the present invention, however, the light emitting portion of the active optoelectronic device dies 102, 112, 122, 132 may be directly coupled to the light transmitting portion of the waveguides 602, 612, 622, 632, respectively. Additionally, using the flip-chip bonder described above, placement to within one micron (±1 μm) accuracy may be achieved.

[0061] In one embodiment of the present invention, the operating wavelengths (or colors) of the active optoelectronic devices (104, 114, 124, 134) are dissimilar. The waveguides (602, 612, 622, 632) are coupled to a multiplexer 650, which multiplexes the different wavelengths into a single light signal. In alternative embodiment of the present invention, the multiplexer 650 may be a multimode interference (MMI) device or an arrayed waveguide grating (AWG) device. A waveguide 652, formed on the substrate 150 in a manner equivalent to the waveguides 602, 612, 622, 632, is coupled to the multiplexer 650 to direct the multiplexed light signal to other circuitry on or outside the optical power combiner 600.

[0062]FIG. 7 is a block diagram of a one-by-four WDM receiver module 700 according to an alternative embodiment of the present invention, in which the active optoelectronic device (e.g., photodetector) dies 102, 112, 122, and 132 are bonded to the substrate 150 as described herein. Each photodetector die (102, 112, 122, and 132) is aligned with a waveguide (602, 612, 622, 632, respectively) formed on the substrate 150 as described herein such that light from the waveguides is efficiently coupled to its respective photodetector (104, 114, 124, 134, respectively). Such a configuration would work optimally for an edge-illuminated photodetector. For surface illuminated photodetectors, other mechanical structures such as mirror/beam turner may be defined on the substrate 150 to direct the light from the optical waveguide/fiber into the photodetector aperture.

[0063] Although not so depicted, instead of coupling light between the photodetector dies 102, 112, 122, 132 and the waveguides 602, 612, 622, 632, respectively, using optical fibers, the light receiving portion of the photodetector dies 102, 112, 122, 132 may be efficiently coupled to the light transmitting portion of the waveguides 602, 612, 622, 632, respectively.

[0064] According to an embodiment of the present invention, the operating wavelengths (or colors) of the photodetectors (104, 114, 124, 134) are dissimilar. (Note: Resonantly enhanced photodetectors offer improved performance over a narrowband wavelength range. However, typical p-i-n type photodetectors offer a wide operating wavelength range of ˜100 nm or so). The waveguides (602, 612, 622, 632) are coupled to a demultiplexer 702, which separates the different wavelengths out of a multiplexed light signal. A waveguide 652 is coupled to the demultiplexer 702 to direct the multiplexed light signal to the demultiplexer 702 from other circuitry on or outside of the optical WDM receiver module 700.

[0065]FIG. 8 is a perspective view of a fragment 800 of the substrate 150 according to embodiments of the present invention. In the illustrated embodiment of the present invention, the substrate 150 includes a waveguide 802 and one of the substrate wells 162. An edge 804 defines the position of an active optoelectronic device die in the “z” direction. The waveguide 802 may be formed in the second intrinsic Si layer, by dry etching to remove all but selective portions of the second intrinsic Si layer, for example.

[0066]FIG. 9 is a perspective view of a fragment 900 of the substrate 150 according to embodiments of the present invention. FIG. 9 shows one of the active optoelectronic device dies 102 bonded to a substrate-bonding pad disposed inside the substrate well 162 and aligned to the waveguide 802 in accordance with embodiments of the present invention.

[0067] Embodiments of the invention can be implemented using hardware, software, or a combination of hardware and software. Such implementations include state machines and application specific integrated circuits (ASICs). In implementations using software, the software may be stored on a computer program product (such as an optical disk, a magnetic disk, a floppy disk, etc.) or a program storage device (such as an optical disk drive, a magnetic disk drive, a floppy disk drive, etc.).

[0068] The above description of illustrated embodiments of the invention is not intended to be exhaustive or to limit the invention to the precise forms disclosed. While specific embodiments of, and examples for, the invention are described herein for illustrative purposes, various equivalent modifications are possible within the scope of the invention, as those skilled in the relevant art will recognize. These modifications can be made to the invention in light of the above detailed description.

[0069] The terms used in the following claims should not be construed to limit the invention to the specific embodiments of the present invention disclosed in the specification and the claims. Rather, the scope of the invention is to be determined entirely by the following claims, which are to be construed in accordance with established doctrines of claim interpretation.

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US7608485Sep 8, 2006Oct 27, 2009Infineon Technologies AgHighly reliable, cost effective and thermally enhanced AuSn die-attach technology
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US8240545Aug 11, 2011Aug 14, 2012Western Digital (Fremont), LlcMethods for minimizing component shift during soldering
EP1575089A1 *Mar 9, 2004Sep 14, 2005Infineon Technologies AGHighly reliable, cost effective and thermally enhanced AuSn die-attach technology
WO2005086220A1 *Mar 7, 2005Sep 15, 2005Infineon Technologies AgHighly reliable, cost effective and thermally enhanced ausn die-attach technology
WO2006039176A1 *Sep 21, 2005Apr 13, 2006Intel CorpDie exhibiting an effective coefficient of thermal expansion equivalent to a substrate mounted thereon, and processes of making same
WO2013106008A2 *Mar 27, 2012Jul 18, 2013Intel CorporationOn-chip diffraction grating prepared by crystallographic wet-etch
Classifications
U.S. Classification438/26
International ClassificationH05K3/34, G02B6/28, G02B6/34, G02B6/12
Cooperative ClassificationG02B6/2813, H05K3/3436, H05K3/3463, G02B6/12007, G02B6/4238, G02B6/12004
European ClassificationG02B6/12D, G02B6/12M