US 20040156441 A1 Abstract In a multi-carrier transmission system, a clock timing error (τ
_{e}) is calculated at the receiver's side and used for synchronisation between a transmitting modem and a receiving modem (RX1). The clock timing error (τ_{e}) is calculated from phase errors (φ_{0}, φ_{1}, . . . , φ_{i}, . . . , φ_{N-1}) detected for a plurality of pilot carriers during a tracking mode in such a way that the share (A_{i}) of a phase error (φ_{i}) detected for a particular pilot carrier in the clock timing error (τ_{e}) depends on the transmission quality (SNR_{i}) of that pilot carrier over the transmission medium in between the two modems. In this way, the robustness of the synchronisation for norrowband noise near a pilot carrier is improved significantly. Claims(12) 1. Method to determine during a tracking mode in a multi-carrier system a clock timing error (τ_{e}) used for synchronisation purposes, said method comprising the steps of detecting phase errors (φ_{0}, φ_{1}, . . . , φ_{i}, . . . , φ_{N-1}) for a plurality of pilot carriers and calculating said clock timing error (τe) from said phase errors (φ_{0}, φ_{1}, . . . , φ_{i}, φ_{N-1})
CHARACTERISED IN THAT a share (A
_{i}) of a phase error (φ_{i}) of said phase errors (φ_{0}, φ_{1}, . . . , φ_{i}, . . . , φ_{N-1}) in said clock timing error (τ_{e}) depends on a value (SNR_{i}) of a transmission quality parameter measured for a pilot carrier of said pilot carriers for whom said phase error (φ_{i}) is measured. 2. Method according to CHARACTERISED IN THAT said value (SNR _{i}) of said transmission quality parameter is determined during an acquisition mode preceding said tracking mode. 3. Method according to CHARACTERISED IN THAT said clock timing error (τ _{e}) is calculated as a weighted sum of said phase errors (φ_{0}, φ_{1}, . . . , φ_{i}, . . . , φ_{N-1}) whereby said share (A_{i}) of said phase error (φ_{i}) equals a weight coefficient (A_{i}/B) in said sum. 4. Method according to CHARACTERISED IN THAT said share (A _{i}) is linearly proportional to said value (SNR_{i}) of said transmission quality parameter. 5. Method according to CHARACTERISED IN THAT a proportionality factor between said share (A _{i}) and said value (SNR_{i}) of sold transmission quality parameter is linearly dependent on a frequency of said pilot carrier. 6. Method according to CHARACTERISED IN THAT said weighted sum is normalised by a linear combination (B) of values (SNR _{i}) of said transmission quality parameter measured for sold plurality of pilot carriers. 7. Method according to CHARACTERISED IN THAT a coefficient in said linear combination (B) depends on a square frequency of a pilot carrier of said pilot carriers. 8. Method according to CHARACTERISED IN THAT said transmission quality parameter is a signal-to-noise ratio. 9. Arrangement (ARR) to determine during a tracking mode in a multi-carrier system a clock timing error (τ_{e}) used for synchronisation purposes, said arrangement (ARR) comprising:
a. phase error detection means (PHASE) whereto a multi-carrier signal is applied, said phase error detection means (PHASE) being adapted to detect phase errors (φ
_{0}, φ_{1}, . . . , φ_{i}, . . . , φ_{N-1}) for a plurality of pilot carriers; and b. calculation means (CALC), coupled to said phase error detection means (PHASE), and adopted to calculate said clock timing error (be) from said phase errors (φ
_{0}, φ_{1}, . . . , φ_{i}, . . . , φ_{N-1}) CHARACTERISED IN THAT said arrangement (ARR) further comprises:
c. share determination means (WEIGHT), having an output coupled to said calculation means (CALC) and being adapted to receive via an input thereof values (SNR
_{i}) of a transmission quality parameter related to said plurality of pilot tones and to determine shares (A_{0}, A_{1}, . . . , A_{i}, . . . , A_{N-1}) of said phase errors (φ_{0}, φ_{1}, . . . , φ_{i}, . . . , φ_{N-1}) in said clock timing error (τ_{e}) from said values (SNR_{i}) of said transmission quality parameter; and further in that: d. said calculation means (CALC) is adapted to receive via an input thereof said shares (A
_{0}, A_{1}, . . . , A_{i}, . . . , A_{N-1}) and to calculate said clock timing error (τ_{e}) from said shares (A_{0}, A_{1}, . . . , A_{i}, . . . , A_{N-1}) and said phase errors (φ_{0}, φ_{1}, . . . , φ_{i}, . . . , φ_{N-1}). 10. Synchronisation unit (SYNCHRO1) to be used in a multi-carrier system, said synchronisation unit (SYNCHRO1) comprising:
a. skip and duplicate means (S/D), adapted to remove a sample from or to duplicate a sample in a multi-carrier signal when a clock timing error (τ _{e}) becomes larger than or equal to a sample period; b. phase rotation means (ROTOR), coupled in series with said skip and duplicate means (S/D), and adapted to apply a phase shift to each carrier in said multi-carrier signal proportional to said clock timing error (τ _{e}) and proportional to a frequency of said carrier; c. a clock timing error determination arrangement (ARR), coupled to said phase rotation means (ROTOR), and adapted to determine during a tracking mode of said multi-carrier system said clock timing error (τ _{e}), said clock timing error determination arrangement (ARR) comprising: c1. phase error detection means (PHASE) whereto a multi-carrier signal is applied, said phase error detection means (PHASE) being adapted to detect phase errors (φ _{0}, φ_{1}, . . . , φ_{i}, . . . , φ_{N-1}) for a plurality of pilot carriers; and c2. calculation means (CALC), coupled to said phase error detection means (PHASE), and adapted to calculate said clock timing error (τ _{e}) from said phase errors (φ_{0}, φ_{1}, . . . , φ_{i}, . . . , φ_{N-1}); and d. a feedback loop (FBL) coupled to said clock timing error determination arrangement (ARR) and having an output coupled to inputs of both said skip and duplicate means (S/D) and said phase rotation means (ROTOR), said feedback loop (FBL) being adapted to feed back said clock timing error (τ _{e}) to both said skip and duplicate means (S/D) and said phase rotation means (ROTOR), CHARACTERISED IN THAT said clock timing error determination arrangement (ARR) further comprises: c3. share determination means (WEIGHT), having an output coupled to said calculation means (CALC) and being adapted to receive via an input thereof values (SNR _{i}) of a transmission quality parameter related to said plurality of pilot tones and to determine shares (A_{0}, A_{1}, . . . , A_{i}, . . . , A_{N-1}) of said phase errors (φ_{0}, φ_{1}, . . . , φ_{i}, . . . , φ_{N-1}) in said clock timing error (τ_{e}) from said values (SNR_{i}) of said transmission quality parameter; and further in that: c4. said calculation means (CALC) is adapted to receive via an input thereof said shares (A _{0}, A_{1}, . . . , A_{i}, A . . . , A_{N-1}) and to calculate said clock timing error (τ_{e}) from said shares (A_{0}, A_{1}, . . . , A_{i}, . . . , A_{N-1}) and said phase errors (φ_{0}, φ_{1}, . . . , φ_{i}, . . . , φ_{N-1}). 11. Synchronisation unit (SYNCHRO2) to be used in a multi-carrier system, said synchronisation unit (SYNCHRO2) comprising:
a. sampling means (A/D) under control of a voltage controlled oscillator (VCXO), adopted to sample a multi-carrier signal, a period of said voltage controlled oscillator (VCXO) being controlled by a clock timing error (τ _{e}); b. phase rotation means (ROTOR), coupled in series with said sampling means (A/D), and adapted to apply a phase shift to each carrier in said multi-carrier signal proportional to a frequency of said carrier; c. a clock timing error determination arrangement (ARR), coupled to said phase rotation means (ROTOR), and adapted to determine during a tracking mode of said multi-carrier system said clock timing error (τ _{e}), said clock timing error determination arrangement (ARR) comprising: c1. phase error detection means (PHASE) whereto a multi-carrier signal is applied, said phase error detection means (PHASE) being adapted to detect phase errors (φ _{0}, φ_{1}, . . . , φ_{i}, . . . , φ_{N-1}) for a plurality of pilot carriers; and c2. calculation means (CALC), coupled to said phase error detection means (PHASE), and adapted to calculate said clock timing error (τ _{e}) from said phase errors (φ_{0}, φ_{1}, . . . , φ_{i}, . . . , φ_{N-1}); and d. a feedback loop (FBL) coupled to said clock timing error determination arrangement (ARR) and having an output coupled to an input of said voltage controlled oscillator (VCXO), said feedback loop (FBL) being adapted to feed back said clock timing error (τ _{e}) to said voltage controlled oscillator (VCXO), CHARACTERISED IN THAT said clock timing error determination arrangement (ARR) further comprises: c3. share determination means (WEIGHT), having an output coupled to said calculation means (CALC) and being adapted to receive via an input thereof values (SNR _{i}) of a transmission quality parameter related to said plurality of pilot tones and to determine shares (A_{0}, A_{1}, . . . , A_{i}, . . . , A_{N-1}) of said phase errors (φ_{0}, φ_{1}, . . . , φ_{i}, . . . , φ_{N-1}) in said clock timing error (τ_{e}) from said values (SNR_{i}) of said transmission quality parameter; and further in that: c4. said calculation means (CALC) is adapted to receive via an input thereof said shares (A _{0}, A_{1}, . . . , A_{i}, . . . , A_{N-1}) and to calculate said clock timing error (τ_{e}) from said shares (A_{0}, A_{1}, . . . , A_{i}, . . . , A_{N-1}) and said phase errors (φ_{0}, φ_{1}, . . . , φ_{i}, . . . , φ_{N-1}). 12. Synchronisation unit (SYNCHRO3) to be used in a multi-carrier system, said synchronisation unit (SYNCHRO3) comprising:
a. interpolator means (INT), adapted to receive a multi-carrier input signal and to interpollate in between two successive samples of said multi-carrier input signal to generate an intermediate sample; b. phase rotation means (ROTOR), coupled in series with said interpolator means (INT), and adapted to apply a phase shift to each carrier in said multi-carrier signal proportional to a frequency of said carrier; c. a clock timing error determination arrangement (ARR), coupled to said phase rotation means (ROTOR), and adapted to determine during a tracking mode of said multi-carrier system said clock timing error (τ _{e}), said clock timing error determination arrangement (ARR) comprising: c1. phase error detection means (PHASE) whereto a multi-carrier signal is applied, said phase error detection means (PHASE) being adapted to detect phase errors (φ _{0}, φ_{1}, . . . , φ_{i}, . . . , φ_{N-1}) for a plurality of pilot carriers; and c2. calculation means (CALC), coupled to said phase error detection means (PHASE), and adapted to calculate said clock timing error (τ _{e}) from said phase errors (φ_{0}, φ_{1}, . . . , φ_{i}, . . . , φ_{N-1}); and d. a feedback loop (FBL) coupled to said clock timing error determination arrangement (ARR) and having an output coupled to an input of both said skip and duplicate means (S/D) and said interpolator means (INT), said feedback loop (FBL) being adapted to feed back said clock timing error (τ _{e}) to both said skip and duplicate means (S/D) and said interpolator (INT); CHARACTERISED IN THAT said clock timing error determination arrangement (ARR) further comprises: c3. share determination means (WEIGHT), having an output coupled to said calculation means (CALC) and being adapted to receive via an input thereof values (SNR _{i}) of a transmission quality parameter related to said plurality of pilot tones and to determine shares (A_{0}, A_{1}, . . . , A_{i}, . . . , A_{N-1}) of said phase errors (φ_{0}, φ_{1}, . . . , φ_{i}, . . . , φ_{N-1}) in said clock timing error (τ_{e}) from said values (SNR_{i}) of said transmission quality parameter; and further in that: c4. said calculation means (CALC) is adapted to receive via an input thereof said shares (A _{0}, A_{1}, . . . , A_{i}, . . . , A_{N-1}) and to calculate said clock timing error (τ_{e}) from said shares (A_{0}, A_{1}, . . . , A_{i}, . . . , A_{N-1}) and said phase errors (φ_{0}, φ_{1}, . . . , φ_{i}, . . . , φ_{N-1}).Description [0001] The present invention relates to a method to determine during a tracking mode a clock timing error in a multi-carrier transmission system as defined in the preamble of claim [0002] Such a method and related equipment to perform this method are already known in the art, e.g. from the European Patent Application EP 0 453 203, entitled ‘Method and apparatus for correcting for clock and carrier frequency offset, and phase litter in multicarrier modems’ from applicant Telebit Corporation. Therein, phases of a few pilot carriers are detected and used to calculate a clock timing error named a phase correcting signal (see page 3, lines 11-35 of the cited European Patent Application). As is indicated on page 6, lines 24-26 of EP 0 453 203, the phase correcting signal is used in a phase-locked loop (PLL) to realise synchronisation between a transmitting multi-carrier modem and a receiving multi-carrier modem. [0003] In case of a narrowband interferer in the vicinity of one of the pilot carriers whose phases are detected to calculate the clock timing error, use of phase information extracted from this pilot carrier renders the so called clock timing error or phase correcting signal less accurate as a measure for the timing difference between transmitting and receiving modem. As a consequence, synchronisation between the transmitting and receiving modem may be lost in the known system when one of the pilot carriers is affected by noise. [0004] An object of the present invention is to provide a method, arrangement and synchronisation units similar to those known, one but whose robustness for narrowband noise near the pilot carriers is optimised. [0005] According to the invention, this object is achieved by the method defined in claim [0006] Indeed, giving the phase error detected for a first pilot carrier which is transferred with a low transmission quality a relatively low share in the clock timing error used for synchronisation, and giving the phase error detected for a second pilot carrier which is transferred with a high transmission quality a relatively high share in the clock timing error used for synchronisation, has a filtering effect on the narrowband noise which affects the transmission quality of the first pilot carrier for this clock timing error. As a consequence, the variance of the clock timing error is reduced according to the present invention resulting in a better tracking of the timing-locked loop whereto the clock timing error is applied as input. This implies that the synchronisation process is made less sensitive for narrowband noise. [0007] It is to be noticed that the term ‘comprising’, used in the claims, should not be interpreted as being limitative to the means listed thereafter. Thus, the scope of the expression ‘a device comprising means A and B’ should not be limited to devices consisting only of components A and B. It means that with respect to the present invention, the only relevant components of the device are A and B. [0008] Similarly, it is to be noticed that the term ‘coupled’, also used in the claims, should not be interpreted as being limitative to direct connections only. Thus, the scope of the expression ‘a device A coupled to a device B’ should not be limited to devices or systems wherein an output of device A is directly connected to an input of device B. It means that there exists a path between an output of A and an input of B which may be a path including other devices or means. [0009] An additional feature of the present invention is defined in claim [0010] Indeed, it can be expected that the transmission quality of the medium in between two multi-carrier modems at a certain frequency does not change abruptly, unless impulse noise disturbs the medium. If the transmission quality of the medium at that certain frequency is measured once during an acquisition mode or initialisation procedure, the measured quality can be used for a long period. In Discrete Multi Tone (DMT) systems such as an Asynchronous Digital Subscriber Line (ADSL) system, the transmission quality of the medium has to be measured as a function of frequency during initialisation of the system to be able to execute the bit allocation procedure: the process wherein each carrier is assigned a number of bits depending on the transmission quality of this carrier. In such systems, the information required to perform the method according to the present invention is available once the system is in operation so that no additional measurements are required to determine the shares of phase errors of different pilot carriers in the clock timing error used for synchronisation. Only the phase errors of the different pilot carriers have to be detected during the tracking mode or normal operation process. [0011] Another advantageous feature of the method according to the present invention is defined in claim [0012] In this way, the clock timing error becomes a linear combination of the phase errors detected for the different pilot carriers so that calculation of the clock timing error involves low mathematical complexity. Via the weights of the different terms in the linear combination, the phase errors get different shares in the clock timing error. These weights, according to the present invention, are dependent on the transmission quality of the respective pilot carriers. [0013] Also an advantageous feature of the present invention is defined in claim [0014] As will be proven later on in this document, a maximum likelihood based approach of the problem of calculating the clock timing error out of phase errors detected for a plurality of pilot tones results in a linear relationship between the weights and the transmission quality of the pilot carriers. [0015] Yet another advantageous feature of the present method is defined in claim [0016] Another result of the maximum likelihood approach set out later on in this document is that, for a particular pilot carrier, the coefficient which has to be multiplied with the transmission quality value to obtain the weight related to that pilot carrier is proportional to the frequency of that pilot carrier or the pilot carrier index in case the frequency is determined thereby. [0017] A further feature of the method according to the present invention is defined by claim [0018] In this way, the weights are normalised. [0019] Still a feature of the present invention is described in claim [0020] Thus, the complete gain of the arrangement that determines the clock timing error is made equal to one. This feature is particularly advantageous in a system where the number of pilot carriers used for synchronisation is adaptive. Independence of the level of the clock timing error from the number of pilot carriers used to determine this clock timing error, obtained by a normalisation as defined in claim [0021] Moreover, a feature of the present invention is defined in claim [0022] Indeed, signal-to-noise ratio values of the different pilot carriers are excellent measures for the transmission quality of the medium between the multi-carrier modems. In an Asymmetric Digital Subscriber Line (ADSL) system operating according to the ANSI Standard T1.413-1995 entitled ‘Network and Customer Installation Interfaces—Asymmetric Digital Subscriber Line (ADSL) Metallic Interface’, a signal-to-noise ratio value is measured for each carrier during initialisation and used for bit allocation. This is indicated in paragraphs 12.6.6, 12.7.8 and 6.5 of the cited ANSI Standard. Alternative implementations of the present invention however may use other transmission quality parameters, for instance the noise level, to determine the shares of the phase errors of different pilot carriers in the clock timing error used for synchronisation. [0023] The above mentioned and other objects and features of the invention will become more apparent and the invention itself will be best understood by referring to the following description of an embodiment taken in conjunction with the accompanying drawings wherein: [0024]FIG. 1 shows a block scheme of a receiving multi-carrier modem RX equipped with an embodiment of the clock timing error determination arrangement ARR according to the present invention; [0025]FIG. 2 shows a block scheme of a receiving multi-carrier modem RX [0026]FIG. 3 shows a block scheme of a receiving multi-carrier modem RX [0027] The multi-carrier receiver RX [0028] The incoming communication line is coupled via hybrid means, filtering and amplifying circuitry and an analogue to digital converter, not shown in FIG. 1, to an input of the skip and duplicate device S/D. An output of the skip and duplicate device S/D is connected to an input of the serial-to-parallel converter S/P and the outputs of this serial-to-parallel converter S/P are coupled to respective inputs of the fast fourier transformer FFT. Each output terminal of the fast fourier transformer FFT is coupled to both an input of the channel analysing device SNR and an input of the rotation device ROTOR. More detailed, a first output of the fast fourier transformer FFT is coupled to the first multiplier MU [0029] The receiver RX [0030] The present invention however is related to the process of sample timing synchronisation, wherein the receiving modem RX [0031] After digitisation and having passed the skip and duplicate device S/D, the digitised multi-carrier signal is serial-to-parallel converted. The serial-to-parallel converter S/P thereto applies subsequent samples of one and the same DMT (Discrete Multi Tone) symbol to subsequent ones of its outputs. The fast fourier transformer FFT in addition converts these samples of one DAT symbol from time domain to frequency domain by executing the well-known Discrete Fourier Transformation. As a result thereof, each signal at an output terminal of the fourier transformer FFT represents a modulated carrier and can be seen as a vector point in a two-dimensional vector plane wherein the modulation constellation represents a set of points. The amplitude and phase that can be associated to this vector point in the two-dimensional vector plane correspond to the amplitude and phase of the modulated carrier at the output of the fast fourier transformer FFT. The rotation device ROTOR, coupled to the fast fourier transformer FFT, has the task to compensate for differences between the clocks in the transmitting modem, not drawn in the figure, and receiving modem RX [0032] Consider the received continuous time multi-carrier signal r(t) at the input of the receiver RX [0033] Herein, the following notation is used: [0034] N: Number of carriers in the DMT signal, i.e. 256 in an ADSL system; [0035] a [0036] g(t): composite channel impulse response, i.e. the channel impulse response that is eventually equalised to reduce intersymbol interference; [0037] t: time;
[0038] : sampling rate; [0039] n(t): additive noise component; [0040] n: sample index; [0041] k: carrier index; [0042] m: DMT symbol index; [0043] ν: number of guardband samples, i.e. the number of redundant samples in a cyclic prefix added to each DMT symbol to compensate for intersymbol interference; [0044] i: square root of −1; [0045] π: pi=3.1415; [0046] ∞: symbol representing infinity; [0047] τe: clock timing error at the output of the arrangement ARR; [0048] τ: estimated time difference at the output of the feedback loop FBL; and [0049] {tilde over (τ)}: time difference or difference in sample timing between the transmitting modem and receiving modem. [0050] After the acquisition mode and assuming no timing error, the output of the fast fourier transformer FFT can be expressed as: [0051] Herein, G [0052] and N [0053] In case of a clock timing difference equal to τ, the output of the fast fourier transformer FFT can be expressed as:
[0054] This expression (3) is correct as long as the clock timing difference τ is smaller than the difference between the channel impulse response duration and the guard time duration. The Cramer-Rao bound is a fundamental lower bound on the estimation of unbiased parameters. Estimation of the clock timing difference τ, denoted by {tilde over (τ)} can be derived from observations of the fast fourier transform outputs. In the assumption that the additive noise contributions at the output of the fast fourier transformer FFT are uncorrelated, the lower bound on the timing error variance can be expressed as:
[0055] Herein E{(τ−{tilde over (τ)}) [0056] In (5) E{|a [0057] This is indicated in paragraph 6.2.1 of the ‘VDSL System Requirements’ with reference T1E1.4/96-153R3, published on Dec. 31, 1996. In expression (6), d equals the length of the transmission cable and K [0058] Herein, K represents the number of outputs of the fast fourier transformer FFT used to produce the clock timing error τ [0059] From (7) it can be concluded that it is advantageous to base the calculation of the clock timing error τ [0060] In a most-likelihood based approach, new timing error estimates are based on snapshots of the log likelihood function L [0061] During tracking mode, the clock timing error determination arrangement ARR produces reliable estimates of the transmitted data sequence while channel gains are known to the receiver (they have been measured during modem initialisation). Hence, at the m'th DMT symbol period, a Data Aided Most Likelihood (DA ML) clock timing error determination arrangement ARR produces the value τ [0062] Herein * denotes the complex cojugate and ℑ denotes the imaginary part. Substitution from (3) into (9) leads to the conclusion that the weight coefficent A [0063] The derived timing error τ [0064] In FIG. 2 a multi-carrier receiver RX [0065] Yet another multi-carrier receiver RX [0066] A first remark is that, although the multi-carrier signal in the above described embodiment is transported over a telephone line, the applicability of the present invention is not restricted by the transmission medium via which the signal is transported. In particular, any connection between the transmitting modem and receiving modem RX, e.g. a cable connection, a satellite connection, a radio link through the air, and so on, may be affected by narrowband noise, and thus the synchronisation procedure can be improved according to the present invention. [0067] The invention also is not only related to ADSL (Asymmetric Digital Subscriber Line) or similar systems wherein DMT (Discrete Multi Tone) modulation is used. A person skilled in the art will be able to adapt the above described embodiment so that it is applicable in any other system wherein a multi-carrier signal is transmitted from a transmitting modem to a receiving modem RX and wherein a plurality of pilot carriers are used for synchronisation purposes during the tracking mode. Systems wherein orthogonal frequency division multiplexing (OFDM) or orthogonally multiplexed quadrature amplitude modulation (OMQAM) is applied for instance are multi-carrier environments wherein the present invention is applicable. [0068] Another remark is that embodiments of the present invention are described above in terms of functional. From the functional description of these blocks, given above, it will be obvious for a person skilled in the art of designing electronic devices how embodiments of these blocks can be manufactured with well-known electronic components. A detailed architecture of the contents of the functional blocks hence is not given. [0069] It is to be noticed that the weights A [0070] It is also noticed that applicability of the present invention is not restricted to digital environments. A person skilled in the art of electronic design knows that analogue equivalents exist for all functional blocks described above so that an analogue version of the present invention can be derived from the above described digital embodiments without inventive contribution. [0071] While the principles of the invention have been described above in connection with specific apparatus, it is to be clearly understood that this description is made only by way of example and not as a limitation on the scope of the invention. Patent Citations
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