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Publication numberUS20040217470 A1
Publication typeApplication
Application numberUS 10/785,709
Publication dateNov 4, 2004
Filing dateFeb 24, 2004
Priority dateFeb 26, 2003
Also published asUS8136238, US20070124928, US20090139085
Publication number10785709, 785709, US 2004/0217470 A1, US 2004/217470 A1, US 20040217470 A1, US 20040217470A1, US 2004217470 A1, US 2004217470A1, US-A1-20040217470, US-A1-2004217470, US2004/0217470A1, US2004/217470A1, US20040217470 A1, US20040217470A1, US2004217470 A1, US2004217470A1
InventorsMichiyoshi Takano
Original AssigneeMichiyoshi Takano
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Circuit substrates, semiconductor devices, semiconductor manufacturing apparatuses, methods for manufacturing circuit substrates, and methods for manufacturing semiconductor devices
US 20040217470 A1
Abstract
A method is provided to control the height of bump electrodes and increase a clearance between edge sections of a semiconductor chip and lead terminals of a tape substrate. By pushing up on a tape substrate by a bonding stage, and applying suction to the tape substrate through a suction groove, boundary portions of a semiconductor chip mounting region are drawn into the suction groove, and curved sections are formed in the tape substrate at locations corresponding to edge sections of a semiconductor chip and inclined sections disposed in outer circumference sections of the curved sections are formed in the tape substrate.
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Claims(22)
What is claimed is:
1. A circuit substrate comprising:
a chip mounting region for mounting a chip;
a mounting substrate which recedes at a boundary of the chip mounting region and inclines in a circumference of the chip mounting region; and
lead terminals on the mounting substrate and extending over the chip mounting region.
2. A semiconductor device comprising:
a circuit substrate having lead terminals formed thereon;
a semiconductor chip connected to the lead terminals through bump electrodes;
a concave section that is provided in the circuit substrate and disposed at a position corresponding to an edge position of the semiconductor chip; and
an inclined section of the mounting substrate in an outer circumferential section of the edge position.
3. A semiconductor device according to claim 2, wherein a boundary between the concave section and the inclined section and a flat section is disposed at a position outside the lead terminals and edge sections of bump electrodes of the semiconductor chip, and inside the edge section of the semiconductor chip.
4. A semiconductor device according to claim 2, wherein the concave section and the inclined section include a region between the bump electrodes and the edge position of the semiconductor chip.
5. A semiconductor manufacturing apparatus comprising:
a bonding stage that supports a circuit substrate;
a mounting device that mounts a semiconductor chip on the circuit substrate;
at least one of a groove and a hole that is provided in the bonding stage at a position corresponding to the edge position of the semiconductor chip; and
an inclined surface of the bonding stage at an outer circumference section of the edge position.
6. A semiconductor manufacturing apparatus according to claim 5, further comprising:
a suction device that is provided at the bonding stage to apply suction to the at least one of the groove and the hole; and
a suction control device that controls the suction timing by the suction device based on a heating state of the circuit substrate.
7. A semiconductor manufacturing apparatus according to claim 5, further comprising a heating device that locally heats a region in the circuit substrate corresponding to the edge position of the semiconductor chip.
8. A semiconductor manufacturing apparatus according to claim 7, wherein the heating device comprises a laser irradiating device.
9. A semiconductor manufacturing apparatus comprising:
a bonding head that retains a semiconductor chip;
a first temperature control device that controls a temperature of the bonding head;
a bonding stage that supports a tape substrate;
a second temperature control device that controls a temperature of the bonding stage;
at least one of a suction groove and a suction hole that is provided in the bonding stage and disposed at a position corresponding to an edge position of the semiconductor chip;
an inclined surface of the bonding stage in an outer circumference section of the edge position;
a vacuum pump that applies suction to the at least one of the suction groove and the suction hole;
a clamp device that clamps the tape substrate;
a first image recognition device that performs image recognition of the semiconductor chip;
a second image recognition device that performs image recognition of the tape substrate;
a first positioning device that positions the bonding stage in XYθ directions based on a result of the image recognition by the second image recognition device;
a second positioning device that positions the bonding head in XYθ directions based on a result of the image recognition by the second image recognition devices;
a first pressing device that presses the bonding stage against the tape substrate, after the bonding stage is positioned by the first positioning device; and
a second pressing device that presses the semiconductor chip retained by the bonding head against the tape substrate, after the bonding head is positioned by the second positioning device.
10. A semiconductor manufacturing apparatus according to claim 9, wherein the at least one of the groove and the hole includes a region between the bump electrodes provided on the semiconductor chip and the edge position of the semiconductor chip.
11. A semiconductor manufacturing apparatus according to claim 9, wherein the at least one of the groove and the hole is chamfered or has rounded corners.
12. A method for manufacturing a semiconductor device, comprising:
a step for supporting a back surface of a circuit substrate by using a bonding stage having at least one of a groove and a hole disposed at a position corresponding to an edge position of a semiconductor chip and an inclined surface provided in an outer circumference section of the edge position;
a step of applying suction to the at least one of the groove and the hole provided in the bonding stage;
a step of mounting the semiconductor chip on the circuit substrate while applying suction to the at least one of the groove and the hole; and
a step of sealing with resin the semiconductor chip mounted on the circuit substrate.
13. A method for manufacturing a semiconductor device, comprising:
a step of coating resin in a region inside inner leads on a circuit substrate;
a step for supporting a back surface of the circuit substrate by using a bonding stage having at least one of a groove and a hole disposed at a position corresponding to an edge position of a semiconductor chip and an inclined surface provided in an outer circumference section of the edge position;
a step of applying suction to the at least one of the groove and the hole provided in the bonding stage; and
a step of mounting the semiconductor chip on the circuit substrate while applying suction to the at least one of the groove and the hole.
14. A method for manufacturing a semiconductor device, comprising:
a step for supporting a back surface of a circuit substrate by using a bonding stage having at least one of a groove and a hole disposed at a position corresponding to an edge position of a semiconductor chip and an inclined surface provided in an outer circumference section of the edge position;
a step of mounting the semiconductor chip on the circuit substrate: and
a step of applying suction to the at least one of the groove and the hole provided in the bonding stage, after mounting the semiconductor chip.
15. A method for manufacturing a semiconductor device according to claim 14, further comprising a step of heating the circuit substrate when applying suction to the at least one of the groove and the hole.
16. A method for manufacturing a semiconductor device comprising:
a step of transferring a circuit substrate having a concave section formed at a position corresponding to an edge position of a semiconductor chip and an inclined section provided in an outer circumference section of the concave section;
a step of mounting the semiconductor chip on the circuit substrate that has been transferred; and
a step of sealing with resin the semiconductor chip that is mounted on the circuit substrate.
17. A method for manufacturing a semiconductor device comprising:
a step of transferring a tape substrate;
a step of clamping the transferred tape substrate;
a step of performing image recognition of the tape substrate;
a step of positioning a bonding stage that is provided with an inclined surface corresponding to an outer circumference position of the edge position of the semiconductor chip in XYθ directions based on a result of the image recognition of the tape substrate;
a step of pressing the positioned bonding stage against a back surface of the tape substrate, and bending the tape substrate along the inclined surface provided in the bonding stage;
a step of applying suction to a region of a semiconductor chip corresponding to the edge position thereof through at least one of a groove and a hole provided in the bonding stage;
a step of performing image recognition of the tape substrate pressed against the bonding stage and the semiconductor chip;
a step of positioning a bonding head that retains the semiconductor chip in XYθ directions based on a result of the image recognition of the tape substrate and the semiconductor chip;
a step of pressing the semiconductor chip that is retained by the bonding head positioned against the tape substrate;
a step of forming the tape substrate by using radiant heat radiating from the bonding head;
a step of releasing the pressing of the bonding head;
a step of releasing the pressing of the bonding stage; and
a step of releasing the clamping.
18. A method for manufacturing a circuit substrate, comprising:
a step of forming lead terminals on a mounting substrate; and
a step of forming a concave section disposed at a position corresponding to an edge position of a semiconductor chip and an inclined section disposed in an outer circumference section of the concave section by metal-molding of the mounting substrate.
19. A semiconductor manufacturing apparatus according to claim 5, wherein the at least one of the groove and the hole includes a region between the bump electrodes provided on the semiconductor chip and the edge position of the semiconductor chip.
20. A semiconductor manufacturing apparatus according to claim 5, wherein the at least one of the groove and the hole is chamfered or has rounded corners.
21. A method for manufacturing a semiconductor device according to claim 12, further comprising a step of heating the circuit substrate when applying suction to the at least one of the groove and the hole.
22. A method for manufacturing a semiconductor device according to claim 13, further comprising a step of heating the circuit substrate when applying suction to the at least one of the groove and the hole.
Description
RELATED APPLICATIONS

[0001] This application claims priority to Japanese Patent Application No. 2003-048817 filed Feb. 26, 2003 which is hereby expressly incorporated by reference herein in its entirety.

BACKGROUND OF THE INVENTION TECHNICAL FIELD

[0002] The present invention relates to circuit substrates, semiconductor devices, semiconductor manufacturing apparatuses, methods for manufacturing circuit substrates, and methods for manufacturing semiconductor devices, and in particular, is favorably applied to FDB(face down bonding) in COF(chip on film).

[0003] CONVENTIONAL TECHNOLOGY

[0004] In conventional semiconductor devices, for example, as described in Japanese Laid-open Patent Application 2001-298046, there is a method to realize FDB in COF through AuAu bonding by application of heat and pressure.

[0005] FIGS. 13(a) and(b) are cross-sectional views showing a conventional method for manufacturing a semiconductor device.

[0006] Referring to FIG. 13(a), Cu wiring layers 112 as inner leads are formed on a tape substrate 111, the circumference of the Cu wiring layer 112 is covered by a protection film 113, and exposed portions of the Cu wiring layers 112 are covered by Au plated layers 114.

[0007] For example, a polyimide film can be used as the tape substrate 111; and for example, a solder resist can be used as the protection film 113.

[0008] On the other hand, pad electrodes 116 are provided on a semiconductor chip 115, the circumference of the pad electrodes 116 is covered by a protection film 117, and Au bump electrodes 118 having a height H2 are formed on the pad electrodes 116.

[0009] For example, Al can be used as the pad electrodes 116; and for example, a silicon oxide film or silicon nitride film can be used as the protection film 117.

[0010] When the semiconductor chip 115 is mounted on the tape substrate 111, the tape substrate 111 is mounted on a bonding stage 101 that is heated, as indicated in FIG. 13(b). Then, while retaining by suction the semiconductor chip by a bonding head 102, the Au bump electrodes 118 are pressed against the Cu wiring layers 112 that are covered by the Au plated layers 114.

[0011] When the Au bump electrodes 118 are pressed against the Cu wiring layers 112 that are covered by the Au plated layers 114, the tape substrate 111 below the Au bump electrodes 118 recedes, and a clearance CL2 between edge sections of the semiconductor chip 115 and the Cu wiring layers 112 covered by the Au plated layers 114 is reduced, such that the edge sections of the semiconductor chip 115 may come in contact with the Au plated layers 114.

[0012] Accordingly, in the conventional semiconductor device, to prevent the edge sections of the semiconductor chip 115 from contacting the Au plated layers 114, the height H2 of the Au bump electrodes 118 is increased.

[0013] For example, when the semiconductor chip 115 is mounted on the tape substrate 111, the clearance CL2 between the edge sections of the semiconductor chip 115 and the Cu wiring layers 112 covered by the Au plated layers 114 becomes to be about 10-12 μm. Accordingly, in order to prevent the edge sections of the semiconductor chip 115 from contacting the Au plated layers 114, the height H2 of the Au bump electrodes 118 is set to about 22.5 μm.

[0014] However, increasing the height H2 of the Au bump electrodes 118 leads to an increase in the cost because about 400-500 Au bump electrodes 118 may be provided per semiconductor chip 115, and results in greater variations in the height H2 of the Au bump electrodes 118, which leads to a problem of deteriorated connection reliability of the Au bump electrodes 118.

[0015] Accordingly, it is an object of the present invention to provide circuit substrates, semiconductor devices, semiconductor manufacturing apparatuses, methods for manufacturing circuit substrates, and methods for manufacturing semiconductor devices, which can control the height of bump electrodes, and increase the clearance between edge sections of a semiconductor chip and lead terminals of a circuit substrate.

SUMMARY

[0016] To solve the problems described above, a circuit substrate according to a first aspect is characterized in comprising: a chip mounting region for mounting a chip; a mounting substrate formed to recede at a boundary of the chip mounting region and to incline in a -circumference of the chip mounting region; and lead terminals that are formed on the mounting substrate and lay over the chip mounting region.

[0017] Accordingly, without increasing the separation between the mounting substrate and the chip surface, the mounting substrate can be kept away from the edge sections of the chip.

[0018] Consequently, without increasing the height of the electrodes that connect the chip and the mounting substrate, the edge sections of the chip can be prevented from contacting the mounting substrate, and the connection reliability between the chip and the mounting substrate can be improved.

[0019] Also, a semiconductor device according to a second aspect is characterized in comprising: a circuit substrate having lead terminals formed thereon; a semiconductor chip connected to the lead terminals through bump electrodes; a concave section that is provided in the circuit substrate and disposed at a position corresponding to an edge position of the semiconductor chip; and an inclined section that is provided by inclining the mounting substrate in an outer circumferential section of the edge position.

[0020] Accordingly, the circuit substrate can be curved and bent in a manner that the circuit substrate extends away from the edge section of the semiconductor chip, and the edge section of the semiconductor chip can be prevented from contacting the circuit substrate without increasing the height of the bump electrodes.

[0021] Consequently, the material used for the bump electrodes can be reduced, such that the cost can be lowered; and the uniformity in the height of the bump electrodes is improved such that the connection reliability between the semiconductor chip and the circuit substrate can be improved.

[0022] Also, a semiconductor device according to a third aspect is characterized in that a boundary between the concave section and the inclined section and a flat section is disposed at a position outside the lead terminals and edge sections of bump electrodes of the semiconductor chip, and inside the edge section of the semiconductor chip.

[0023] Accordingly, by providing the concave section and the inclined section in the circuit substrate, the lead terminals on the circuit substrate can be kept away from the edge sections of the semiconductor chip, such that short-circuiting between the semiconductor chip and the lead terminals can be prevented even when the edge sections of the semiconductor chip come in contact with the circuit substrate.

[0024] Also, a semiconductor device according to a fourth aspect is characterized in that the concave section and the inclined section include a region between the bump electrodes and the edge position of the semiconductor chip.

[0025] Consequently, even when variations occur in the locations of the concave section and the inclined section, the mounting substrate can be kept away from the edge sections of the semiconductor chip, and the edge sections of the semiconductor chip can be prevented from contacting the circuit substrate, without affecting the height of the bump electrodes.

[0026] Also, a semiconductor manufacturing apparatus according to a fifth aspect is characterized in comprising: a bonding stage that supports a circuit substrate; a mounting device that mounts a semiconductor chip on the circuit substrate; at least one of a groove and a hole that is provided in the bonding stage at a position corresponding to the edge position of the semiconductor chip; and an inclined surface that is provided by inclining the bonding stage at an outer circumference section of the edge position.

[0027] Accordingly, by mounting the circuit substrate on the bonding stage, the semiconductor chip can be mounted, and the concave section disposed at a location corresponding to the edge position of the semiconductor chip and the inclined section disposed in an outer circumference section thereof can be collectively formed in the circuit substrate.

[0028] Consequently, while restraining the manufacturing process and the circuit substrate from becoming more complex, the clearance between the edge sections of the semiconductor chip and the lead terminals on the circuit substrate can be increased, and the height of the bump electrodes can be reduced, such that the cost can be reduced, the uniformity in the height of the bump electrodes can be improved, and the connection reliability between the semiconductor chip and the circuit substrate can be improved.

[0029] Also, a semiconductor manufacturing apparatus according to a sixth aspect is characterized in comprising: a suction device that is provided at the bonding stage to apply suction to the groove or the hole; and a suction control device that controls the suction timing by the suction device based on a heating state of the circuit substrate.

[0030] Accordingly, while avoiding the influence caused by deformation of the circuit substrate, the circuit substrate can be softened, and portions of the circuit substrate corresponding to the edge positions of the semiconductor chip can be drawn into the groove or the hole, such that the concave section disposed at positions corresponding to the edge positions of the semiconductor chip and the inclined section disposed in the outer circumference section thereof can be effectively formed.

[0031] Also, a semiconductor manufacturing apparatus according to a seventh aspect is characterized in further comprising a heating device that locally heats a region in the circuit substrate corresponding to the edge position of the semiconductor chip.

[0032] Accordingly, while inhibiting the softening of the entire circuit substrate, regions corresponding to the edge positions of the semiconductor chip can be effectively softened; and while restraining deteriorations in the mounting accuracy of the semiconductor chip, the concave sections disposed at locations corresponding to the edge positions of the semiconductor chip and the inclined section disposed in the outer circumference section thereof can be effectively formed.

[0033] Also, a semiconductor manufacturing apparatus according to an eighth aspect is characterized in that the heating device is a laser irradiating device.

[0034] Accordingly, areas corresponding to the edge positions of the semiconductor chip can be locally softened, such that, while mounting of the semiconductor chip is made possible, the concave section disposed at locations corresponding to the edge positions of the semiconductor chip and inclined section disposed in an outer circumference section thereof can be effectively formed.

[0035] A semiconductor manufacturing apparatus according to a ninth aspect is characterized in comprising: a bonding head that retains a semiconductor chip; a first temperature control device that control the temperature of the bonding head; a bonding stage that supports a tape substrate; a second temperature control device that controls the temperature of the bonding stage; at least one of a suction groove and a suction hole that is provided in the bonding stage and disposed at a position corresponding to an edge position of the semiconductor chip; an inclined surface that is provided by inclining the bonding stage in an outer circumference section of the edge position; a vacuum pump that applies suction to the suction groove or the suction hole; a clamp device that clamps the tape substrate; a first image recognition device that performs image recognition of the semiconductor chip; a second image recognition device that performs image recognition of the tape substrate; a first positioning device that positions the bonding stage in XYθ directions based on a result of the image recognition by the second image recognition device; a second positioning device that positions the bonding head in XYθ directions based on a result of the image recognition by the first and second image recognition devices; a first pressing device that presses the bonding stage against the tape substrate, after the bonding stage is positioned by the first positioning device; and a second pressing device that presses the semiconductor chip retained by the bonding head against the tape substrate, after the bonding head is positioned by the second positioning device.

[0036] Accordingly, while the tape substrate can be softened, the tape substrate can be accurately mounted on the bonding stage; and by drawing portions of the tape substrate into the groove or the hole formed in the bonding stage while the bonding stage is pressed against the tape substrate, the concave section disposed at locations corresponding to the edge positions of the semiconductor chip and the inclined section disposed in the outer circumference section thereof can be accurately formed in the tape substrate.

[0037] Consequently, without deteriorating the mounting accuracy, the clearance between the edge sections of the semiconductor chip and the lead terminals of the tape substrate can be increased; and the height of the bump electrodes can be reduced such that the cost can be reduced, and the uniformity in the height of the bump electrodes can be improved such that the connection reliability between the semiconductor chip and the tape substrate can be improved.

[0038] Also, a semiconductor manufacturing apparatus according to a tenth aspect is characterized in that the groove or the hole includes a region between the bump electrodes provided on the semiconductor chip and the edge position of the semiconductor chip.

[0039] Accordingly, even when a variation occurs in the location of the semiconductor chip, the circuit substrate can be kept away from the edge sections of the semiconductor chip, and the edge sections of the semiconductor chip can be prevented from contacting the circuit substrate, without affecting the height of the bump electrodes,

[0040] Also, a semiconductor manufacturing apparatus according to an eleventh aspect is characterized in that the groove or the hole is chamfered or processed with corner rounding.

[0041] Accordingly, when a portion of the circuit substrate is drawn into the groove or the hole formed in the bonding stage, the circuit substrate can be prevented from being damaged.

[0042] Also, a method for manufacturing a semiconductor device according to a twelfth aspect is characterized in comprising: a step for supporting a back surface of a circuit substrate by using a bonding stage having at least one of a groove and a hole disposed at a position corresponding to an edge position of a semiconductor chip and an inclined surface provided in an outer circumference section of the edge position; a step of applying suction to the groove or the hole provided in the bonding stage; a step of mounting the semiconductor chip on the circuit substrate while applying suction to the groove or the hole; and a step of sealing with resin the semiconductor chip mounted on the circuit substrate.

[0043] Accordingly, the semiconductor chip can be mounted on the circuit substrate in a state in which the circuit substrate is fixed to the bonding stage, and the concave section disposed at locations corresponding to the edge positions of the semiconductor chip and the inclined section disposed in the outer circumference section thereof can be accurately formed in the circuit substrate.

[0044] Consequently, the semiconductor chip can be accurately mounted on the circuit substrate, and the clearance between the edge sections of the semiconductor chip and the lead terminals of the circuit substrate can be increased, such that the connection reliability between the semiconductor chip and the circuit substrate can be improved, and poor contacts of the semiconductor chip can be reduced.

[0045] Also, a method for manufacturing a semiconductor device according to a thirteenth aspect is characterized in comprising: a step of coating resin in a region inside of inner leads on a circuit substrate; a step for supporting a back surface of the circuit substrate by using a bonding stage having at least one of a groove and a hole disposed at a position corresponding to an edge position of a semiconductor chip and an inclined surface provided in an outer circumference section of the edge position; a step of applying suction to the groove or the hole provided in the bonding stage; and a step of mounting the semiconductor chip on the circuit substrate while applying suction to the groove or the hole.

[0046] Accordingly, the semiconductor chip can be mounted on the circuit substrate in a state in which the circuit substrate is fixed to the bonding stage, and the concave section disposed at locations corresponding to the edge positions of the semiconductor chip and the inclined section disposed in the outer circumference section thereof can be accurately formed in the circuit substrate; and by mounting the semiconductor chip on the circuit substrate, the semiconductor chip can be sealed with resin.

[0047] Accordingly, the manufacturing process is simplified, and the clearance between the edge sections of the semiconductor chip and the lead terminals on the circuit substrate can be increased, such that the connection reliability between the semiconductor chip and the circuit substrate can be improved, and poor contacts of semiconductor chips can be reduced.

[0048] Also, a method for manufacturing a semiconductor device according to a fourteenth aspect is characterized in comprising: a step for supporting a back surface of a circuit substrate by using a bonding stage having at least one of a groove and a hole disposed at a position corresponding to an edge position of a semiconductor chip and an inclined surface provided in an outer circumference section of the edge position; a step of mounting the semiconductor chip on the circuit substrate: and a step of applying suction to the groove or the hole provided in the bonding stage, after mounting the semiconductor chip.

[0049] Accordingly, while the semiconductor chip is allowed to be mounted on the circuit substrate, portions of the circuit substrate can be drawn into the groove or the hole provided in the bonding stage in a state in which the circuit substrate is sufficiently softened, and the concave section disposed at locations corresponding to the edge positions of the semiconductor chip and the inclined section disposed in the outer circumference section thereof can be effectively formed in the circuit substrate.

[0050] Consequently, the clearance between the edge sections of the semiconductor chip and the lead terminals of the circuit substrate can be increased, and the height of the bump electrodes can be reduced such that the cost of the bump electrodes can be reduced; and the uniformity in the height of the bump electrodes can be improved such that the connection reliability between the semiconductor chip and the circuit substrate can be improved.

[0051] Also, a method for manufacturing a semiconductor device according to a fifteenth aspect is characterized in further comprising a step of heating the circuit substrate when applying suction to the groove or the hole.

[0052] Accordingly, the circuit substrate can be softened, and portions of the circuit substrate can be effectively drawn into the groove or the hole, such that the concave section disposed at locations corresponding to the edge positions of the semiconductor chip and the inclined section disposed in the circumference section thereof can be effectively formed.

[0053] Also, a method for manufacturing a semiconductor device according to a sixteenth aspect is characterized in comprising: a step of transferring a circuit substrate having a concave section formed at a position corresponding to an edge position of a semiconductor chip and an inclined section provided in an outer circumference section of the concave section; a step of mounting the semiconductor chip on the circuit substrate that has been transferred; and a step of sealing with resin the semiconductor chip that is mounted on the circuit substrate.

[0054] Accordingly, the semiconductor chip can be mounted by using the circuit substrate having the concave section formed therein at locations corresponding to the edge positions of the semiconductor chip and the inclination in the outer circumference section of the concave section, and the clearance between the edge sections of the semiconductor chip and the circuit substrate can be increased.

[0055] Consequently, the edge sections of the semiconductor chip can be prevented from contacting the circuit substrate without increasing the height of the bump electrodes; and the material used for the bump electrodes can be reduced such that the cost can be reduced, and the uniformity in the height of the bump electrodes can be improved such that the connection reliability between the semiconductor chip and the circuit substrate can be improved.

[0056] Also, a method for manufacturing a semiconductor device according to a seventeenth aspect is characterized in comprising: a step of transferring a tape substrate; a step of clamping the transferred tape substrate; a step of performing image recognition of the tape substrate; a step of positioning a bonding stage that is provided with an inclined surface corresponding to an outer circumference position of the edge position of the semiconductor chip in XYθ directions based on a result of the image recognition of the tape substrate; a step of pressing the positioned bonding stage against a back surface of the tape substrate, and bending the tape substrate along the inclined surface provided in the bonding stage; a step of applying suction to a region of a semiconductor chip corresponding to the edge position thereof through a groove or a hole provided in the bonding stage; a step of performing image recognition of the tape substrate pressed against the bonding stage and the semiconductor chip; a step of positioning a bonding head that retains the semiconductor chip in XYθ directions based on a result of the image recognition of the tape substrate and the semiconductor chip; a step of pressing the semiconductor chip that is retained by the bonding head positioned against the tape substrate; a step of forming the tape substrate by using radiant heat radiating from the bonding head; a step of releasing pressing of the bonding head; a step of releasing pressing of the bonding stage; and a step of releasing the clamping.

[0057] Accordingly, the tape substrate can be accurately mounted on the bonding stage, and areas of the tape substrate adjacent to the edge positions of the semiconductor chip can be effectively softened.

[0058] Consequently, by drawing portions of the tape substrate into the groove or the hole formed in the bonding stage, deformations of the entire tape substrate can be inhibited, and the concave sections disposed at locations corresponding to the edge positions of the semiconductor chip and the inclined section disposed in the outer circumference section thereof can be accurately formed in the tape substrate.

[0059] As a result, while suppressing deteriorations in the mounting accuracy and restraining the manufacturing process from becoming more complex, the clearance between the edge sections of the semiconductor chip and the lead terminals on the circuit substrate can be increased, and the height of the bump electrodes can be reduced, such that the cost can be reduced, the uniformity in the height of the bump electrodes can be improved, and the connection reliability between the semiconductor chip and the tape substrate can be improved.

[0060] Also, a method for manufacturing a circuit substrate according to an eighteenth aspect is characterized in comprising: a step of forming lead terminals on a mounting substrate; and a step of forming a concave section disposed at a position corresponding to an edge position of a semiconductor chip and an inclined section disposed in an outer circumference section of the concave section by metal-molding of the mounting substrate.

[0061] Accordingly, while restraining the manufacturing process from becoming more complex, the concave section disposed at locations corresponding to the edge positions of the semiconductor chip and the inclined section disposed in the outer circumference section of the concave section can be stably formed in the circuit substrate; and while suppressing deteriorations in the throughput, the clearance between the edge sections of the semiconductor chip and the lead terminals of the circuit substrate can be increased.

BRIEF DESCRIPTION OF THE DRAWINGS

[0062]FIG. 1 schematically shows a perspective view of the structure of a semiconductor manufacturing device in accordance with a first embodiment of the present invention.

[0063]FIG. 2 is a flowchart indicating a method for manufacturing a semiconductor device in accordance with the first embodiment of the present invention.

[0064]FIG. 3 is a timing chart indicating timings of vacuum suction in accordance with an embodiment of the present invention.

[0065] FIGS. 4(a) and(b) are cross-sectional views indicating a method for manufacturing a semiconductor device in accordance with a second embodiment of the present invention.

[0066] FIGS. 5(a)-(c) are cross-sectional views indicating the method for manufacturing a semiconductor device in accordance with the second embodiment of the present invention.

[0067] FIGS. 6(a) and(b) are cross-sectional views indicating a method for manufacturing a semiconductor device in accordance with a third embodiment of the present invention.

[0068] FIGS. 7(a) and(b) are cross-sectional views indicating the method for manufacturing a semiconductor device in accordance with the third embodiment of the present invention.

[0069]FIG. 8 schematically shows a perspective view of the structure of a semiconductor manufacturing device in accordance with a fourth embodiment of the present invention.

[0070]FIG. 9 is a flowchart indicating a method for manufacturing a semiconductor device in accordance with the fourth embodiment of the present invention.

[0071] FIGS. 10(a) and(b) are cross-sectional views indicating a method for manufacturing a semiconductor device in accordance with a fifth embodiment of the present invention.

[0072] FIGS. 11(a) and(b) are cross-sectional views indicating the method for manufacturing a semiconductor device in accordance with the fifth embodiment of the present invention.

[0073] FIGS. 12(a) and(b) are cross-sectional views indicating the method for manufacturing a semiconductor device in accordance with the fifth embodiment of the present invention.

[0074] FIGS. 13(a) and(b) are cross-sectional views indicating a conventional method for manufacturing a semiconductor device.

DETAILED DESCRIPTION

[0075] A semiconductor device and its manufacturing method in accordance with an embodiment of the present invention will be described below with reference to the accompanying drawings.

[0076]FIG. 1 schematically shows a perspective view of the structure of a semiconductor manufacturing device in accordance with a first embodiment of the present invention.

[0077] In FIG. 1, a tape substrate 1 is provided with a semiconductor chip mounting region 2 for mounting a semiconductor chip 4, and inner leads 3 formed in a manner to extend over the semiconductor chip mounting region 2. The tape substrate 1 can be composed of, for example, a polyimide film, and the inner leads 3 can be composed of, for example, Cu wiring layers plated with Au.

[0078] Also, above the tape substrate 1, a bonding head 12 that sticks by suction to a semiconductor chip 4 is provided, and a heater 11 is attached to the bonding head 12. The bonding head 12 is connected to a vacuum pump 14 that applies suction to the semiconductor chip 4, and the heater 11 is connected to a temperature control device 13 that controls the temperature of the bonding head 12.

[0079] Also, above the tape substrate 1, a camera 20 a that performs image recognition of the tape substrate 1 and the semiconductor chip 4 is provided, and the position of the bonding head 12 in its X and Y directions and rotation angle θ within the X-Y plane are controlled based on the image recognition result obtained by the camera 20 a.

[0080] Further, below the tape substrate 1, a bonding stage 16 that fixes the semiconductor chip mounting region 2 of the tape substrate 1 is provided. A suction groove 17 is provided in the bonding stage 16, wherein the suction groove 17 is disposed at a position corresponding to the boundary of the semiconductor chip mounting region 2. Also, an inclined surface 16 a is provided in an outer circumference section of the suction groove 17.

[0081] Further, the bonding stage 16 is connected to a vacuum pump 18 that applies suction to the suction groove 17, the bonding stage 16 is provided with a heater 15, and the heater 15 is connected to a temperature control device 19 that controls the temperature of the bonding stage 16.

[0082] Also, below the tape substrate 1, a camera 20 b that performs image recognition of the tape substrate 1 is provided, and the position of the bonding stage 16 in its X and Y directions and rotation angle θ within the X-Y plane are controlled based on the image recognition result obtained by the camera 20 b.

[0083] Further, above and below the tape substrate 1, tape pressing frames 21 a and 21 b are provided, respectively, which clamp the tape substrate 1 by sandwiching circumferential areas around the semiconductor chip mounting region 2 from above and below.

[0084] It is noted that, in the embodiment shown in FIG. 1, one method in which the suction groove 17 is provided on the bonding stage 16 is indicated. However, suction holes may be disposed at locations corresponding to the boundary of the semiconductor chip mounting region 2, and the suction groove or the suction holes may be disposed at areas corresponding to the regions where the inner leads 3 are present.

[0085]FIG. 2 is a flowchart indicating a method for manufacturing a semiconductor device in accordance with the first embodiment of the present invention.

[0086] Referring to FIG. 2, the heater 11 is turned on, and the temperature of the bonding head 12 is adjusted by the temperature control device 13; and the vacuum pump 14 is turned on, such that the semiconductor chip 4 is retained by suction by the bonding head 12. Also, the heater 15 is turned on, and the temperature of the bonding stage 16 is controlled by the temperature control device 19.

[0087] Then, when the tape substrate 1 is transferred, the tape pressing frame 21 a is lowered, and the tape pressing frame 21 b is raised, to thereby sandwich the circumference area of the semiconductor chip mounting region 2 from above and below, thereby clamping the tape substrate 1(step S1).

[0088] Here, by clamping the tape substrate 1 by using the tape pressing frames 21 a and 21 b, the semiconductor chip mounting region 2 of the tape substrate 1 can be fixed flat without supporting the tape substrate 1 by the bonding stage 16.

[0089] Consequently, the image recognition of the tape substrate 1 can be accurately conducted, and the bonding stage 16 can be accurately positioned. Also, since the bonding stage 16 can be moved in its θ direction, positional deviations of the tape substrate 1 in the θ direction can also be accommodated.

[0090] Next, when the positioning of the bonding stage 16 is completed, the bonding stage 16 is raised, and the bonding stage 16 is pressed against the back surface of the tape substrate 1; and the vacuum pump 18 is turned on, to apply suction to the tape substrate 1(step S4).

[0091] Here, since the suction groove 17 is disposed at a location corresponding to the boundary of the semiconductor chip mounting region 2, the boundary area of the semiconductor chip mounting region 2 of the tape substrate 1 can be effectively suctioned.

[0092] Also, the bonding stage 16 is provided with the inclined area 16 a in the outer circumference section of the suction groove 17, such that the tape substrate 1 can be bent at the boundary of the semiconductor chip mounting region 2 by pushing the back surface of the tape substrate 1 upward with the bonding stage 16.

[0093] Next, the camera 20 a is moved into the frame of the tape pressing frame 21 a, and image recognition of the tape substrate 1 and the semiconductor chip 4 is conducted by using the camera 20 a (step S5, S6). Then, based on the image recognition result of the tape substrate 1 and the semiconductor chip 4, the position of the bonding head 12 is aligned in its XYθ directions.

[0094] Next, when the positioning of the bonding head 12 is complete, the bonding head 12 is lowered, and the semiconductor chip 4 that is retained by suction by the bonding stage 16 is mounted on the tape substrate 1(step S7).

[0095] Next, by using radiant heat radiating from the bonding head 12, the tape substrate 1 is softened, and a boundary area of the semiconductor chip mounting region 2 that is suctioned at the suction groove 17 is drawn into the suction groove 17, such that the boundary position of the semiconductor chip mounting region 2 is curved(step S8), and an inclined section is formed in the outer circumference section of the semiconductor chip mounting region 2(step S8).

[0096] By curving the boundary position of the semiconductor chip mounting region 2 and bending the outer circumference section of the semiconductor chip mounting region 2, the tape substrate 1 can be separated from the edge sections of the semiconductor chip 4 when the semiconductor chip 4 is mounted on the tape substrate 1, and the clearance between the edge sections of the semiconductor chip 4 and the tape substrate 1 can be increased.

[0097] Also, by using radiant heat radiating from the bonding head 12, the boundary area of the semiconductor chip mounting region 2 can be effectively softened, such that deformation of the entire tape substrate 1 by heat can be inhibited, and deterioration of the mounting accuracy of the semiconductor chip 4 can be suppressed.

[0098] Next, upon completion of the forming of the tape substrate 1, the bonding head 12 is raised(step S9), and the bonding stage 16 is lowered (step S10), to thereby release the clamping of the tape substrate 1(step S11), and the tape substrate 1 is transferred(step S12).

[0099] It is noted that the timing of vacuum suction by the suction groove 17 can be adjusted in view of the softened state and/or deformed state of the tape substrate 1.

[0100]FIG. 3 is a timing chart indicating timings of vacuum suction in accordance with an embodiment of the present invention.

[0101] Referring to FIG. 3, after the bonding stage 16 is raised, and before image recognition of the tape substrate 1 is conducted, vacuum suction is applied to the tape substrate 1 through the suction groove 17; and then, after the bonding head 12 is raised, and before the bonding stage 16 is lowered, the vacuum suction is released.

[0102] Accordingly, image recognition of the tape substrate 1 can be conducted in a state in which the tape substrate 1 is fixed on the bonding stage 16, such that the positioning accuracy of the bonding stage 16 can be improved.

[0103] Next, referring to FIG. 3(b), after the positioning of the bonding stage 16 is finished, and before the bonding stage 16 is raised, vacuum suction is applied to the tape substrate 1 through the suction groove 17; and then after the bonding head 12 is raised, and before the bonding stage 16 is lowered, the vacuum suction is released.

[0104] Consequently, before the tape substrate 1 starts deforming by the heat of the bonding stage 16, the tape substrate 1 can be fixed onto the bonding stage 16, and image recognition of the tape substrate 1 can be performed in a state in which the tape substrate 1 is affixed to the bonding stage 16, such that the positioning accuracy of the bonding stage 16 can be further improved.

[0105] As indicate in FIG. 3(c), while the bonding stage 16 is raised as in FIG. 3(b), vacuum suction can be applied to the tape substrate 1.

[0106] Next, referring to FIG. 3(d), after image recognition of the semiconductor chip 4 is performed, and before the bonding head 12 is lowered, vacuum suction is applied to the tape substrate 1 through the suction groove 17; and after the bonding head 12 is raised, and before the bonding stage 16 is lowered, the vacuum suction is released.

[0107] Consequently, while the tape substrate 1 is softened by radiant heat radiating from the bonding head 12, portions of the tape substrate 1 can be drawn into the suction groove 17, such that the tape substrate 1 can be effectively curved at portions corresponding to the edge sections of the semiconductor chip 4.

[0108] Next, referring to FIG. 3(e), after the bonding head 12 is lowered, and before the bonding head 12 is raised, vacuum suction is applied to the tape substrate 1 through the suction groove 17; and after the bonding head 12 is raised, and before the bonding stage 16 is lowered, the vacuum suction is released.

[0109] Consequently, while the tape substrate 1 is softened by radiant heat radiating from the bonding head 12, portions of the tape substrate 1 can be drawn into the suction groove 17, such that the tape substrate 1 can be effectively curved at portions corresponding to the edge sections of the semiconductor chip 4.

[0110] As indicated in FIG. 3(f) through FIG. 3(h), after the bonding head 12 is lowered, as in FIG. 3(a) through FIG. 3(c), and before the bonding head 12 is raised, the vacuum suction can be released. Alternatively, as indicated in FIG. 3(i) through FIG. 3(k), the vacuum suction can be released while raising the bonding head 12.

[0111] Consequently, the amount of radiant heat from the bonding head 12 radiated onto the tape substrate 1 can be controlled, such that the amount of portions of the tape substrate 1 drawn into the suction groove 17 can be readily adjusted.

[0112] Also, as indicated in FIG. 3(l), without applying vacuum suction to the tape substrate 1 to be drawn into the suction groove 17, portions of the tape substrate 1 can be bent toward the suction groove 17 by the radiant heat of the bonding head 12.

[0113]FIGS. 4 and 5 are cross-sectional views indicating a method for manufacturing a semiconductor device in accordance with a second embodiment of the present invention.

[0114] Referring to FIG. 4(a), Cu wiring layers 32 as inner leads are formed on a tape substrate 31, the circumference of the Cu wiring layer 32 is covered by a protection film 33, and exposed portions of the Cu wiring layers 32 are covered by Au plated layers 34.

[0115] For example, a polyimide film can be used as the tape substrate 31; and a solder resist can be used as the protection film 33, for example.

[0116] On the other hand, pad electrodes 36 are provided on a semiconductor chip 35, the circumference of the pad electrodes 36 is covered by a protection film 37, and Au bump electrodes 38 having a height H1 are formed on the pad electrodes 36.

[0117] For example, Al can be used as the pad electrodes 36; and for example, a silicon oxide film or silicon nitride film can be used as the protection film 37. Also, instead of the Au bump electrodes 38, Cu bump electrodes or Ni bump electrodes that are processed with coating such as Au plating or solder plating, or solder bumps may be used.

[0118] Then, when the tape substrate 31 is transferred, the tape pressing frame 21 a is lowered, and the tape pressing frame 21 b is raised, thereby clamping the tape substrate 31.

[0119] Then, while the bonding stage 16 is heated by the heater 15, the bonding stage 16 is pressed against the tape substrate 31, to push up the tape substrate 31 such that the tape substrate 31 is brought into contact with the inclined surface 16 a of the bonding stage 16.

[0120] When pressing the bonding stage 16 against the tape substrate 31, the bonding stage 16 is positioned such that edge sections of the semiconductor chip 35 are positioned over the suction groove 17.

[0121] Here, by clamping the tape substrate 21 by using the tape pressing frames 21 a and 21 b, the tape substrate 1 can be fixed flat without supporting the tape substrate 1 by the bonding stage 16, such that the bonding stage 16 can be accurately positioned.

[0122] Also, the suction groove 17 can be disposed at positions where the tape surface on which Au bump electrodes 38 are disposed does not recede, and the tape surface can recede at the edge sections of the semiconductor chip 35. For example, a region between the Au bump electrodes 38 and the edge positions of the semiconductor chip 35 may be disposed over the suction groove 17. Also, instead of the suction groove 17, suction holes may be provided, or suction grooves and suction holes may be mixed and disposed.

[0123] Then, as indicated in FIG. 4(b), by pushing up the tape substrate 31 by the bonding stage 16, as well as applying suction to the tape substrate 31 through the suction groove 17, boundary portions of the semiconductor chip mounting region are drawn into the suction groove 17, curved portions 31a are formed in the tape substrate 31 at positions corresponding to the edge sections of the semiconductor chip 35, and inclined sections 31 b disposed in the outer circumference of the curved sections 31 a are formed in the tape substrate 31.

[0124] Then, as indicated in FIG. 5(a), the semiconductor chip 35 that is retained by suction by the bonding head 12 is transferred onto the tape substrate 31, and the Au bump electrodes 38 are pressed against the Cu wiring layers 32 that are covered with the Au plated layers 34, to thereby bond the Au bump electrodes 38 to the Au plated layers 34.

[0125] Then, as indicated in FIG. 5(b), the bonding head 12 and the bonding stage 16 are removed, and the clamping by the tape pressing frames 21 a and 21 b is released.

[0126] Then, as indicate in FIG. 5(c), resin 39 is injected in areas surrounding the semiconductor chip 35 that is mounted on the tape substrate 31, to thereby seal the semiconductor chip 35.

[0127] Here, since the curved portions 31 a are formed in the tape substrate 31 at locations corresponding to the edge sections of the semiconductor chip 35, and the inclined sections 31 b are formed in the outer circumference section of the curved sections 31 a, the tape substrate 31 can escape in a manner that the tape substrate 31 can be kept away from the edge sections of the semiconductor chip 35. Accordingly, even when the tape substrate 31 recedes at areas below the Au bump electrodes 38, a clearance CL1 between the edge sections of the semiconductor chip 35 and the tape substrate 31 can be secured.

[0128] Also, before the semiconductor chip 35 is mounted on the tape substrate 31, suction is applied to the tape substrate 31 through the suction groove 17. Consequently, the semiconductor chip 35 can be mounted on the tape substrate 31 in a state in which the tape substrate 31 is fixed on the bonding stage 16, and the curved portions 31 a disposed at positions corresponding to the edge positions of the semiconductor chip 35 and the inclined sections 31 b disposed in the outer circumference section of the curved sections 31 a can be accurately formed in the tape substrate 31.

[0129] Consequently, the semiconductor chip 35 can be accurately mounted on the tape substrate 31 and the height H1 of the Au bump electrodes 38 can be lowered, such that the cost can be reduced, the connection reliability between the semiconductor chip 35 and the tape substrate 31 can be improved, and poor contacts of the semiconductor chip 35 can be reduced.

[0130]FIGS. 6 and 7 are cross-sectional views indicating a method for manufacturing a semiconductor device in accordance with a third embodiment of the present invention.

[0131] Referring to FIG. 6(a), Cu wiring layers 42 as inner leads are formed on a tape substrate 41, the circumference of the Cu wiring layer 42 is covered by a protection film 43, and exposed portions of the Cu wiring layers 42 are covered by Au plated layers 44.

[0132] On the other hand, pad electrodes 46 are provided on a semiconductor chip 45, the circumference of the pad electrodes 46 is covered by a protection film 47, and Au bump electrodes 48 are formed on the pad electrodes 46.

[0133] Then, when the tape substrate 41 is transferred, the tape pressing frame 21 a is lowered, and the tape pressing frame 21 b is raised, thereby clamping the tape substrate 41.

[0134] Then, while the bonding stage 16 is heated by the heater 15, the bonding stage 16 is pressed against the tape substrate 31, to push up the tape substrate 41 such that the tape substrate 41 is brought into contact with the inclined surface 16 a of the bonding stage 16, and sealing resin 49 is coated inside the Cu wiring layers 42.

[0135] When pressing the bonding stage 16 against the tape substrate 41, the bonding stage 16 is positioned such that edge sections of the semiconductor chip 45 are positioned over the suction groove 17.

[0136] Then, as indicated in FIG. 6(b), while pushing up the tape substrate 41 by the bonding stage 16, and applying suction to the tape substrate 41 through the suction groove 17, boundary portions of the semiconductor chip mounting region are drawn into the suction groove 17, such that curved portions 41 a are formed in the tape substrate 41 at positions corresponding to the edge sections of the semiconductor chip 45, and inclined sections 41 b disposed in the outer circumference section of the curved sections 41 a are formed in the tape substrate 41.

[0137] Then, as indicated in FIG. 7(a), the semiconductor chip 45 that is retained by suction by the bonding head 12 is transferred onto the tape substrate 41, and the Au bump electrodes 48 are pressed against the Cu wiring layers 42 that are covered with the Au plated layers 44, to thereby bond the Au bump electrodes 48 to the Au plated layers 44, and areas around the semiconductor chip 45 mounted on the tape substrate 51 are sealed with sealing resin 49.

[0138] Then, as indicated in FIG. 7(b), the bonding head 12 and the bonding stage 16 are removed, and the clamping by the tape pressing frames 21 a and 21 b is released.

[0139] Here, in the tape substrate 41, curved sections 41 a are formed at positions corresponding to the edge sections of the semiconductor chip 45, and inclined sections 41 b are formed in the outer circumference section of the curved sections 41 a. Accordingly, even when the tape substrate 41 recedes at areas below the Au bump electrodes 48, a clearance between the edge sections of the semiconductor chip 45 and the tape substrate 41 can be secured.

[0140] Also, through mounting the semiconductor chip 45 on the tape substrate 41 after coating the sealing resin 49 on the tape substrate 41, the semiconductor chip 45 can be sealed with the sealing resin 49 at the time when the Au bump electrodes 48 and the Au plated layers 44 are connected together.

[0141] For this reason, there is no need to seal the semiconductor chip 45 with sealing resin after the semiconductor chip 45 is mounted on the tape substrate 41, the clearance between the edge sections of the semiconductor chip 45 and the tape substrate 41 can be increased, the manufacturing process is simplified, the connection reliability between the semiconductor chip 45 and the tape substrate 41 can be improved, and poor contacts of the semiconductor chip 45 can be reduced.

[0142]FIG. 8 schematically shows a perspective view of the structure of a semiconductor manufacturing device in accordance with a fourth embodiment of the present invention.

[0143] In FIG. 8, a tape substrate 51 is provided thereon with a semiconductor chip mounting region 52 for mounting a semiconductor chip 54, and inner leads 53 formed in a manner to lie over the semiconductor chip mounting region 52. Also, a concave section 51 a is formed at a boundary of the semiconductor chip mounting region 52, and an inclined section 51 b is formed in the outer circumference of the concave section 51 a.

[0144] Further, above the tape substrate 51, a bonding head 62 that adheres by suction to a semiconductor chip 54 is provided, and a heater 61 is attached to the bonding head 62. The bonding head 62 is connected to a vacuum pump 64 that applies suction to the semiconductor chip 54, and the heater 61 is connected to a temperature control device 63 that controls the temperature of the bonding head 62.

[0145] Also, above the tape substrate 61, a camera 68 that performs image recognition of the tape substrate 51 and the semiconductor chip 54 is provided, and the position of the bonding head 62 in its X and Y directions and rotation angle θ within the X-Y plane are controlled based on the image recognition result obtained by the camera 68.

[0146] Also, below the tape substrate 51, a bonding stage 66 that fixes the semiconductor chip mounting region 52 of the tape substrate 51 is provided, a heater 65 is attached to the bonding stage.66, the heater 65 is connected to a temperature control device 67 that controls the temperature of the bonding stage 66.

[0147]FIG. 9 is a flowchart indicating a method for manufacturing a semiconductor device in accordance with the fourth embodiment of the present invention.

[0148] Referring to FIG. 9, the heater 61 is turned on, and the temperature of the bonding head 62 is adjusted by the temperature control device 63; and the vacuum pump 64 is turned on, such that the semiconductor chip 54 is retained by suction by the bonding head 62. Also, the heater 65 is turned on, and the temperature of the bonding stage 66 is controlled by the temperature control device 67.

[0149] Then, when the tape substrate 51 is transferred, and after the position of the bonding stage 66 is corrected(step S11), the bonding stage 66 is raised, to press the bonding stage 66 against the back surface of the tape substrate 51, and the tape substrate 51 is fixed by applying vacuum suction thereto(step S12).

[0150] Next, the camera 68 is moved to and over the bonding stage 66, and image recognition of the tape substrate 51 and the semiconductor chip 54 is conducted using the camera 68(steps S13 and S14). Then, the position of the bonding head 62 is aligned in its XYθ directions based on the result of the image recognition of the tape substrate 51 and the semiconductor chip 54.

[0151] Next, when the positioning of the bonding head 62 is completed, the bonding head 62 is lowered, and the semiconductor chip 54 that is held by suction by the bonding stage 66 is mounted on the tape substrate 51 (step S15).

[0152] Here, since the concave section 51 a is formed in advance at the boundary of the semiconductor chip mounting region 52, and the inclined section 51 b is formed in advance in the outer circumference section of the concave section 51 a, the tape substrate 51 can be kept away from the edge sections of the semiconductor chip 54 when the semiconductor chip 54 is mounted on the tape substrate 51, and the clearance between the edge sections of the semiconductor chip 54 and the tape substrate 51 can be increased.

[0153] Next, by using radiant heat radiating from the bonding head 62, the tape substrate 51 is subject to forming(step S16).

[0154] Next, when forming the tape substrate 51 is complete, the bonding head 62 is raised(step S17), the bonding stage 66 is lowered(step S18), and the tape substrate 51 is transferred(step S19).

[0155]FIGS. 10 through 12 are cross-sectional views indicating a method for manufacturing a semiconductor device in accordance with a fifth embodiment of the present invention.

[0156] Referring to FIG. 10(a), Cu wiring layers 72 as inner leads are formed on a tape substrate 71, the circumference of the Cu wiring layer 72 is covered by a protection film 73, and exposed portions of the Cu wiring layers 72 are covered by Au plated layers 74.

[0157] On the other hand, convex sections 82 a are formed on a metal mold 81 a at positions corresponding to edge sections of a semiconductor chip 75, and inclined surfaces 83 a are provided in outer circumference sections of the concave sections 82 a. Also, a metal mold 91 b is provided with concave sections 82 b in which the convex sections 82 a can be fitted, and inclined surfaces 83 b that are disposed opposite to the inclined surfaces 83 a.

[0158] Then, as indicated in FIG. 10(b), a tape substrate 71 is sandwiched by the metal molds 81 a and 81 b in a manner that the convex sections 82 a are disposed at the boundary of the semiconductor chip mounting region of the tape substrate 71, to thereby form concave sections 71 a in the tape substrate 71 at positions corresponding to the edge sections of the semiconductor chip 75, and inclined sections 71 b in the tape substrate 71 disposed in outer circumference sections of the concave sections 71 a.

[0159] On the other hand, as indicated in FIG. 11(a), pad electrodes 76 are provided on the semiconductor chip 75, the circumference of the pad electrodes 76 is covered by a protection film 77, and Au bump electrodes 78 are formed on the pad electrodes 76. Then, while heating the bonding stage 66 by a heater 65, the bonding stage 66 is pressed against the tape substrate 61 having the concave sections 67 a formed therein.

[0160] Then, as indicated in FIG. 11(b), the semiconductor chip 75 that is retained by suction by the bonding head 62 is transferred to and over the tape substrate 71, and the Au bump electrodes 78 are pressed against the Cu wiring layers 72 covered by Au plated layers 74 to connect the Au bump electrodes 78 and the Au plated layers 74.

[0161] Then, as indicated in FIG. 12(a), the bonding head 62 and the bonding stage 66 are removed, and as indicated in FIG. 12(b), resin 79 is injected around the semiconductor chip 75 that is mounted on the tape substrate 71, to thereby seal the semiconductor chip 75.

[0162] Here, since the concave sections 71 a are formed in advance at positions corresponding to the edge sections of the semiconductor chip 75, and the inclined sections 71 b are formed in advance in the outer circumference sections of the concave sections 71 a, a clearance between the edge sections of the semiconductor chip 75 and the tape substrate 71 can be retained even when the tape substrate 71 recedes in areas below the Au bump electrodes 78.

[0163] Also, by forming the concave sections 71 a and the inclined sections 71 b in the tape substrate 71 by using the metal mold forming method, there is no need to soften the tape substrate 71 at the time of mounting the semiconductor chip 75, such that deformations of the tape substrate 71 can be suppressed at the time of mounting the semiconductor chip 75, and the semiconductor chip 75 can be stably mounted on the tape substrate 71.

[0164] Accordingly, the semiconductor chip 75 can be accurately mounted on the tape substrate 71, the height of the Au bump electrodes 78 can be lowered, the cost can be reduced, the connection reliability between the semiconductor chip 75 and the tape substrate 71 can be improved, and poor contact of the semiconductor chip 75 can be reduced.

Effects of the Invention

[0165] As described above, in accordance with the present invention, by curving and bending a circuit substrate in a manner that the circuit substrate is kept away from edge sections of a semiconductor chip, the edge sections of the semiconductor chip can be prevented from contacting the circuit substrate without increasing the height of bump electrodes. Consequently, the material used for the bump electrodes can be reduced, such that the cost can be lowered, and the uniformity in the height of the bump electrodes is improved such that the connection reliability between the semiconductor chip and the circuit substrate can be improved.

Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US7691667 *Jun 27, 2006Apr 6, 2010Intel CorporationCompliant integrated circuit package substrate
US7745917Feb 5, 2010Jun 29, 2010Intel CorporationCompliant integrated circuit package substrate
US8198721 *Jul 14, 2006Jun 12, 2012Infineon Technologies AgSemiconductor module
US8759221 *Jun 24, 2013Jun 24, 2014Samsung Electronics Co., LtdPackage substrates, semiconductor packages having the same, and methods of fabricating the semiconductor packages
Legal Events
DateCodeEventDescription
Jun 25, 2004ASAssignment
Owner name: SEIKO EPSON CORPORATION, JAPAN
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:TAKANO, MICHIYOSHI;REEL/FRAME:015518/0043
Effective date: 20040611