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Publication numberUS20040226911 A1
Publication typeApplication
Application numberUS 10/423,185
Publication dateNov 18, 2004
Filing dateApr 24, 2003
Priority dateApr 24, 2003
Publication number10423185, 423185, US 2004/0226911 A1, US 2004/226911 A1, US 20040226911 A1, US 20040226911A1, US 2004226911 A1, US 2004226911A1, US-A1-20040226911, US-A1-2004226911, US2004/0226911A1, US2004/226911A1, US20040226911 A1, US20040226911A1, US2004226911 A1, US2004226911A1
InventorsDavid Dutton, Karen Seaward
Original AssigneeDavid Dutton, Seaward Karen L.
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Low-temperature etching environment
US 20040226911 A1
Abstract
A low-temperature etching environment comprising a halogen and an inert gas in a ratio that does not induce the formation of an etch-limiting surface reaction layer during etching in the low-temperature etching environment. The surface temperature of a material being etched in the low-temperature environment is below that which would melt a photoresist material that has not been treated to increase its glass-reflow temperature.
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Claims(22)
We claim:
1. A low-temperature etching environment, comprising:
a halogen; and
an inert gas;
wherein said halogen and said inert gas are provided in a ratio that does not induce the formation of an etch-limiting surface reaction layer during etching in said low-temperature etching environment.
2. The low-temperature etching environment of claim 1, wherein the temperature of a surface of a material being etched in said low-temperature etching environment below that which would melt a photoresist material that has not been treated to increase its glass-reflow temperature.
3. The low-temperature etching environment of claim 1, wherein said halogen is selected from fluorine, chlorine, bromine, iodine and compounds comprising fluorine, chlorine, bromine, or iodine.
4. The low-temperature etching environment of claim 1, wherein said inert gas is selected from helium, neon, argon, krypton, and xenon.
5. The low-temperature etching environment of claim 1, wherein said halogen comprises chlorine.
6. The low-temperature etching environment of claim 1, wherein said inert gas comprises argon.
7. The low-temperature etching environment of claim 1, wherein said ratio of said halogen and said inert gas is achieved by a flow rate of said halogen less than 20 percent of the combined flow rate of said halogen and said inert gas.
8. A method of etching a surface reaction layer limited material, the method comprising:
a) receiving said surface reaction layer limited material in a low-temperature etching environment comprising:
a halogen and an inert gas in a ratio that does not induce the formation of an etch-limiting surface reaction layer during etching in said low-temperature etching environment; and
b) etching said surface reaction layer limited material within said low-temperature etching environment.
9. The method of claim 8, wherein said surface reaction layer limited material comprises a semiconductor.
10. The method of claim 8, wherein said surface reaction layer limited material comprises indium.
11. The method of claim 8, wherein said surface reaction layer limited material comprises copper.
12. The method of claim 8, wherein said halogen comprises chlorine.
13. The method of claim 8, wherein said inert gas comprises argon.
14. The method of claim 8, wherein the temperature of said low-temperature etching environment is below that which would melt a photoresist material that has not been treated to increase its glass-reflow temperature.
15. A method for inhibiting formation of a surface reaction layer formed in a low-temperature etching environment, said method comprising:
introducing an inert gas into said low-temperature etching environment;
introducing a halogen into said low-temperature etching environment in a ratio to said inert gas that does not induce the formation of an etch-limiting surface reaction layer during etching in said low-temperature etching environment.
16. The method of claim 15, wherein the temperature of said low-temperature etching environment is below that which would melt a photoresist material that has not been treated to increase its glass-reflow temperature.
17. The method of claim 15, wherein said halogen is selected from fluorine, chlorine, bromine, iodine and compounds comprising fluorine, chlorine, bromine, or iodine.
18. The method of claim 15, wherein said inert gas is selected from helium, neon, argon, krypton, and xenon.
19. The method of claim 15, wherein said halogen comprises chlorine.
20. The method of claim 15, wherein said inert gas comprises argon.
21. The method of claim 15, wherein said ratio of said halogen to said inert gas is achieved by a flow rate of said halogen less than 20 percent of the combined flow rate of said halogen and said inert gas.
22. The method of claim 15, wherein said low-temperature etching environment comprises plasma etching of sufficient ion density to physically minimize the surface reaction layer as it is being formed.
Description
TECHNICAL FIELD

[0001] Embodiments of the present invention relate to the field of forming microelectronic devices. Specifically, embodiments of the present invention relate to a low-temperature etching environment comprising a halogen and an inert gas.

Background Art

[0002] Conventional high density plasma etching of materials such as indium comprising compounds is subject to a tradeoff between etch rate and compatibility with standard photoresist masks and process steps. It is possible to achieve a high etch rate if the surface temperature of the material being etched is high enough. Unfortunately, to achieve a high etch rate with conventional techniques, the surface temperature of the material being etched must be greater than the glass-reflow point of standard photoresist materials. The glass-reflow point of standard photoresist material is about 110-120 degrees Celsius. The high temperature can be achieved by either raising the temperature of the substrate of the material being etched or by allowing the high-density plasma source to heat the surface of the material being etched. Consequently and undesirably, non-standard photoresists and/or process steps must be used when etching in the high temperatures conventionally needed for a high etch rate.

[0003]FIG. 1 is a graph 100 of a surface temperature versus time curve 110 and a etch rate versus time curve 120. Graph 100 illustrates the effect that surface temperature has on etch rate in one conventional etching system. FIG. 1 shows the surface temperature dependent etch rate for indium phosphide (InP) when 100 watts (W) of microwave power were used. The conventional etch environment corresponding to FIG. 1 further includes a chlorine/argon (Cl2/Ar) etchant with a flow rate of ten standard cubic centimeters per minute (sccm) for both the chlorine and the argon. Thus, the chlorine flow rate is 50 percent the combined flow rate of chlorine and argon. The pressure in the etch environment was 0.27 pascals (Pa).

[0004] Referring again to FIG. 1, the surface temperature versus time curve 110 shows that the surface temperature rose significantly during the etching and after about four minutes approached 150 degrees Celsius. The etch rate is about 100 nanometers per minute (nm/min) when the surface temperature is below 100 degrees Celsius. Etch rates as high as 2.4 micrometers per minute (μm/min) are shown for higher surface temperatures. However, the surface temperature must be close to 150 degrees Celsius for the etch rate to be significantly greater than 100 nm/min. More precisely, the etch rate is approximately 200 nm/min when the temperature is approximately 140 degrees Celsius, and the etch rate is approximately 450 nm/min when the temperature 150 degrees Celsius. Thus, in this conventional etch process, the surface temperature of the material being etched must be well above the glass-reflow point of standard photoresist materials to achieve a high etch rate.

[0005] While etching at a higher surface temperature achieves a higher etch rate, such higher surface temperatures are incompatible with standard photoresist masks and processes and render the photoresist mask difficult to remove. Hence, to etch in a high temperature environment, a hard mask such as silicon dioxide (SiO2) or a silicon-nitrogen-hydrogen compound (SiNHx) is conventionally used. Alternatively, a standard photoresist mask having a low glass-reflow temperature can be pre-processed such that it will not melt at the higher surface temperature that is conventionally needed for a high etch rate.

[0006] When migrating to a new technology that etches a new material it is desirable to continue to use the same process steps that were used when etching a material for a previous technology. However, using a hard mask or pre-processing a standard mask is incompatible with the process steps of the previous technology. Moreover, removing a hard mask is more difficult than removing a standard photoresist mask and the changes to a standard photoresist due to the pre-processing cause the photoresist mask to be difficult to remove after etching.

[0007] Thus, one problem with conventional etching methods is that to achieve a high etch rate the surface temperature of the material being etched must be undesirably high. A further problem is the difficulty realized in incorporating the photoresist into original processing steps when migrating to a new material being etched. A still further problem is the difficulty in removing a pre-processed photoresist once it has been processed to withstand the high temperature conventionally needed for a high etch rate. Alternatively, the surface temperature of the material being etched can be kept below the glass-reflow point of the photoresist mask; however, conventional low-temperature etching methods have a very low etch rate.

DISCLOSURE OF THE INVENTION

[0008] The present invention pertains to a low-temperature etching environment. An embodiment in accordance with the present invention provides a low-temperature etching environment comprising a halogen and an inert gas in a ratio that does not induce the formation of an etch-limiting surface reaction layer during etching in the low-temperature etching environment. The surface temperature of a material being etched in the low-temperature environment is below that which would melt a photoresist material that has not been treated to increase its glass-reflow temperature.

[0009] Another embodiment in accordance with the present invention is a method of etching a surface reaction layer limited material. The method comprises receiving the surface reaction layer limited material in a low-temperature etching environment that comprises a halogen and an inert gas in a ratio that does not induce the formation of an etch-limiting surface reaction layer during etching in the low-temperature etching environment. The method also comprises etching the surface reaction layer limited material within the low-temperature etching environment.

[0010] Various embodiments in accordance with the present invention achieve a high etch rate with a low surface temperature of the material being etched. Embodiments do not require inconvenient pre-processing steps to increase the glass-reflow temperature of the photoresist. Embodiments do not require the use of a process-incompatible hard photoresist mask. Embodiments allow the use of a standard photoresist with a low glass-reflow temperature. Thus, embodiments provide for easy removal of the photoresist mask.

BRIEF DESCRIPTION OF THE DRAWINGS

[0011] The accompanying drawings, which are incorporated in and form a part of this specification, illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention:

[0012]FIG. 1 is graph illustrating the effect of temperature on the rate of etching an indium-comprising material.

[0013]FIG. 2 is an exemplary device for producing a low-temperature etching environment in accordance with embodiments of the present invention.

[0014]FIG. 3A is a graph illustrating etch rates achieved in accordance with embodiments of the present invention.

[0015]FIG. 3B is a graph illustrating etch rates achieved in accordance with embodiments of the present invention.

[0016]FIG. 4A is a graph illustrating resist selectivity achieved in accordance with embodiments of the present invention.

[0017]FIG. 4B is a graph illustrating resist selectivity achieved in accordance with embodiments of the present invention.

[0018]FIG. 5 is a flowchart illustrating a process of etching a surface reaction layer limited material, according to an embodiment of the present invention.

[0019]FIG. 6 is a flowchart illustrating a process of inhibiting formation of a surface reaction layer in a low-temperature etching environment, according to an embodiment of the present invention.

DETAILED DESCRIPTION OF THE INVENTION

[0020] During etching of some materials, a surface reaction layer forms on the surface of the material being etched. The surface reaction layer has a low volatility at low temperatures such that it accumulates to a thickness that limits the etch rate. For purposes of the present invention, the term “low-temperature” means a temperature below which would melt a standard photoresist mask that has not been specially treated to withstand higher temperatures. For example, standard photoresist material has a glass-reflow point of about 110-120 degrees Celsius. The surface reaction layer is believed to accumulate to a thickness typically on the order of nanometers, which is sufficient to limit the etch rate.

[0021] For example, when etching a material comprising InP, the low etch rate at low temperatures is believed to be due to the formation of a surface reaction layer of a compound of an indium and chlorine (InClx) layer on the InP surface. Conventionally, to achieve a high etch rate, the surface of the material being etched is raised to a high temperature. The higher etch rates at higher temperatures are believed to be due to the increased volatility of InClx at the higher temperatures. Hence, higher temperatures reduce the thickness of the surface reaction layer. This surface reaction layer is also referred to in the art as a selvedge layer.

[0022] The temperature to which the surface is heated to achieve a high etch rate will melt a photoresist material that has not been treated to increase its glass-reflow temperature. Embodiments in accordance with the present invention inhibit the formation of the surface reaction layer by providing a halogen and an inert gas at a ratio that inhibits the formation of the surface reaction layer. As a result, the etch rate is higher than that obtained using conventional etching techniques in a low-temperature environment.

[0023] Embodiments according to the present invention are suited to etching any material whose etching is limited by the formation of a surface reaction layer. For purposes of the present application, the term “surface reaction layer limited material” includes any material for which etching is adversely affected by the formation of a surface reaction layer. InP is used herein as an example of one such surface reaction layer limited material. However, the present invention is not limited solely to the etching of indium-phosphide (InP). Furthermore, chlorine is used as an example of one etchant that contributes to the formation of the surface reaction layer. However, the present invention is not limited to chlorine being the contributor to the surface reaction layer.

[0024] Embodiments according to the present invention provide a low-temperature etching environment comprising a halogen and an inert gas. The etching environment comprising the halogen and the inert gas inhibits the formation of an etch-limiting surface reaction layer during etching in the low-temperature etching environment. FIG. 2 is a side sectional view of an exemplary device 200 for creating such a low-temperature etching environment. The exemplary device 200 is an inductively-coupled plasma reactor. However, the present invention is not limited to inductively-coupled plasma reactors. The exemplary device 200 comprises a power supply 202 coupled to an induction coil 204. Also included is a dielectric window 205. The exemplary device 200 also has a wafer chuck 208 coupled to a bias power supply 210. Furthermore, a wafer 212 is shown on the wafer chuck 208. The exemplary device 200 generates the low-temperature etching environment comprising a halogen and an inert gas (halogen and inert gas not depicted), which is introduced into and passed through the etching environment. The present invention is well suited to other plasma etch environments than the inductively-coupled plasma environment of FIG. 2. Such systems require a sufficiently high plasma density to physically minimize the surface reaction layer as it is being formed.

[0025] Embodiments according to the present invention introduce a halogen and an inert gas into the etching environment in a ratio that inhibits formation of an etch-limiting surface reaction layer. The inert gas serves as a diluent that reduces the concentration of the halogen. FIG. 3A is a graph 300 illustrating etch rate achieved in accordance with embodiments of the present invention. Results are shown for etching four different materials, each comprising indium. The graph 300 shows an InP etch rate curve 310, an indium-gallium-arsenide (InGaAs) etch rate curve 320, an indium-aluminum-arsenide (InAlAs) etch rate curve 330, and an aluminum-indium-gallium-arsenide (AlInGaAs) etch rate curve 340. The results show that the etch rate for each material is a function of the concentration of the halogen to the inert gas. In this example, chlorine and argon were used for the halogen and the inert gas, respectively. The etch rates were achieved under the following conditions. The process pressure was 0.27 Pa; the inductively-coupled power (ICP) was 1000 W; the reactive ion etching (RIE) power, which is also known as wafer chuck power, was 55 W; the chuck temperature was −5 Celsius; the total gas flow was 15 sccm; and the etch time was three minutes.

[0026] Each curve (310, 320, 330, 340) in FIG. 3A shows an initial increase in etch rate when the chlorine concentration increases above zero percent. The etch rate for each curve peaks when the chlorine concentration is below 20 percent. The chlorine concentration is defined as the flow rate of chlorine divided by the combined flow rate of chlorine and argon. The data points of the various curves between about 20 percent and 40 percent chlorine concentration show that the etch rate decreases for each material as the chlorine concentration is further increased. The data points of the various curves between 60-80 percent chlorine concentration show a slight increase in etch rate compared to a chlorine concentration of about 40 percent. However, the etch rates for the various curves at this chlorine concentration are well below the peak etch rates which occur at a chlorine concentration of less than 20 percent.

[0027] Conventionally, a high chlorine concentration is used based on the belief that a higher chlorine concentration will provide a higher etch rate. This belief is based on analysis of the portion of the curves with greater than 40 percent chlorine concentration without an awareness of the portion of the curves with a chlorine concentration below 20 percent. Moreover, using a low chlorine concentration to achieve a high etch rate is considered counterintuitive. In fact, a high chlorine concentration results in excessive buildup of a surface reaction layer that inhibits the etch rate. The present invention uses a low chlorine concentration, which inhibits the formation of a surface reaction layer.

[0028] The surface reaction layer, if it exists at all, does not limit the etch rate when the chlorine concentration is low. For example, referring to the data points in FIG. 3A in which the chlorine concentration is less the 20 percent, the etch rate improves as the chlorine concentration increases. This indicates that if increasing the chlorine concentration forms a surface reaction layer, the negative impact of such increase on the etch rate is less than the positive impact on etch rate of increasing concentration of chlorine. Thus, this is not an example of an etch-limiting surface reaction layer. However, at a higher chlorine concentration, the surface reaction layer limits the etch rate. For example, the etch rate of InP is about 275 nm/min when the chlorine concentration is about 10 percent. However, the InP etch rate is only about 110 nm/min when the chlorine concentration is at about 35 percent. Similar results are indicated in FIG. 3A for the other materials. It is believed that with the higher chlorine concentration, the negative impact on etch rate of the surface reaction layer is greater than the positive impact on etch rate of increased chlorine concentration. For purposes of the present application, an “etch-limiting surface reaction layer,” is a surface reaction layer that limits the etch rate. Embodiments according to the present invention provide a low-temperature etching environment in which the halogen and the inert gas are in a ratio that does not induce the formation of an etch-limiting surface reaction layer during etching.

[0029]FIG. 3A also shows that the selectivity between the various materials being etched is a function of the chlorine concentration in the etching environment. For example, the ratio of the InP etch rate to the indium aluminum arsenide (InAlAs) etch rate is greater than one at low chlorine concentrations. At a chlorine concentration of about seven percent, the etch rate of InP is about 280 nm/min, whereas the etch rate of InAlAs is about 220 nm/min. Thus, the InP/InAlAs etch rate ratio is about 1.3 at about a seven percent chlorine concentration. However, at higher chlorine concentration, the etch ratio favors InAlAs. For example, at a chlorine concentration of about 68 percent, the etch rate of InP is about 120 nm/min, whereas the etch rate for InAlAs is about 180 nm/min. This provides a selectivity of InP to InAlAs of only about 0.7. The favorable etch rate of InP to InAlAs at a low chlorine concentration, achieved in the present invention, is desirable and difficult or impossible to achieve with conventional methods. The favorable etch ratio of InP/InAlAs at low temperature makes it easier to stop the etch at the InAlAs layer when etching a stack comprising InP on top of InAlAs. Thus, embodiments according to the present invention are able to achieve a favorable etching selectivity between various indium-comprising compounds. Such a favorable etching selectivity is not limited to indium comprising compounds.

[0030]FIG. 3B shows a graph 350 illustrating etch rate achieved in accordance with embodiments of the present invention using an electron cyclotron resonance (ECR) system. The results are similar to the inductively-coupled plasma (ICP) results shown in FIG. 3A. Results in FIG. 3B are shown for etching two different materials, each comprising indium. The graph 350 shows an InP etch rate curve 360 and an InAlAs etch rate curve 370. The etch rate of InP is about 375 nm/min at a chlorine concentration of about seven percent. The etch rates drops below 200 nm/min when the chlorine concentration is about 40 percent. The etch rate of InAlAs is about 440 nm/min at a chlorine concentration of about seven percent. The etch rates drops below 300 nm/min when the chlorine concentration is about 40 percent. Thus, it is believed that a buildup of an etch-limiting surface reaction layer limits the etch rate at higher chlorine concentrations.

[0031] Enhanced photoresist mask selectivity is another benefit of embodiments according to the present invention. FIG. 4A shows a graph 400 of selectivity ratio between the material being etched and the photoresist mask under the same conditions as the data shown in FIG. 3A. FIG. 4A shows an InP/photoresist selectivity curve 410, an InGaAs/photoresist selectivity curve 420, an InAlAs/photoresist selectivity curve 430, and an AlInGaAs/photoresist selectivity curve 440. Referring to FIG. 4A, the resist selectivity for all curves 410, 420, 430, 440 is high at low chlorine concentrations relative to high chlorine concentrations. For example, when the chlorine concentration is below 20 percent, the resist selectivity is between two and eight for the various materials being etched. Furthermore, the selectivity ratio of InP/photoresist peaks at greater than five and the selectivity ratio for the other materials to photoresist is greater than four over most of the range below 20 percent chlorine. When the chlorine concentration is at about 40 percent or higher, the resist selectivity is much lower than the resist selectivity at a low chlorine concentration. Thus, embodiments according to the present invention provide a high etch selectivity between the material being etched and a photoresist mask when using a low-temperature etching environment in which the halogen and the inert gas are in a ratio that does not induce the formation of an etch-limiting surface reaction layer during etching.

[0032] The increased etch selectivity of a semiconductor with respect to the photoresist is because the lower concentration of chlorine reduces the etch rate of the photoresist, as well as increasing the etch rate of the semiconductor as seen in FIG. 3A. The increased etch selectivity of the semiconductor with respect to the photoresist allows thinner photoresist masks to be used. Moreover, the increased etch selectivity facilitates incorporating into standard process flows the fabrication of devices that are otherwise difficult to fabricate using standard process steps. For example, heterojunction bipolar transistors are difficult to fabricate using standard process steps due to the formation of the surface reaction layer. However, by utilizing embodiments in accordance with the present invention, heterojunction bipolar transistors can be fabricated using standard process methods.

[0033]FIG. 4B shows a graph 450 of the selectivity ratio between the material being etched and the photoresist mask for the ECR under the same conditions as shown in FIG. 3B. The results are similar to the ICP results shown in FIG. 4A. FIG. 4B shows an InP/photoresist selectivity curve 460 and an InAlAs/photoresist selectivity curve 470. Referring to FIG. 4B, the resist selectivity for curves 460 and 470 is high at low chlorine concentrations relative to the resist selectivity at higher chlorine concentrations. For example, when the chlorine concentration is below 10 percent, the resist selectivity for InP is 2.5 or greater. For InAlAs, the resist selectivity is about four or higher for chlorine concentrations below 10 percent. When the chlorine concentration is at about 40 percent, the resist selectivity is below one for InP and about one for InAlAs.

[0034] An embodiment of the present invention is a method of etching a material for which etching is limited by a surface reaction layer. Referring to process 500 of FIG. 5, block 510 comprises receiving, in a low-temperature etching environment, a material for which etching in a low-temperature etching environment is limited by a surface reaction layer. The low-temperature etching environment comprises a halogen and an inert gas. The halogen and the inert gas are provided in a ratio that does not induce the formation of an etch-limiting surface reaction layer during etching in the low-temperature etching environment.

[0035] In block 520, the process comprises etching the surface reaction layer limited material within the low-temperature etching environment.

[0036] The material for which etching is limited by a surface reaction layer is not limited to any category of materials. In one embodiment, copper is the material that is surface reaction layer limited. In another embodiment, a semiconductor is the material that is surface reaction layer limited. For example, the material is indium phosphide in one embodiment.

[0037] Yet another embodiment of the present invention is a method for reducing a surface reaction layer formed in a low-temperature etching environment. Referring to process 600 of FIG. 6, block 610 comprises introducing an inert gas into the low-temperature etching environment.

[0038] Block 620 comprises introducing a halogen into the low-temperature etching environment. The inert gas and the halogen are introduced in a ratio that inhibit the formation of an etch-limiting surface reaction layer during etching in the low-temperature etching environment. The temperature of the low-temperature environment is below that which would melt a photoresist material that has not been treated to increase its glass-reflow temperature.

[0039] While the present invention has been described in particular embodiments, it should be appreciated that the present invention should not be construed as limited by such embodiments, but rather construed according to the below claims.

Referenced by
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US7078302Feb 23, 2004Jul 18, 2006Applied Materials, Inc.Gate electrode dopant activation method for semiconductor manufacturing including a laser anneal
US7132338May 14, 2004Nov 7, 2006Applied Materials, Inc.Methods to fabricate MOSFET devices using selective deposition process
US7166528Oct 10, 2003Jan 23, 2007Applied Materials, Inc.Methods of selective deposition of heavily doped epitaxial SiGe
US7439142Oct 9, 2006Oct 21, 2008Applied Materials, Inc.Methods to fabricate MOSFET devices using a selective deposition process
US7611976Jul 5, 2006Nov 3, 2009Applied Materials, Inc.Gate electrode dopant activation method for semiconductor manufacturing
US8501594Jun 15, 2010Aug 6, 2013Applied Materials, Inc.Methods for forming silicon germanium layers
Classifications
U.S. Classification216/58, 156/345.29, 257/E21.222
International ClassificationC23F4/00, H01L21/306
Cooperative ClassificationC23F4/00, H01L21/30621
European ClassificationH01L21/306B4C, C23F4/00
Legal Events
DateCodeEventDescription
Sep 18, 2003ASAssignment
Owner name: AGILENT TECHNOLOGIES, INC., COLORADO
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:DUTTON, DAVID;SEAWARD, KAREN L.;REEL/FRAME:013991/0716
Effective date: 20030417