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Publication numberUS20050025909 A1
Publication typeApplication
Application numberUS 10/872,902
Publication dateFeb 3, 2005
Filing dateJun 21, 2004
Priority dateDec 21, 2001
Also published asEP1459365A2, WO2003054921A2, WO2003054921A3, WO2003054921B1
Publication number10872902, 872902, US 2005/0025909 A1, US 2005/025909 A1, US 20050025909 A1, US 20050025909A1, US 2005025909 A1, US 2005025909A1, US-A1-20050025909, US-A1-2005025909, US2005/0025909A1, US2005/025909A1, US20050025909 A1, US20050025909A1, US2005025909 A1, US2005025909A1
InventorsHolger Jurgensen, Alois Krost, Armin Dadgar
Original AssigneeHolger Jurgensen, Alois Krost, Armin Dadgar
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Method for the production of III-V laser components
US 20050025909 A1
Abstract
The invention relates to a method for the production of III-V laser components, whereby a III-V semiconductor layer is deposited on a silicon substrate in a process chamber of a reactor from a gaseous starting material. According to the invention, an economical method for the production of qualitatively high-grade laser may be achieved whereby, firstly, an Al-containing buffer layer is deposited on the Si substrate, in particular a Si(III) substrate, on which the III-V semiconductor layer, in particular, GaN is then deposited such that the lattice plane thereof runs parallel to the cleavage direction of the substrate, whereby, on cleaving the substrate plane-parallel layer, cleavage surfaces are formed.
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Claims(3)
1. Method for producing III-V laser components, in which a III-V semiconductor layer is deposited on a silicon substrate, in particular an Si(111) substrate, from gaseous starting substances in a process chamber of a reactor, wherein first of all an Al-containing buffer layer is deposited on the Si substrate, then the III-V semiconductor layer, in particular a GAN layer, and if appropriate further active layers, are deposited on the buffer layer, in such a manner that the lattice plane thereof runs parallel to the cleavage direction of the substrate, plane-parallel layer fracture surfaces then being produced by cleaving the substrate in the cleavage direction, and components in which the layer fracture surfaces form the laser facets subsequently being fabricated.
2. Method according to claim 1, characterized in that the buffer layer consists of AIN or AIN with the addition of one or more further elements from group III or V.
3. Method according to claim 1, characterized in that the buffer layer is a III-V semiconductor layer and is between 20 and 100 nm thick.
Description
  • [0001]
    This application is a continuation of pending International Patent Application No. PCT/EP02/12799 filed Nov. 15, 2002 which designates the United States and claims priority of pending German Patent Application Nos. 101 63 714.4 filed Dec. 21, 2001 and 102 06 750.3 filed Feb. 19, 2002.
  • [0002]
    The invention relates to a method for producing III-V laser components, in which a III-V semiconductor layer, for example gallium nitride, is deposited on a silicon substrate from gaseous starting substances, for example trimethylgallium, trimethylindium, trimethylaluminum, phosphine or arsine, in a process chamber of a reactor.
  • [0003]
    The deposition of III nitride semiconductors on substrates of a different type, such as for example sapphire, silicon carbite or silicon, is a cost-saving process, since this substrate material is less expensive than III-V substrate material. However, one problem of this process is the lattice mismatch of the layer on the substrate. Suitable selection of the substrate material for the layer material allows matching to be effected, for example gallium nitride grows at a position rotated through 30 with respect to the sapphire, and thereby eliminates part of the lattice mismatch. However, on account of this rotated growth there is no common fracture or cleavage direction for the layer and the substrate. The fracture line generally runs along the fracture line or cleavage line of the substrate, since the latter is considerably thicker than the layer deposited thereon. In the case described above, this leads to a rough laser facet which has to be reworked. Also, with laser mirrors produced in this manner, undesirable losses are produced in the event of, for example, a wet-chemical after treatment. The roughness of the laser mirrors or facets which are not precisely oriented lead to losses and thereby cause a high threshold current, which is associated with an increased thermal load in the subsequent component.
  • [0004]
    The invention is based on the object of providing an inexpensive method for producing high-quality lasers.
  • [0005]
    The object is achieved by the invention defined in the claims, in which it is substantially provided that first of all an aluminum-containing buffer layer is deposited on an Si substrate, in particular an Si(111) substrate. This is carried out by means of MOCVD. This buffer layer may consist of aluminum nitride and may be 20 to 100 nm thick. Then, in the same reactor and preferably without any further intermediate steps, the active III-V layer, preferably a III nitride layer, and particularly preferably a gallium nitride layer, or a sequence of such layers for component layers, is deposited on this buffer layer, in such a manner that the lattice plane of the layer runs parallel to the cleavage direction of the substrate. When the substrate is fractured, the fracture then takes place along a crystalographically suitable surface. The fracture takes place substantially along one plane. The fracture or cleavage lines of the Si(111) substrate can then be selected in such a way that plane-parallel layer fracture surfaces are formed. These layer fracture surfaces then form the laser facets. The laser facets are therefore formed simply by breaking or cleaving. This is possible on account of the fact that the crystalographic fracture direction of the silicon substrate and of the structure based on gallium nitride coincide.
  • [0006]
    A pertinent factor in this context is the aluminum-containing seed layer. A seed layer of this type even allows gallium nitride which is matched in terms of fraction direction to be deposited on Si(001). The only problem in this case is the absence of common crystal symmetry.
  • [0007]
    If necessary, further, in particular electrically active, layers can be deposited on the layer sequence described above. The pertinent factor, however, is that the hexagonal crystal of gallium nitride is deposited on the cubic crystal lattice of the silicon with a corresponding crystal orientation, in such a manner that the natural fracture directions of the two crystals coincide in the plane in such a manner that plane-parallel laser facets are formed by simply fracturing the substrate along the natural fracture lines.
  • [0008]
    All features disclosed are (inherently) pertinent to the invention. The disclosure content of the associated/appended priority documents (copy of the prior application) is hereby incorporated in its entirety in the disclosure of the application, partly with a view to incorporating features of these documents in claims of the present application.
Patent Citations
Cited PatentFiling datePublication dateApplicantTitle
US5654583 *Jun 23, 1995Aug 5, 1997Hitachi, Ltd.Semiconductor device having first and second semiconductor structures directly bonded to each other
US6080599 *Jun 2, 1998Jun 27, 2000Kabushiki Kaisha ToshibaSemiconductor optoelectric device and method of manufacturing the same
US6121121 *Jul 27, 1999Sep 19, 2000Toyoda Gosei Co., LtdMethod for manufacturing gallium nitride compound semiconductor
US6703253 *Nov 1, 2002Mar 9, 2004Sharp Kabushiki KaishaMethod for producing semiconductor light emitting device and semiconductor light emitting device produced by such method
US20020197841 *Jun 4, 2002Dec 26, 2002Seiji NagaiGroup III nitride compound semiconductor element and method for producing the same
US20030136333 *Jun 8, 2001Jul 24, 2003Fabrice SemondPreparation method of a coating of gallium nitride
Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US7825432Mar 9, 2007Nov 2, 2010Cree, Inc.Nitride semiconductor structures with interlayer structures
US8324005Oct 19, 2010Dec 4, 2012Cree, Inc.Methods of fabricating nitride semiconductor structures with interlayer structures
US8362503Mar 9, 2007Jan 29, 2013Cree, Inc.Thick nitride semiconductor structures with interlayer structures
US8759169Nov 2, 2010Jun 24, 2014X—FAB Semiconductor Foundries AGMethod for producing silicon semiconductor wafers comprising a layer for integrating III-V semiconductor components
US9054017Jan 28, 2013Jun 9, 2015Cree, Inc.Thick nitride semiconductor structures with interlayer structures and methods of fabricating thick nitride semiconductor structures
US9344200Oct 8, 2014May 17, 2016International Business Machines CorporationComplementary metal oxide semiconductor device with III-V optical interconnect having III-V epitaxial semiconductor material formed using lateral overgrowth
US9395489Oct 8, 2014Jul 19, 2016International Business Machines CorporationComplementary metal oxide semiconductor device with III-V optical interconnect having III-V epitaxially formed material
US9590393Apr 11, 2016Mar 7, 2017International Business Machines CorporationComplementary metal oxide semiconductor device with III-V optical interconnect having III-V epitaxial semiconductor material formed using lateral overgrowth
US9595805Sep 22, 2014Mar 14, 2017International Business Machines CorporationIII-V photonic integrated circuits on silicon substrate
US20080217645 *Mar 9, 2007Sep 11, 2008Adam William SaxlerThick nitride semiconductor structures with interlayer structures and methods of fabricating thick nitride semiconductor structures
US20080220555 *Mar 9, 2007Sep 11, 2008Adam William SaxlerNitride semiconductor structures with interlayer structures and methods of fabricating nitride semiconductor structures with interlayer structures
Classifications
U.S. Classification428/21, 257/E21.127
International ClassificationH01S5/323, H01S5/02, H01L21/20
Cooperative ClassificationH01S5/021, H01S5/32341, H01L21/02433, H01L21/02381, H01L21/0254, H01L21/02458
European ClassificationH01L21/02K4A7, H01L21/02K4B1B1, H01L21/02K4C1B1, H01L21/02K4A1A3, H01S5/323B4
Legal Events
DateCodeEventDescription
Oct 12, 2004ASAssignment
Owner name: AIXTRON AG, GERMANY
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:JURGENSEN, HOLGER;KROST, ALOIS;DADGAR, ARMIN;REEL/FRAME:015871/0860;SIGNING DATES FROM 20040628 TO 20040710