|Publication number||US20050121691 A1|
|Application number||US 10/763,070|
|Publication date||Jun 9, 2005|
|Filing date||Jan 22, 2004|
|Priority date||Dec 5, 2003|
|Also published as||CN1918710A, CN1918710B, US7649212, US7939887, US20060244004, US20100078673|
|Publication number||10763070, 763070, US 2005/0121691 A1, US 2005/121691 A1, US 20050121691 A1, US 20050121691A1, US 2005121691 A1, US 2005121691A1, US-A1-20050121691, US-A1-2005121691, US2005/0121691A1, US2005/121691A1, US20050121691 A1, US20050121691A1, US2005121691 A1, US2005121691A1|
|Original Assignee||Jean-Luc Morand|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (14), Referenced by (4), Classifications (21), Legal Events (1)|
|External Links: USPTO, USPTO Assignment, Espacenet|
1. Field of the Invention
The present invention relates to a novel type of semiconductor component. The present invention more specifically applies to power components and to protection components intended to handle high voltages, such components being generally called discrete components, although several such components may be provided on the same chip, and/or they may be associated with logic circuits provided on the same chip.
2. Discussion of the Related Art
It should incidentally be noted that in the present description, the term “diode” designates a PN or Schottky diode intended to be used as a power, protection, or avalanche diode. A diode is a bipolar component having two terminals intended to be connected to elements of a dielectric or electronic circuit, discrete or integrated, that, according to cases, conducts a forward current and blocks a reverse current (rectifying diode), or conversely, conducts a reverse current when the voltage thereacross exceeds a given threshold (protection diode). In the thyristor of
A disadvantage of vertical components is their on-state resistance. Indeed, the thicknesses of the various layers and regions are optimized according to the desired diode characteristics. In particular, the thickness of N-type layer 2 (diode) or 10 (thyristor) must be sufficiently high for the component to have a desired breakdown voltage but must also be as small as possible to limit the on-state resistance of the component. In the case of a diode, N+ layer 1 has no active function in the diode operation. It is only used to ensure an ohmic contact with the metallization and is used to reduce the diode's on-state resistance linked to the fact that a silicon wafer has, in current technologies, a thickness of from 300 to 500 μm, in most cases much greater than the desired thickness of N layer 2 (for example, 60 μm to hold 600 V). In the case of the thyristor, the thickness of layer 10 is also required by the thickness of the silicon wafer and various means, often complex, are used to reduce it.
Another disadvantage of vertical components is that the surface area of the active junctions is linked to the semiconductor chip surface area taken up by the components, the junctions being horizontal (in planes parallel to the main diode surfaces).
Further, such components intended to handle high voltages pose many problems to ensure a proper breakdown voltage at the periphery of the semiconductor or Schottky junction, as well as to insulate the entire component and ensure its protection (insulating wall).
A PNN+ diode and a thyristor have been described as an example only of vertical components, the problems indicated hereabove generally relating to vertical power or high-voltage components, for example, Schottky diodes, bidirectional components, or MOS-type voltage-controlled components.
The present invention aims at providing novel types of diodes, and more generally novel types of semiconductor power or high-voltage components enabling avoiding at least some of the above-mentioned disadvantages of vertical components, in particular increasing the active junction surface area with respect to the surface area of the chip in which the component is formed, reducing the on-state voltage drop, and simplifying the peripheral structure of the individual components.
To achieve these and other objects, the present invention provides a semiconductor component in which the active junctions extend perpendicularly to the surface of a semiconductor chip substantially across the entire thickness thereof.
According to an embodiment of the present invention, the contacts with the regions to be connected are provided by conductive fingers substantially crossing the entire region with which a contact is desired to be established.
According to an embodiment of the present invention, the conductive fingers are metal fingers.
According to an embodiment of the present invention, the semiconductor component is of multicellular type and the junctions are formed of several cylinders perpendicular to the main substrate surfaces.
According to an embodiment of the present invention, the component is a diode comprising an alternation of regions of a first conductivity type and of a second conductivity type extending across the entire substrate thickness, the regions of a first type being crossed by conductive fingers connected to a metallization extending over an entire surface of the substrate, and the regions of the second type being crossed by conductive fingers connected to a metallization on the other substrate surface.
According to an embodiment of the present invention, the diode is formed in an N-type semiconductor substrate, the conductive fingers penetrating into the N-type regions being surrounded with heavily-doped N-type regions.
According to an embodiment of the present invention, the component is a bipolar transistor alternately comprising a region of a first conductivity type, a region of a second conductivity type, and a region of the first conductivity type, each of these regions extending across the entire thickness of the substrate and being in contact with at least one conductive finger, each of these conductive fingers being respectively connected to an emitter metallization, to a base metallization, and to a collector metallization.
According to an embodiment of the present invention, the component is a thyristor successively comprising a first region of a first conductivity type, a second region of the second conductivity type, a third region of the first conductivity type, and a fourth region of the second conductivity type, each of these regions extending across the entire substrate thickness, a conductive finger extending into the entire first region, at least one conductive finger extending into the entire second region, and at least one conductive finger extending into the entire fourth region.
According to an embodiment of the present invention, in the thyristor, the first conductivity type is type N, the second conductivity type is type P, the first region being a cathode region and the fourth region an anode region, and localized metallizations extend vertically between the gate region and the cathode region to form localized gate-cathode short-circuits.
The foregoing objects, features, and advantages of the present invention will be discussed in detail in the following non-limiting description of specific embodiments in connection with the accompanying drawings.
As conventional in the field of semiconductor representation, the various drawings are not to scale. Especially, in these various drawings, the lateral dimensions have been greatly exaggerated with respect to the vertical directions. Indeed, a silicon wafer currently has a thickness of from 300 to 500 μm—and greater thicknesses may be chosen for an implementation of the present invention—while patterns and vias may be defined according to dimensions on the order of from 1 to 10 μm.
The junction of each diode cell is formed vertically across the thickness of the semiconductor wafer.
It should be noted that, instead of providing simple conductive fingers 24, metal could be present all around useful N-type areas 21. The structure can then be seen as a conductive (metal) plate comprising openings containing concentric cylindrical elements comprising a central via 22, surrounded with a P-type semiconductor cylinder 23, surrounded with an N-type semiconductor cylinder 21, possibly surrounded with an N+ semiconductor cylinder.
The above description essentially aims at the diode structure and the order of the manufacturing steps may be modified.
In the following, term “via” or “finger” will be used to designated the plate-shaped elements of
In the example of
As shown in partial cross-section view in
By forming two structures identical to that in
In the various drawings, the fingers are illustrated as through or not fingers. This depends on the embodiments and on the selected manufacturing technologies. In the case of through fingers, their end unconnected to a contact is isolated.
A triac may be formed by assembling two thyristors of the above type in parallel and an in opposition.
The various illustrated structures are likely to have various alterations and modifications, and it should be noted by those skilled in the art that the alterations described for certain embodiments apply to other embodiments.
In the same way as an assembly of diode cells in parallel has been illustrated in
On the other hand, many embodiments will readily occur to those skilled in the art, and will be possible according to the technical development, the forming of conductive fingers or of plates formed in trenches being examples only of possible approaches of the forming of the described structures with vertical junctions.
It should be noted that, since a greater density of components is obtained with vertical junction components according to the present invention than with conventional horizontal junction components, more heat will be generated per surface area unit when the components are on (although the on-state voltage drop is smaller due to the possible optimization of the thickness of the reverse voltage strength layer). However, this heat may advantageously be extracted by means of the through conductive fingers. Indeed, metal fingers have a heat conductivity from 2 to 3.5 times greater than the equivalent silicon volume. These fingers may take up a large surface area and, in particular, the peripheral “fingers” may take up the entire free surface area between elementary cells of a component.
Such alterations, modifications, and improvements are intended to be part of this disclosure, and are intended to be within the spirit and the scope of the present invention. Accordingly, the foregoing description is by way of example only and is not intended to be limiting. The present invention is limited only as defined in the following claims and the equivalents thereto.
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|U.S. Classification||257/107, 257/E29.211, 257/E29.174, 257/E29.113, 257/E29.194, 257/E29.327|
|International Classification||H01L29/417, H01L29/739, H01L29/74, H01L29/73, H01L29/861|
|Cooperative Classification||H01L29/417, H01L29/73, H01L29/739, H01L29/74, H01L29/861|
|European Classification||H01L29/861, H01L29/74, H01L29/73, H01L29/417, H01L29/739|
|May 10, 2004||AS||Assignment|
Owner name: STMICROELECTRONICS S.A., FRANCE
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:MORAND, JEAN-LUC;REEL/FRAME:015311/0776
Effective date: 20040211