|Publication number||US20050157777 A1|
|Application number||US 10/983,645|
|Publication date||Jul 21, 2005|
|Filing date||Nov 9, 2004|
|Priority date||Dec 26, 2003|
|Also published as||US7477679|
|Publication number||10983645, 983645, US 2005/0157777 A1, US 2005/157777 A1, US 20050157777 A1, US 20050157777A1, US 2005157777 A1, US 2005157777A1, US-A1-20050157777, US-A1-2005157777, US2005/0157777A1, US2005/157777A1, US20050157777 A1, US20050157777A1, US2005157777 A1, US2005157777A1|
|Original Assignee||Oki Electric Industry Co., Ltd.|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (9), Referenced by (4), Classifications (8), Legal Events (4)|
|External Links: USPTO, USPTO Assignment, Espacenet|
1. Field of the Invention
The present invention relates to a demodulator suitable for use in, for example, a direct-sequence spread spectrum communication system employing offset quadrature phase-shift keying (OQPSK) modulation.
2. Description of the Related Art
Conventional OQPSK demodulators have been described in various publications of the Institute of Electronics, Information and Communication Engineers (IEICE) of Japan, including IEICE SB-3-5 (1988, p. 1-564), IEICE B-150 (1991, p. 2-150), IEICE B-200 (1992, p. 2-200), and IEICE SAT 92-2 (1992, pp. 3-8). These demodulators generally employ synchronous detectors that compare the phase of the received OQPSK modulated signal with the phase of a synchronized reference carrier signal. Various synchronous detection methods are employed, but all require at least a carrier recovery circuit to generate the reference carrier signal from the received OQPSK signal, a clock recovery circuit, a bandpass filter (BPF), and a low-pass filter (LPF). These circuits take up considerable space, especially the carrier recovery circuit, which typically includes a phase-locked loop or a reverse modulator.
An OQPSK demodulator employing synchronous detection is unavoidably large and complex. There is a need for a smaller and simpler type of OQPSK demodulator.
An object of the present invention is to provide a simplified demodulator for a spread-spectrum signal.
The invented demodulator receives a spread spectrum signal, modulated by a predetermined modulation method, in which different data symbols are represented by predetermined sequences of chips. A frequency detector detects the received signal to generate a frequency-detected signal representing successive chip values. A correlation unit correlates the frequency-detected signal with predetermined sequences of correlation coefficients to generate a plurality of correlation values. A decision circuit selects one of the correlation values, thereby deciding which one of the data symbols the spread spectrum signal represents.
The predetermined sequences of correlation coefficients are obtained by modulating the predetermined sequences of chips representing the symbol values by the same modulation method as used to modulate the spread spectrum signal, and demodulating the resulting modulated sequences of chips by the same detection method as used by the frequency detector. The modulation method may be a phase modulation method such as OQPSK. The frequency detection method may be a method of the type employed in frequency-shift keying demodulation.
This type of frequency detection is inherently simpler than synchronous detection. In particular, the invented demodulator does not require a carrier recovery circuit.
In the attached drawings:
Embodiments of the invention will now be described with reference to the attached drawings, in which like elements are indicated by like reference characters. The embodiments assume a direct-sequence spread spectrum communication system satisfying the following conditions (a) to (d).
(a) OQPSK modulation is used.
(b) Sixteen data symbols are coded as pseudo-random sequences of chip values with low mutual correlation (the sequences are substantially orthogonal).
(c) Each pseudo-random sequence includes thirty-two (32) chips.
(d) The pulse shape is defined as in
The two sequences in
In the direct-sequence spread spectrum communication system assumed in the following embodiments, 4-bit data symbols are spread into 32-chip sequences for transmission to the receiver. In ordinary direct-sequence spread spectrum communication, the receiver uses the same 32-chip sequences are used to despread the received signal and recover the data symbols, but in the embodiments described below, different chip sequences are used for despreading.
The frequency detector 11 receives a modulated signal MS1, performs frequency detection, and outputs a frequency-detected signal DT1. The type of frequency detection performed is also known as frequency-shift keying (FSK) demodulation, and the detected signal DT1 will also referred to below as FSK demodulated data. Although the size of the frequency detector (FSK demodulator) 11 depends on the specific frequency detection method employed, the frequency detector 11 can be realized in a much smaller circuit than a conventional synchronous detector.
The modulated signal MS1 is a direct-sequence spread spectrum communication signal modulated according to conditions (a) to (d) above. If the modulated signal MS1 has the upper waveform shown in
The timing recovery unit 13 in
Operating at this optimal timing TM1, the chip data decision unit 12 decides whether the value of each chip in the frequency-detected signal DT1 represents ‘1’ or ‘0’ data, and outputs a chip data sequence CD1.
Given the frequency-detected signal DT1 shown in
The correlation unit 14 includes a separate correlator for each of the sixteen data symbols. The chip data sequence CD1 output from the chip data decision unit 12 is supplied simultaneously to the plurality of correlators CR0 to CR15 in the correlation unit 14. The chip data sequence CD1 is correlated with data symbol ‘0’ by correlator CR0, with data symbol ‘1’ by correlator CR1, with data symbol ‘2’ by correlator CR2, with data symbol ‘3’ by correlator CR3, . . . , and with data symbol ‘15’ by correlator CR15.
The correlators CR0 to CR15 execute despreading correlation calculations using different correlation coefficients, and output correlation values s0 to s15 as a result of the calculations. The correlation coefficients used by each correlator are a data pattern obtained by OQPSK modulation of the 32-chip sequence of the corresponding data symbol, followed by FSK demodulation of the OQPSK-modulated result.
For example, the 32-chip sequence of data symbol ‘0’ in
The combined phase of the modulated signal shifts among points A, B, C, and D in the phase plane shown in
The first chip c0 in the 32-chip sequence for data symbol ‘0’ belongs to the I-phase in
All thirty-two chips representing data symbol ‘0’ are shaped into pulses according to condition (d) and OQPSK modulation is performed. The phase of the modulated signal shifts among points A to D in the phase plane in
As this example shows, after OQPSK modulation and FSK demodulation, the thirty-two chip values of a data symbol in
Correlation coefficients for the other fifteen data symbols (‘1’ to ‘15’) are obtained in the same way. The resulting coefficient sequences are shown in
The correlators CR0 to CR15 calculate the correlation values s0 to s15 by correlating the chip data CD1 with these correlation coefficients. Because there are only thirty-one correlation coefficients for each data symbol, the minimum correlation value is 0 (all chips mismatch) and the maximum correlation value is 31 (all chips match).
Aside from using different correlation coefficients, all sixteen correlators CR0 to CR15 have the same internal structure. If matched-filter correlators are used, for example, each correlator may have the structure shown conceptually in
Referring again to
The data converter 16 outputs binary data BD corresponding to the maximum value signal MV. For example, if the maximum value signal MV indicates data symbol ‘1’, the data converter 16 outputs the binary data ‘1000’ (b0b1b2b3) shown in
Next, the operation of the first embodiment will be described.
In this embodiment, a transmitter (not shown) performs the type of direct-sequence spread spectrum modulation defined by conditions (a) to (d) and transmits the resulting modulated signal MS1, which has a waveform such as the one shown in
The demodulator 10 is disposed in a receiver that receives the modulated signal MS1 via a transmission channel. The frequency detector 11 performs frequency detection (FSK demodulation), and then outputs a frequency-detected signal DT1 as shown in
The timing recovery unit 13 determines the optimal decision timing TM1 for the chip data on the basis of this frequency-detected signal DT1, and the chip data decision unit 12 operates at this optimal timing TM1 to decide whether the value of each chip in the frequency-detected signal DT1 represents ‘1’ or ‘0’ as shown in
The correlators CR0 to CR15 all receive the same chip data sequence CD1, but correlate the chip data CD1 with different correlation coefficients to calculate and output the correlation values s0 to s15. As noted above, the correlation coefficients are not the chip values shown in
The correlation values output by the correlators CR0 to CR15 as the results of correlation with the corresponding correlation coefficients are sent to the maximum value selector 15, which outputs the maximum value signal MV corresponding to the correlator that produced the largest value among the correlation values s0 to s15.
The data converter 16 outputs binary data BD corresponding to the maximum value signal MV, whereby the despreading of the modulated signal MS1 is completed.
In the type of direct-sequence spread spectrum communication defined by the conditions (a) to (d) given above, this embodiment reduces the overall circuit size of the demodulator by using a frequency detector or FSK demodulator instead of a synchronous detector that requires carrier recovery.
A second embodiment will be described below, focusing on the differences from the first embodiment.
The demodulator in the second embodiment takes advantage of the paired relationship among the correlation coefficients shown in
The frequency detector 11, chip data decision unit 12, timing recovery unit 13, maximum value selector 15, data converter 16, and correlators CR0 to CR7 have the same functions as in the first embodiment, so descriptions will be omitted.
The correlation values s0 to s7 output from the correlators CR0 to CR7 in the correlation unit 14A are supplied directly to the maximum value selector 15 and also to the subtractors RD0 to RD7. Correlation value s0 is supplied to the inverting input terminal (negative input terminal) of subtractor RD0; correlation value s1 is supplied to the inverting input terminal of subtractor RD1; . . . ; correlation value s7 is supplied to the inverting input terminal of subtractor RD7. A constant value CT equal to the maximum correlation value (31) noted in the first embodiment is supplied to the non-inverting input terminals (positive input terminals) of the subtractors RD0 to RD7.
Each of the eight subtractors RD0 to RD7 has the same function: the correlation value received at the inverting input terminal is subtracted from the constant value CT received at the non-inverting input terminal, and the subtraction result is sent to the maximum value selector 15.
The sixteen 31-chip sequences of correlation coefficients in
The correlation values s0 and s8 in the first embodiment are therefore complementary. For example, when the correlation value s0 produced by the correlator CR0 for data symbol ‘0’ has the minimum value 0 (no chips match), the correlation value s8 produced by the correlator CR8 for data symbol ‘8’ has the maximum value 31 (all chips match). Accordingly, the difference obtained by subtractor RD0 is equal to correlation value s8 in the first embodiment.
Similarly, the correlation coefficients corresponding to data symbols ‘1’ and ‘9’, ‘2’ and ‘10’, ‘3’ and ‘11’, . . . , and ‘7’ and ‘15’ form complementary pairs, the difference obtained by subtractor RD1 is equal to correlation value s9, the difference obtained by subtractor RD2 is equal to correlation value s10, and so on, the difference obtained by subtractor RD7 being equal to correlation value s15. This makes it possible to obtain sixteen correlation values so to s15 from only the eight correlators CR0 to CR7 and eight subtractors RD0 to RD7 provided in the demodulator 20.
Apart from the method of calculating correlation values s8 to s15, the second embodiment operates in substantially the same way as the first embodiment and produces substantially the same effects, while reducing the number of the correlators in the demodulator by half.
Although it depends on the specific circuit implementation, since a subtractor (such as RD0) has a simpler and smaller circuit configuration than a correlator (such as CR8), the second embodiment can substantially reduce the circuit scale of the demodulator.
The chip sequences in
In the second embodiment, all data (chips) in the paired sequences of correlation coefficients are in a complementary relationship with one another, but any other predictable relationship can be used in a generally similar way. For example, if two sequences of correlation coefficients have identical I-phase values and complementary Q-phase values, the I-phase and Q-phase values can be correlated separately, and the sum and difference of the two results can be manipulated to obtain correlations with two different symbols.
The chip sequences in the first and second embodiments are shaped into sinewave pulse sequences, but the invention can be practiced without shaping the chips into sinewave pulses.
Although the first and second embodiments assume direct-sequence spread spectrum communication using OQPSK modulation, the invention can be practiced in any communication system in which the data symbols have fixed chip sequences. For example, the invention can be practiced with the complementary code keying (CCK) system specified in standard 802.11b of the Institute of Electrical and Electronics Engineers (IEEE) for use with wireless local area networks.
The invention can be practiced in either hardware or software, or a combination of hardware and software.
Those skilled in the art will recognize that further variations are possible within the scope of the invention, which is defined in the appended claims.
|Cited Patent||Filing date||Publication date||Applicant||Title|
|US3613313 *||May 13, 1970||Oct 19, 1971||B J Helmick||Supporting roller assembly for a sliding panel|
|US4897857 *||Aug 22, 1988||Jan 30, 1990||Man Design Co., Ltd.||FSK demodulating device|
|US5210770 *||Sep 27, 1991||May 11, 1993||Lockheed Missiles & Space Company, Inc.||Multiple-signal spread-spectrum transceiver|
|US5684837 *||Mar 6, 1996||Nov 4, 1997||United Microelectronics Corporation||Adjustable digital FSK demodulator|
|US6094449 *||May 8, 1998||Jul 25, 2000||Nec Corporation||Spread spectrum communication synchronization acquisition decoding apparatus|
|US6363106 *||Mar 16, 1998||Mar 26, 2002||Telefonaktiebolaget Lm Ericsson (Publ)||Method and apparatus for despreading OQPSK spread signals|
|US6373881 *||Jul 30, 1998||Apr 16, 2002||Nec Corporation||CDMA receiver using sampled chip sequence for precision synchronization with received data sequence|
|US20010030992 *||Jan 11, 2001||Oct 18, 2001||Kim Sung-Jin||Despreading apparatus and method for CDMA signal|
|US20050089113 *||Oct 27, 2003||Apr 28, 2005||Seidl Neal J.||Wireless communication system and method|
|Citing Patent||Filing date||Publication date||Applicant||Title|
|US7787605||Mar 15, 2005||Aug 31, 2010||Polycom, Inc.||Conference bridge which decodes and responds to control information embedded in audio information|
|US7796565 *||Sep 28, 2006||Sep 14, 2010||Polycom, Inc.||Mixed voice and spread spectrum data signaling with multiplexing multiple users with CDMA|
|US7864938||Mar 15, 2005||Jan 4, 2011||Polycom, Inc.||Speakerphone transmitting URL information to a remote device|
|DE102012221798A1 *||Nov 28, 2012||May 28, 2014||Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V.||Vorrichtung und Verfahren zur Sequenzerkennung für Frequenzumtastung|
|U.S. Classification||375/150, 375/E01.002|
|International Classification||H04B1/707, H04L27/22|
|Cooperative Classification||H04B1/707, H04L27/22|
|European Classification||H04L27/22, H04B1/707|
|Nov 9, 2004||AS||Assignment|
Owner name: OKI ELECTRIC INDUSTRY CO., LTD., JAPAN
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Effective date: 20041007
|Dec 24, 2008||AS||Assignment|
Owner name: OKI SEMICONDUCTOR CO., LTD.,JAPAN
Free format text: CHANGE OF NAME;ASSIGNOR:OKI ELECTRIC INDUSTRY CO., LTD.;REEL/FRAME:022052/0797
Effective date: 20081001
|Jun 13, 2012||FPAY||Fee payment|
Year of fee payment: 4
|Mar 21, 2014||AS||Assignment|
Owner name: LAPIS SEMICONDUCTOR CO., LTD., JAPAN
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Effective date: 20111003