
[0001]
Claim of Priority Under 35 U.S.C. §120

[0002]
The present Application for Patent is a Divisional of Patent Application No. 10/005,104 entitled “Iterative Detection and Decoding for a MIMOOFDM System” filed Dec. 3, 2001, pending, and assigned to the assignee hereof and hereby expressly incorporated by reference herein.
BACKGROUND

[0003]
1. Field

[0004]
The present invention relates generally to data communication, and more specifically to techniques for performing iterative detection and decoding for a MIMOOFDM communication system.

[0005]
2. Background

[0006]
A multipleinput multipleoutput (MIMO) communication system employs multiple (NT) transmit antennas and multiple (NR) receive antennas for data transmission. A MIMO channel formed by the NT transmit and NR receive antennas may be decomposed into NS independent channels, with NS≦min {NT, NR }. Each of the NS independent channels is also referred to as a spatial subchannel of the MIMO channel and corresponds to a dimension. The MIMO system can provide improved performance (e.g., increased transmission capacity) over that of a singleinput singleoutput (SISO) communication system if the additional dimensionalities created by the multiple transmit and receive antennas are utilized.

[0007]
A wideband MIMO system typically experiences frequency selective fading, i.e., different amounts of attenuation across the system bandwidth. This frequency selective fading causes intersymbol interference (ISI), which is a phenomenon whereby each symbol in a received signal acts as distortion to subsequent symbols in the received signal. This distortion degrades performance by impacting the ability to correctly detect the received symbols. As such, ISI is a nonnegligible noise component that may have a large impact on the overall signaltonoiseandinterference ratio (SNR) for systems designed to operate at high SNR levels, such as MIMO systems. In such systems, equalization may be used at the receivers to combat ISI. However, the computational complexity required to perform equalization is typically significant or prohibitive for most applications.

[0008]
Orthogonal frequency division multiplexing (OFDM) may be used to combat ISI, and achieves this without the use of computationally intensive equalization. An OFDM system effectively partitions the system bandwidth into a number of (N_{F}) frequency subchannels, which may be referred to as subbands or frequency bins. Each frequency subchannel is associated with a respective subcarrier upon which data may be modulated. The frequency subchannels of the OFDM system may experience frequency selective fading (i.e., different amounts of attenuation for different frequency subchannels), depending on the characteristics (e.g., multipath profile) of the propagation path between the transmit and receive antennas. With OFDM, the ISI due to the frequency selective fading may be combated by repeating a portion of each OFDM symbol (i.e., appending a cyclic prefix to each OFDM symbol), as is known in the art.

[0009]
A MIMO system may thus advantageously employ OFDM to combat ISI. The frequency subchannels of the MIMOOFDM system may experience different channel conditions (e.g., different fading and multipath effects) and may achieve different SNRs. Moreover, the channel conditions may vary over time. Consequently, the supported data rates may vary from frequency subchannel to frequency subchannel and from spatial subchannel to spatial subchannel, and may further vary with time. To achieve high performance, it is necessary to properly code and modulate the data at the transmitter (e.g., based on the determined channel conditions) and to properly detect and decode the received signals at the receiver.

[0010]
There is therefore a need in the art for techniques to detect and decode signals that may have been (flexibly) coded and modulated based on one or more coding and modulation schemes, e.g., as determined by the channel conditions.
SUMMARY

[0011]
Aspects of the invention provide techniques to iteratively detect and decode data transmitted in a wireless (e.g., MIMOOFDM) communication system. The iterative detection and decoding exploits the error correction capabilities of the channel code to provide improved performance. This is achieved by iteratively passing soft (multibit) “a priori” information between a softinput softoutput detector and a softinput softoutput decoder.

[0012]
The detector receives modulation symbols previously generated at a transmitter system based on one or more coding and modulation schemes, performs a detection function that is complementary to the symbol mapping performed at the transmitter system, and provides softdecision symbols for transmitted coded bits. Extrinsic information in the softdecision symbols (which comprises the a priori information for the decoder, as described below) is then decoded by the decoder based on one or more decoding schemes complementary to the one or more coding schemes used at the transmitter system. The decoder further provides its extrinsic information (which comprises the a priori information for the detector) that is then used by the detector in the detection process.

[0013]
The detection and decoding may be iterated a number of times. During the iterative detection and decoding process, the reliability of the bit decisions is improved with each iteration. The iterative detection and decoding process described herein may be used to combat frequency selective fading as well as flat fading. Moreover, the iterative detection and decoding process may be flexibly used with various types of coding schemes (e.g., serial and parallel concatenated convolutional codes) and with various modulation schemes (e.g., MPSK and MQAM).

[0014]
The a priori information passed between the detector and decoder and the softdecision symbols may be represented using loglikelihood ratios (LLRs). Techniques are provided herein to reduce the computational complexity associated with deriving the LLRs. Such techniques include the use of interference nulling to isolate each transmitted signal by removing the other interferers and the use of a “dualmaxima” or some other approximation to compute the LLRs, which are described below.

[0015]
Various aspects and embodiments of the invention are described in further detail below. The invention further provides methods, receiver units, transmitter units, receiver systems, transmitter systems, systems, and other apparatuses and elements that implement various aspects, embodiments, and features of the invention, as described in further detail below.
BRIEF DESCRIPTION OF THE DRAWINGS

[0016]
The features, nature, and advantages of the present invention will become more apparent from the detailed description set forth below when taken in conjunction with the drawings in which like reference characters identify correspondingly throughout and wherein:

[0017]
FIG. 1 is a block diagram of a transmitter system and a receiver system in a MIMOOFDM system;

[0018]
FIGS. 2A and 2B are block diagrams of two transmitter units that code and modulate data with (1) a single coding and modulation scheme and (2) separate coding and modulation schemes on a perantenna basis, respectively;

[0019]
FIGS. 3A and 3B are block diagrams of serial and parallel concatenated convolutional encoders, respectively;

[0020]
FIG. 3C is a block diagram of a recursive convolutional encoder;

[0021]
FIGS. 4A and 4B are block diagrams of two receiver units that detect and decode data previously processed with (1) a single coding and modulation scheme and (2) separate coding and modulation schemes on a perantenna basis, respectively;

[0022]
FIG. 4C is a block diagram of a receiver unit that performs successive nulling and interference cancellation to recover one transmitted signal at a time;

[0023]
FIGS. 5A and 5B are block diagrams of two Turbo decoders capable of performing iterative decoding for serial and parallel concatenated convolutional codes, respectively; and

[0024]
FIG. 6 is a block diagram of an interference canceller that may be used for the receiver unit in FIG. 4C.
DETAILED DESCRIPTION

[0025]
The iterative detection and decoding techniques described herein may be used for various wireless communication systems. For clarity, various aspects and embodiments of the invention are described specifically for multipleinput multiple output communication system that implements orthogonal frequency division multiplexing (i.e., a MIMOOFDM system).

[0026]
As noted above, a MIMO system employs N_{T }transmit antennas and N_{R }receive antennas for data transmission, where N_{R}≧N_{T}. A MIMO channel formed by the N_{T }transmit antennas and N_{R }receive antennas may be decomposed into N_{S }spatial subchannels, where N_{S}≦min {N_{T}, N_{R}}. An OFDM system effectively partitions the system bandwidth into N_{F }frequency subchannels. Each frequency subchannel may be defined to be sufficiently narrow so that its frequency response is considered flat or frequency nonselective. A MIMOOFDM system may thus transmit data via a number of (N_{C}) “transmission channels” (where N_{C}=N_{S}·N_{F}), with each such transmission channel corresponding to a frequency subchannel of a spatial subchannel.

[0027]
FIG. 1 is a block diagram of an embodiment of a transmitter system 110 and a receiver system 150 in a MIMOOFDM system 100. Transmitter system 110 and receiver system 150 are capable of implementing various aspects and embodiments of the invention, as described below.

[0028]
At transmitter system 110, traffic data is provided at a particular data rate from a data source 112 to a transmit (TX) data processor 114, which codes and interleaves the traffic data based on one or more coding schemes to provide coded data. The coding may be performed based on a single coding scheme for all transmit antennas, one coding scheme for each transmit antenna or each subset of transmit antennas, or one coding scheme for each transmission channel or each group of transmission channels. The data rate and the coding may be determined by a data rate control and a coding control, respectively, provided by a controller 130.

[0029]
The coded data is then provided to a modulator 116, which may also receive pilot data (e.g., data of a known pattern and processed in a known manner). The pilot data may be multiplexed with the coded traffic data (e.g., using time division multiplexing (TDM) or code division multiplexing (CDM)) in all or a subset of the frequency subchannels and in all or a subset of the spatial subchannels used to transmit the traffic data. The pilot may be used by the receiver system to perform a number of functions such as acquisition, frequency and timing synchronization, channel estimation, coherent data demodulation, and so on.

[0030]
In a specific embodiment, the processing by modulator 116 includes (1) modulating the received data with one or more modulation schemes (e.g., MPSK, MQAM, and so on) to provide modulation symbols, (2) transforming the modulation symbols to form OFDM symbols, and (3) appending a cyclic prefix to each OFDM symbol to form a corresponding transmission symbol. Similarly, the modulation may be performed based on a single modulation scheme for all transmit antennas, one modulation scheme for each transmit antenna or each subset of transmit antennas, or one modulation scheme for each transmission channel or each group of transmission channels. The modulation is performed based on a modulation control provided by controller 130. The modulated data (i.e., the transmission symbols) is then provided to transmitters (TMTR) 122 a through 122 t associated with the N_{T }transmit antennas to be used for data transmission.

[0031]
Each transmitter 122 converts the received modulated data into one or more analog signals and further conditions (e.g., amplifies, filters, and quadrature modulates) the analog signals to generate a modulated signal suitable for transmission over the communication channel. The modulated signals from transmitters 122 a through 122 t are then transmitted via antennas 124 a through 124 t, respectively, to the receiver system.

[0032]
At receiver system 150, the transmitted modulated signals are received by antennas 152 a through 152 r, and the received signal from each antenna is provided to a respective receiver (RCVR) 154. Each receiver 154 conditions (e.g., filters, amplifies, and downconverts) a respective received signal and digitizes the conditioned signal to provide a respective stream of data samples, which represent the transmission symbols received via the associated antenna. A demodulator (Demod) 156 receives and demodulates the N_{R }data sample streams from receivers 154 a through 154 r to provide N_{R }corresponding streams of received modulation symbols. For each data sample stream, demodulator 156 removes the cyclic prefix included in each transmission symbol and then transforms each received OFDM symbol to provide a corresponding stream of received modulation symbols.

[0033]
A detector/decoder 158 initially performs the detection function that is complementary to the symbol mapping and provides softdecision (multibit) symbols for the coded bits transmitted from the transmitter system. The softdecision symbols are then decoded based on one or more decoding schemes complementary to the one or more coding schemes used at the transmitter system. In an aspect, the detection and decoding may be performed iteratively a number of times, as described in further detail below. The decoded data is then provided to a data sink 160.

[0034]
Controllers 130 and 170 direct the operation at the transmitter and receiver systems, respectively. Memories 132 and 172 provide storage for program codes and data used by controllers 130 and 170, respectively.
Transmitter System

[0035]
FIG. 2A is a block diagram of a transmitter unit 200 a, which is an embodiment of the transmitter portion of transmitter system 110 in FIG. 1. In this embodiment, a single coding scheme is used for all N_{T }transmit antennas and a single modulation scheme is used for all N_{F }frequency subchannels of all transmit antennas. Transmitter unit 200 a includes (1) a TX data processor 114 a that receives and codes traffic data in accordance with a specific coding scheme to provide coded data and (2) a modulator 116 a that modulates the coded data in accordance with a specific modulation scheme to provide modulated data. TX data processor 114 a and modulator 116 a are thus one embodiment of TX data processor 114 and modulator 116, respectively, in FIG. 1.

[0036]
In the specific embodiment shown in FIG. 2A, TX data processor 114 a includes an encoder 212, a channel interleaver 214, and a demultiplexer (Demux) 216. Encoder 212 receives and codes the traffic data (i.e., the information bits) in accordance with the selected coding scheme to provide coded bits. The coding increases the reliability of the data transmission. The selected coding scheme may include any combination of cyclic redundancy check (CRC) coding, convolutional coding, Turbo coding, block coding, and so on. Several designs for encoder 212 are described below.

[0037]
Channel interleaver 214 then interleaves the coded bits based on a particular interleaving scheme and provides interleaved coded bits. The interleaving provides time diversity for the coded bits, permits the data to be transmitted based on an average signaltonoiseandinterference ratio (SNR) for the frequency and/or spatial subchannels used for the data transmission, combats fading, and further removes correlation between coded bits used to form each modulation symbol. The interleaving may further provide frequency diversity if the coded bits are transmitted over multiple frequency subchannels. The coding and channel interleaving are described in further detail below.

[0038]
Demultiplexer 216 then demultiplexes the interleaved and coded data into N_{T }coded data streams for the N_{T }transmit antennas to be used for the data transmission. The N_{T }coded data streams are then provided to modulator 116 a.

[0039]
In the specific embodiment shown in FIG. 2A, modulator 116 a includes N_{T }OFDM modulators, with each OFDM modulator assigned to process a respective coded data stream for one transmit antenna. Each OFDM modulator includes a symbol mapping element 222, an inverse fast Fourier transformer (IFFT) 224, and a cyclic prefix generator 226. In this embodiment, all N_{T }symbol mapping elements 222 a through 222 t implement the same modulation scheme.

[0040]
Within each OFDM modulator, symbol mapping element 222 maps the received coded bits to modulation symbols for the (up to) N_{F }frequency subchannels to be used for data transmission on the transmit antenna associated with the OFDM modulator. The particular modulation scheme to be implemented by symbol mapping element 222 is determined by the modulation control provided by controller 130. For OFDM, the modulation may be achieved by grouping sets of q coded bits to form nonbinary symbols and mapping each nonbinary symbol to a specific point in a signal constellation corresponding to the selected modulation scheme (e.g., QPSK, MPSK, MQAM, or some other scheme). Each mapped signal point corresponds to an Mary modulation symbol, where M=2^{q}. Symbol mapping element 222 then provides a vector of (up to) N_{F }modulation symbols for each transmission symbol period, with the number of modulation symbols in each vector corresponding to the number of frequency subchannels to be used for data transmission for that transmission symbol period.

[0041]
If conventional noniterative symbol demapping and decoding are performed at the receiver system, then Gray mapping may be preferably used for the symbol mapping since it may provide better performance in terms of bit error rate (BER). With Gray mapping, the neighboring points in the signal constellation (in both the horizontal and vertical directions) differ by only one out of the q bit positions. Gray mapping reduces the number of bit errors for more likely error events, which correspond to a received modulation symbol being mapped to a location near the correct location, in which case only one coded bit would be received in error.

[0042]
However, if iterative detection and decoding are performed as described below, it can be shown that nonGray mapping outperforms Gray mapping. This is true due to the fact that independence between the coded bits enhances independence between the detection and decoding processes, which then provides improved performance when iterative detection and decoding are performed. Thus, each symbol mapping element 222 may be designed to implement a nonGray mapped constellation. In certain instances, improved performance may be achieved if the constellation is defined such that neighboring points differ by as many bit positions as possible (i.e., the opposite goal as for Gray mapping, or “antiGray” mapping).

[0043]
IFFT 224 then converts each modulation symbol vector into its timedomain representation (which is referred to as an OFDM symbol) using the inverse fast Fourier transform. IFFT 224 may be designed to perform the inverse transform on any number of frequency subchannels (e.g., 8, 16, 32, . . . , NF, . . . ). In an embodiment, for each OFDM symbol, cyclic prefix generator 226 repeats a portion of the OFDM symbol to form a corresponding transmission symbol. The cyclic prefix ensures that the transmission symbol retains its orthogonal properties in the presence of multipath delay spread, thereby improving performance against deleterious path effects such as channel dispersion caused by frequency selective fading. The transmission symbols from cyclic prefix generator 226 are then provided to an associated transmitter 122 and processed to generate a modulated signal, which is then transmitted from the associated antenna 124.

[0044]
FIG. 2B is a block diagram of a transmitter unit 200 b, which is another embodiment of the transmitter portion of transmitter system 110 in FIG. 1. In this embodiment, a particular coding scheme is used for each of the N_{T }transmit antennas and a particular modulation scheme is used for all N_{F }frequency subchannels of each transmit antenna (i.e., separate coding and modulation on a perantenna basis). The specific coding and modulation schemes to be used for each transmit antenna may be selected based on the expected channel conditions (e.g., by the receiver system and sent back to the transmitter system).

[0045]
Transmitter unit 200 b includes (1) a TX data processor 114 b that receives and codes traffic data in accordance with separate coding schemes to provide coded data and (2) a modulator 116 b that modulates the coded data in accordance with separate modulation schemes to provide modulated data. TX data processor 114 b and modulator 116 b are another embodiment of TX data processor 114 and modulator 116, respectively, in FIG. 1.

[0046]
In the specific embodiment shown in FIG. 2B, TX data processor 114 b includes a demultiplexer 210, N_{T }encoders 212 a through 212 t, and N_{T }channel interleavers 214 a through 214 t (i.e., one set of encoder and channel interleaver for each transmit antenna). Demultiplexer 210 demultiplexes the traffic data (i.e., the information bits) into N_{T }data streams for the N_{T }transmit antennas to be used for the data transmission. Each data stream is then provided to a respective encoder 212.

[0047]
Each encoder 212 receives and codes a respective data stream based on the specific coding scheme selected for the corresponding transmit antenna to provide coded bits. The coded bits from each encoder 212 are then provided to a respective channel interleaver 214, which interleaves the coded bits based on a particular interleaving scheme to provide diversity. Channel interleavers 214 a through 214 t then provide to modulator 116 b N_{T }interleaved and coded data streams for the N_{T }transmit antennas.

[0048]
In the specific embodiment shown in FIG. 2B, modulator 116 b includes N_{T }OFDM modulators, with each OFDM modulator including symbol mapping element 222, IFFT 224, and cyclic prefix generator 226. In this embodiment, the N_{T }symbol mapping elements 222 a through 222 t may implement different modulation schemes. Within each OFDM modulator, symbol mapping element 222 maps groups of q_{n }coded bits to form M_{n}ary modulation symbols, where M_{n }corresponds to the specific modulation scheme selected for the nth transmit antenna (as determined by the modulation control provided by controller 130) and M_{n}=2^{q} ^{ n }. The subsequent processing by IFFT 224 and cyclic prefix generator 226 is as described above.

[0049]
Other designs for the transmitter unit may also be implemented and are within the scope of the invention. For example, the coding and modulation may be separately performed for each subset of transmit antennas, each transmission channel, or each group of transmission channels. The implementation of encoders 212, channel interleavers 214, symbol mapping elements 222, IFFTs 224, and cyclic prefix generators 226 is known in the art and not described in detail herein.

[0050]
The coding and modulation for MIMO systems with and without OFDM are described in further detail in U.S. patent application Ser. Nos. 09/826,481 and 09/956,449, both entitled “Method and Apparatus for Utilizing Channel State Information in a Wireless Communication System,” respectively filed Mar. 23, 2001 and Sep. 18, 2001; U.S. patent application Ser. No. 09/854,235, entitled “Method and Apparatus for Processing Data in a MultipleInput MultipleOutput (MIMO) Communication System Utilizing Channel State Information,” filed May 11, 2001; U.S. patent application Ser. No. 09/776,075, entitled “Coding Scheme for a Wireless Communication System,” filed Feb. 1, 2001; and U.S. patent application Ser. No. 09/993,087, entitled “MultipleAccess MultipleInput MultipleOutput (MIMO) Communication System,” filed Nov. 6, 2001. These applications are all assigned to the assignee of the present application and incorporated herein by reference. Still other coding and modulation schemes may also be used, and this is within the scope of the invention.

[0051]
An example OFDM system is described in U.S. patent application Ser. No. 09/532,492, entitled “High Efficiency, High Performance Communication System Employing MultiCarrier Modulation,” filed Mar. 30, 2000, assigned to the assignee of the present invention and incorporated herein by reference. OFDM is also described by John A. C. Bingham in a paper entitled “Multicarrier Modulation for Data Transmission: An Idea Whose Time Has Come,” IEEE Communications Magazine, May 1990, which is incorporated herein by reference.
Encoding

[0052]
Various types of encoder may be used to code data prior to transmission. For example, the encoder may implement any one of the following (1) a serial concatenated convolutional code (SCCC), (2) a parallel concatenated convolutional code (PCCC), (3) a simple convolutional code, (4) a concatenated code comprised of a block code and a convolutional code, and so on. Concatenated convolutional codes are also referred to as Turbo codes.

[0053]
FIG. 3A is a block diagram of an embodiment of a serial concatenated convolutional encoder 212 x, which may be used for each of encoders 212 in FIGS. 2A and 2B. Encoder 212 x includes an outer convolutional encoder 312 a, a code interleaver 314, and an inner convolutional encoder 312 b, all coupled in series. Outer convolutional encoder 312 a codes the information bits with a particular outer code of code rate R_{o}. The coded output from encoder 312 a is provided to code interleaver 314, which interleaves each packet of N_{P }coded bits in accordance with a particular (e.g., pseudorandom) interleaving scheme.

[0054]
Code interleaver 314 may implement any one of a number of interleaving schemes, such as the ones used for cdma2000 and WCDMA. In one specific interleaving scheme, the N_{P }coded bits in a packet are written, by row, into a 2^{5}row by 2^{n}column array, where n is the smallest integer such that N_{P}≦2^{5+n}. The rows are then shuffled in accordance with a bitreversal rule. For example, row 1 (“00001”) is swapped with row 16 (“10000”), row 3 (“00011”) is swapped with row 24 (“11000”), and so on. The bits within each row are then permutated (i.e., rearranged) according to a rowspecific linear congruential sequence (LCS). The LCS for row k may be defined as x_{k}(i+1)={x_{k}(i)+c_{k}} mod 2^{n}, where i=0, 1, . . . 2^{n}−1, x_{k}(0)=c_{k}, and c_{k }is a specific value selected for each row and is further dependent on the value for n. For the permutation in each row, the ith bit in the row is placed in location x(i). The bits in the array are then read out by column.

[0055]
The LCS code interleaving scheme is described in further detail in commonly assigned U.S. patent application Ser. No. 09/205,511, entitled “Turbo Code Interleaver Using Linear Congruential Sequences,” filed Dec. 4, 1998, and in a cdma2000 document entitled “C.S0002A1 Physical Layer Standard for cdma2000 Spread Spectrum Systems,” both of which are incorporated herein by reference. Other code interleavers may also be used and are within the scope of the invention. For example, a random interleaver or a symmetricalrandom (Srandom) interleaver may also be used instead of the LCS interleaver described above.

[0056]
Inner convolutional encoder 312 b receives and further codes the interleaved bits from code interleaver 314 with a particular inner code of code rate R_{i}. In an embodiment, encoder 312 b implements a recursive code to fully realize the benefit of the significant interleaving gain provided by code interleaver 314. The inner code does not need to be a powerful code since the key desired property is recursiveness. In fact, the inner code may simply be a rate1 differential code. The overall code rate for serial concatenated convolutional encoder 212 x is R_{sccc}=R_{o}·R_{i}.

[0057]
FIG. 3B is a block diagram of an embodiment of a parallel concatenated convolutional encoder 212 y, which may also be used for each of encoders 212 in FIGS. 2A and 2B. Encoder 212 y includes two constituent convolutional encoder 312 c and 312 d, a code interleaver 324, a puncturing element 326, and a paralleltoserial (P/S) converter 328. Code interleaver 324 interleaves the information bits in accordance with a particular (i.e., pseudorandom) interleaving scheme, and may be implemented as described above for code interleaver 314.

[0058]
As shown in FIG. 3B, the information bits are provided to convolutional encoder 312 c and the interleaved information bits are provided to convolutional encoder 312 d. Each encoder 312 codes the received bits based on a particular constituent code and provides a respective stream of parity bits. Encoders 312 c and 312 d may be implemented with two recursive systematic constituent codes with code rates of R_{1 }and R_{2}, respectively. The recursive codes maximize the benefits provided by the interleaving gain.

[0059]
The parity bits b^{y }and b^{z }from encoders 312 c and 312 d, respectively, are provided to puncturing element 326, which punctures (i.e., deletes) zero or more of the parity bits to provide the desired number of output bits. Puncturing element 326 is an optional element that may be used to adjust the overall code rate, R_{PCCC}, of the parallel concatenated convolutional encoder, which is given by 1/R_{PCCC} =1/R _{1} +1/R _{2}−1.

[0060]
The information bits (which are also referred to as the systematic bits), and the punctured parity bits from convolutional encoders 312 c and 312 d are provided to P/S converter 328 and serialized into a coded bit stream that is provided to the next processing element.

[0061]
FIG. 3C is a block diagram of an embodiment of a recursive convolutional encoder 312 x, which may be used for each of encoders 312 a through 312 d in FIGS. 3A and 3B. Encoder 312 x may also be used for each of encoders 212 in FIGS. 2A and 2B.

[0062]
In the embodiment shown in
FIG. 3C, encoder
312 x implements the following, transfer function for the recursive convolutional code:
$G\left(D\right)=\left[\begin{array}{cc}1& \frac{n\left(D\right)}{d\left(D\right)}\end{array}\right],$
where

 n(D)=1+D+D^{3}, and
 d(D)=1+D^{2}+D^{3}.
Encoder 312 x may also be designed to implement other convolutional codes, and this is within the scope of the invention.

[0065]
Encoder 312 x includes a number of seriescoupled delay elements 332, a number of modulo2 adders 334, and a switch 336. Initially, the states of delay elements 332 are set to zeros and switch 336 is in the up position. Then, for each received bit in a packet, adder 334 a performs modulo2 addition of the received bit with the output bit from adder 334 c and provides the result to delay element 332 a. Adder 334 b performs modulo2 addition of the bits from adder 334 a and delay elements 332 a and 332 c and provides the parity bit. Adder 334 c performs modulo2 addition of the bits from delay elements 332 b and 332 c.

[0066]
After all N_{1 }information bits in the packet have been coded, switch 336 is moved to the down position and three zero (“0”) bits are provided to encoder 312 x. Encoder 312 x then codes the three zero bits and provides three tail systematic bits and three tail parity bits.

[0067]
It can be shown analytically and via computer simulations that SCCCs provide better performance than PCCCs in additive white Gaussian noise (AWGN) channels at medium to high SNR levels, which is typically the desired operating region for MIMO systems. While the BER for PCCCs asymptotically reaches an error floor, this floor is absent or much lower for SCCCs. PCCCs outperform SCCCs in the high BER region, and may be more suitably used when the system loads approach the capacity limits of the channel at low SNRs. Both PCCCs and SCCCs may be implemented using relatively simple constituent codes (e.g., having constraint lengths of 3 to 16), such as the one shown in FIG. 3C.
Channel Interleaving

[0068]
Referring back to FIGS. 2A and 2B, the coded bits from each encoder 212 are interleaved by a respective channel interleaver 214 to provide temporal, frequency, and/or spatial diversity against deleterious path effects (e.g., fading and multipath). Moreover, since the coded bits are subsequently grouped together to form nonbinary symbols that are then mapped to Mary modulation symbols, the interleaving may be used to ensure that the coded bits that form each modulation symbol are not located close to each other temporally (i.e., the channel interleaving distributes the coded bits that are temporally close together in a pseudorandom manner among modulation symbols that may be transmitted over different frequency subchannels, spatial subchannels, and/or transmission symbol periods). The combination of encoding, channel interleaving and symbol mapping (especially antiGray mapping) may be viewed as a serial concatenated code, where the symbol mapper takes on the role of the inner code. The channel interleaver provides interleaving gain in much the same way as in an SCCC, as described earlier. This potential for performance gain is unlocked by the iterative receiver structure described below. The channel interleaving can provide improved performance for various coding and modulation schemes, such as a single common coding and modulation scheme for all transmit antennas or separate coding and modulation scheme per antenna.

[0069]
Various interleaving schemes may be used for the channel interleaver. In one interleaving scheme, the coded bits for each packet are written (linearly) to rows of an array. The bits in each row may then be permutated (i.e., rearranged) based on (1) a bitreversal rule, (2) a linear congruential sequence (such as the one described above for the code interleaver), (3) a randomly generated pattern, or (4) a permutation pattern generated in some other manner. The rows are also permutated in accordance with a particular row permutation pattern. The permutated coded bits are then retrieved from each column of the array and provided to the next processing element. Other channel interleaving schemes may also be used and this is within the scope of the invention.

[0070]
In an embodiment, the channel interleaving is performed separately for each independently coded data stream. For the PCCCs, the information bits and the tail and parity bits for each packet may also be channel interleaved separately. For example, the information bits b^{x}, the tail and parity bits b^{y }from the first constituent encoder 312 c, and the tail and parity bits b^{z }from the second constituent encoder 312 d may be interleaved by three separate channel interleavers, which may employ the same or different interleaving schemes. This separate channel interleaving allows for flexible puncturing of the individual parity bits.

[0071]
The interleaving interval may be selected to provide the desired temporal, frequency, and/or spatial diversity, or any combination thereof. For example, the coded bits for a particular time period (e.g., 10 msec, 20 msec, and so on) and for a particular combination of transmission channels may be interleaved. The channel interleaving may be performed for each transmit antenna, or across each group of transmit antennas or across all transmit antennas to provide spatial diversity. The channel interleaving may also be performed for each frequency subchannel, or across each group of frequency subchannels or across all frequency subchannels to provide frequency diversity. The channel interleaving may also be performed across each group of one or more frequency subchannels of each group of one or more transmit antennas such that the coded bits from one data stream may be distributed over one or more frequency subchannels of one or more transmit antennas to provide a combination of temporal, frequency, and spatial diversity. The channel interleaving may also be performed across all frequency subchannels of all transmit antennas.
Receiver System

[0072]
FIG. 4A is a block diagram of an embodiment of a receiver unit 400 a, which is an embodiment of the receiver portion of receiver system 150 in FIG. 1. In this embodiment, a single demodulation scheme is used for all N_{F }frequency subchannels of all N_{T }transmit antennas and a single decoding scheme is used for all transmit antennas. Receiver unit 400 a may thus be used to receive a data transmission from transmitter unit 200 a in FIG. 2A.

[0073]
The signals transmitted from the N_{T }transmit antennas are initially received by each of N_{R }antennas 152 a through 152 r and routed to a respective receiver 154 (which is also referred to as a frontend unit). Each receiver 154 conditions (e.g., filters, amplifies, and downconverts) a respective received signal and further digitizes the conditioned signal to provide data samples. Each receiver 154 may further demodulate the data samples with a recovered pilot to provide a stream of received transmission symbols, which is provided to a demodulator 156 a.

[0074]
In the specific embodiment shown in FIG. 4A, demodulator 156 a includes N_{R }OFDM demodulators, with each OFDM demodulator assigned to process a respective transmission symbol stream from one receive antenna. Each OFDM demodulator includes a cyclic prefix remover 412 and a fast Fourier transformer (FFT) 414. Cyclic prefix remover 412 removes the cyclic prefix previously appended to each OFDM symbol by the transmitter system to ensure ISIfree reception of the transmitted modulation symbols. FFT 414 then transforms each received OFDM symbol to provide a vector of N_{F }received modulation symbols for the N_{F }frequency subchannels used to transmit the OFDM symbol. The N_{R }modulation symbol vectors from all N_{R }OFDM demodulators for each transmission symbol period are provided to a detector/decoder 158 a, which is one embodiment of detector/decoder 158 in FIG. 1.

[0075]
In the embodiment shown in FIG. 4A, detector/decoder 158 a includes a detector 420 a and a decoder 430 that perform iterative detection and decoding on the modulation symbols received from all N_{R }receive antennas to provide decoded data. The iterative detection and decoding exploits the error correction capabilities of the channel code to provide improved performance. This is achieved by iteratively passing soft “a priori” information between the softinput softoutput (SISO) detector 420 a and the softinput softoutput decoder 430, as described in further detail below.

[0076]
Detector 420 a receives the modulation symbols from demodulator 156 a and a priori information from decoder 430 and derives softdecision (i.e., multibit) symbols for all N_{F }frequency subchannels of all N_{T }transmit antennas, with each such softdecision symbol being an estimate of a coded bit transmitted by the transmitter system. As described in further detail below, the softdecision symbols may be represented as loglikelihood ratios (LLRs), which are denoted as L(b_{k}) in FIG. 4A.

[0077]
For each transmission symbol period, detector 420 a provides up to N_{B }softdecision symbols to N_{B }respective summers 422, where N_{B}=N_{T}·N_{F}·q and q is dependent on the specific modulation scheme used for the data transmission. Each summer 422 also receives the a priori information for its coded bit b_{k }from decoder 430 (which is referred to as the detector a priori information and denoted as L_{a}(b_{k})), and subtracts this detector a priori information from the received softdecision symbol to derive extrinsic information for the coded bit (denoted as L_{e}(b_{k})). The extrinsic information for all (N_{T}·N_{F}·q) coded bits is then (1) converted from parallel to serial by a P/S converter 424, (2) deinterleaved by a channel deinterleaver 426 in a manner complementary to the channel interleaving performed at the transmitter system, and (3) provided as a priori information from the detector to the decoder (which is referred to as the decoder a priori information and denoted as L_{a} ^{D}(b_{k})).

[0078]
Decoder 430 uses the decoder a priori information in the decoding process and provides the decoded data. Decoder 430 further provides “a posteriori” information (denoted as L^{D}(b_{k})) to a summer 432. Summer 432 then subtracts the decoder a priori information, L_{a} ^{D}(b_{k}), from the decoder a posteriori information, L^{D}(b_{k}), to derive extrinsic information from the decoder for the detector (denoted as L_{e} ^{D}(b_{k})). This detector extrinsic information is then interleaved by a channel interleaver 434, converted from serial to parallel by a S/P converter 436, and provided as the detector a priori information, L_{a}(b_{k}), to detector 420 a and summers 422.

[0079]
To briefly summarize, the output of the detection process may be expressed as:
L _{e}(
b _{k})=
L(
b _{k})−
L _{a}(
b _{k}), Eq (1)
where L(b
_{k}) represents the softdecision symbol for the kth coded bit b
_{k};

 L_{a}(b_{k}) represents the detector a priori information for the kth coded bit, which is provided by the decoder; and
 L_{e}(b_{k}) represents the extrinsic information for the kth coded bit provided by the detector to the decoder.
The output of the decoding process may similarly be expressed as:
L _{e} ^{D}(b _{k})=L ^{D}(b _{k})−L _{a} ^{D}(b _{k}), Eq (2)
where L^{D}(b_{k}) represents the a posteriori information for the kth coded bit provided by the decoder;
 L_{a} ^{D}(b_{k}) represents the decoder a priori information for the kth coded bit provided by the detector; and
 L_{e} ^{D}(b_{k}) represents the extrinsic information for the kth coded bit provided by the decoder to the detector.

[0084]
As shown in FIG. 4A, the decoder a priori information, L_{a} ^{D}(b_{k}), is simply the detector extrinsic information, L_{e}(b_{k}), after the paralleltoserial conversion and channel deinterleaving. Similarly, the detector a priori information, L_{a}(b_{k}), is simply the decoder extrinsic information, L_{e} ^{D}(b_{k}), after the channel interleaving and serialtoparallel conversion.

[0085]
The detection and decoding process may be iterated a number of times. During the iterative detection and decoding process, the reliability of the bit decisions is improved with each iteration. The iterative detection and decoding process described herein may be used to combat frequency selective fading (e.g., by using OFDM with cyclic prefix) as well as flat fading (without any modifications). Moreover, the iterative detection and decoding process may be flexibly used with various types of coding and modulation schemes, including the serial and parallel concatenated convolutional codes as described above.

[0086]
In FIG. 4A, detector 420 a provides softdecision symbols for the transmitted coded bits based on the modulation symbols received from the N_{R }receive antennas as well as the a priori information fed back from decoder 430. The softdecision symbols may be conveniently represented in the form of loglikelihood ratios (LLRs) and include channel information, extrinsic information, and a priori information. The channel information for each coded bit includes information about the channel response between the transmit and receive antennas. The extrinsic information for each coded bit comprises incremental information about that coded bit that is extracted from other coded bits in the detection process. And the a priori information for each coded bit includes information about the coded bit that is known or derived outside the detection process.

[0087]
In an embodiment, only the channel information and extrinsic information are passed from the detector to the decoder where, after paralleltoserial conversion and channel deinterleaving, they are used as a priori information in the decoding process. For simplicity, the channel information and extrinsic information are collectively referred to as simply the extrinsic information. Ideally, the decoder a priori information should be provided by an independent source. However, since such a source is not available, an independent source may be mimicked by minimizing the correlation between the decoder a priori information (i.e., the detector output) and previous decisions made by the decoder (i.e., the detector a priori information). This is achieved by subtracting the detector a priori information from the softdecision symbols derived by the detector, using summers 422 as shown in FIG. 4A.
LLR Computation by Detector

[0088]
The modulation symbol received from the output of the OFDM demodulator coupled to the mth receive antenna for the lth frequency subchannel at time index j (i.e., transmission symbol period j) may be expressed as:
$\begin{array}{cc}{r}_{m,l}\left(j\right)=\sum _{n=1}^{{N}_{T}}{h}_{n,m,l}\left(j\right)\xb7{c}_{n,l}\left(j\right)+{n}_{m,l}\left(j\right),& \mathrm{Eq}\text{\hspace{1em}}\left(3\right)\end{array}$
where h
_{n,m,l}(j) is the channel response between the nth transmit antenna and the mth receive antenna for the lth frequency subchannel at time index j;

 C_{n,l}(j) is the modulation symbol transmitted on the lth frequency subchannel of the nth transmit antenna; and
 n_{m,l}(j) is a sample function of a zeromean, temporally and spatially white Gaussian noise process.
To simplify notation, the time index j is dropped in the following derivations.

[0091]
Equation (3) may be expressed in matrix form, as follows:
r _{l} =H _{l} c _{l} +n _{l}, for
l=0, 1, 2
, . . . , N _{F}−1, Eq (4)
where
r _{l}=[r
_{1.l }r
_{2.l }. . . r
_{N} _{ R } _{,l}]
^{T }is a vector of N
_{R }modulation symbols received from the N
_{R }receive antennas for the lth frequency subchannel;

 H _{l }is the N_{R}×N_{T }matrix of channel gains {h_{n,m,l}} for the lth frequency subchannel, where h_{n,m,l }denotes the complex channel gain between the nth transmit antenna and the mth receive antenna for the lth frequency subchannel;
 c _{l}=[c_{1.l }c_{2.l }. . . c_{N} _{ T } _{,l}]^{T }is a vector of N_{T }modulation symbols transmitted from the N_{T }transmit antennas for the lth frequency subchannel;
 n _{l}=[n_{1.l }n_{2.l }. . . n_{N} _{ R } _{,l]} ^{T }is a vector of N_{R }noise samples for the N_{R }receive antennas for the lth frequency subchannel; and
 “^{T}” denotes the transposition.

[0096]
The modulation symbols received from all N_{F }frequency subchannels of all N_{R }receive antennas for each time index may be expressed as:
r=[ r _{0} ^{T } r _{1} ^{T } . . . r _{N} _{ F } _{−1} ^{T}]^{T}. Eq (5)

[0097]
The N_{F}·N_{R }received modulation symbols in r correspond to the N_{F}·N_{T }transmitted modulation symbols, which may be expressed as:
c=[c _{1} ^{T } c _{2} ^{T }. . . c _{N} _{ T } ^{T}]^{T}. Eq (6)

[0098]
As noted above, each modulation symbol is formed by a respective group of q coded bits. The N_{F}·N_{R }received modulation symbols in r thus further correspond to the N_{F}·N_{T}·q transmitted coded bits, which may be expressed as:
b=[b _{1} ^{T}, b _{2} ^{T}, . . . b _{N} _{ T } ^{T}]^{T}, Eq (7)
where the coded bits transmitted from the nth transmit antenna may be expressed as
b _{n} =[b _{n,0,1 } . . . b _{n,0,q } b _{n,1,l } . . . b _{n,1,q } . . . b _{n,N} _{ F } _{−1,l } . . . b _{n,N} _{ F } _{−1,q}]^{T}.

[0099]
The detector computes the LLRs for each transmitted coded bit b_{n,l,i}, as follows:
$\begin{array}{cc}L\left({b}_{n,l,i}\right)=\mathrm{ln}\text{\hspace{1em}}\frac{\mathrm{Pr}\left\{{b}_{n,l,i}=+1\underset{\underset{\_}{\_}}{r}\right\}}{\mathrm{Pr}\left\{{b}_{n,l,i}=1\underset{\underset{\_}{\_}}{r}\right\}},\begin{array}{c}\mathrm{for}\text{\hspace{1em}}n=1,2,\dots \text{\hspace{1em}},{N}_{T},\\ \text{\hspace{1em}}l=0,1,\dots \text{\hspace{1em}},{N}_{F}1,\\ \mathrm{and}\text{\hspace{1em}}i=1,2,\dots \text{\hspace{1em}},q.\end{array}& \mathrm{Eq}\text{\hspace{1em}}\left(8\right)\end{array}$

[0100]
As shown in equation (8), the LLR for a given coded bit, L(b_{n,l,i}), is computed as the (natural) logarithm of the ratio of the probability of the coded bit b_{n,l,i }being a +1 given the received modulation symbols r, Pr{b_{n,l,i}=+1r}, over the probability of the coded bit b_{n,l,i }being a −1 given the received modulation symbols r, Pr{b_{n,l,i}=−1r}. The probabilities for each coded bit are derived based on the received modulation symbol containing that bit and the sequence of coded bits received for r, as derived below.

[0101]
The following equalities may be expressed:
$\begin{array}{cc}\begin{array}{c}\mathrm{Pr}\left\{{b}_{n,l,i}=\pm 1\underset{\underset{\_}{\_}}{r}\right\}\mathrm{Pr}\left\{\underset{\underset{\_}{\_}}{r}\right\}=\sum _{\underset{\underset{\_}{\_}}{b}:{b}_{n,l,i}=\pm 1}\mathrm{Pr}\left\{\underset{\underset{\_}{\_}}{r},\underset{\underset{\_}{\_}}{b}\right\}\\ =\sum _{\underset{{b}_{n,l,i}=\pm 1}{\underset{\underset{\_}{\_}}{c}:\underset{\underset{\_}{\_}}{c}=f\left(\underset{\underset{\_}{\_}}{b}\right)}}\mathrm{Pr}\left\{\underset{\underset{\_}{\_}}{r},\underset{\underset{\_}{\_}}{c}\right\}\\ =\sum _{\underset{{b}_{n,l,i}=\pm 1}{\underset{\underset{\_}{\_}}{c}:\underset{\underset{\_}{\_}}{c}=f\left(\underset{\underset{\_}{\_}}{b}\right)}}\mathrm{Pr}\left\{\underset{\underset{\_}{\_}}{r}\underset{\underset{\_}{\_}}{c}\right\}\text{\hspace{1em}}\mathrm{Pr}\left\{\underset{\underset{\_}{\_}}{c}\right\},\end{array}& \mathrm{Eq}\text{\hspace{1em}}\left(9\right)\end{array}$
where ƒ(·) represents the symbol mapping from the coded bits b to the modulation symbols c. The LLRs may then be expressed as:
$\begin{array}{cc}L\left({b}_{n,l,i}\right)=\mathrm{ln}\text{\hspace{1em}}\frac{\sum _{\underset{{b}_{n,l,i}=\pm 1}{\underset{\underset{\_}{\_}}{c}:\underset{\underset{\_}{\_}}{c}=f\left(\underset{\underset{\_}{\_}}{b}\right)}}\mathrm{Pr}\left\{\underset{\underset{\_}{\_}}{r}\underset{\underset{\_}{\_}}{c}\right\}\text{\hspace{1em}}\mathrm{Pr}\left\{\underset{\underset{\_}{\_}}{c}\right\}}{\sum _{\underset{{b}_{n,l,i}=1}{\underset{\underset{\_}{\_}}{c}:\underset{\underset{\_}{\_}}{c}=f\left(\underset{\underset{\_}{\_}}{b}\right)}}\mathrm{Pr}\left\{\underset{\underset{\_}{\_}}{r}\underset{\underset{\_}{\_}}{c}\right\}\text{\hspace{1em}}\mathrm{Pr}\left\{\underset{\underset{\_}{\_}}{c}\right\}}.& \mathrm{Eq}\text{\hspace{1em}}\left(10\right)\end{array}$

[0102]
In the first iteration of the iterative detection and decoding process, it is assumed that all points in the signal constellation are equally likely. Hence, the term Pr{c} can be removed from the numerator and denominator of equation (10). In subsequent iterations, however, the only assumption is that the transmitted modulation symbols are independent. Furthermore, since the coded bits that make up the modulation symbols are interleaved, it is assumed that the bit probabilities are independent. Based on these assumptions, the term Pr{c} may expressed as:
$\begin{array}{cc}\mathrm{Pr}\left\{\underset{\underset{\_}{\_}}{c}\right\}=\prod _{n=1}^{{N}_{T}}\prod _{l=0}^{{N}_{F}1}\prod _{i=1}^{q}\mathrm{Pr}\left\{{b}_{n,l,i}\right\}=\prod _{p=1}^{{N}_{T}{N}_{F}q}\mathrm{Pr}\left\{{b}_{p}\right\},& \mathrm{Eq}\text{\hspace{1em}}\left(11\right)\end{array}$
where a change in notation of variables is made (i.e., p={n,l,i}) in the term to the right of the equality to simplify notation.

[0103]
The received modulation symbols r_{1,l}, r_{2,l}, . . . , r_{N} _{ R } _{,N} _{ F } _{−1 }are conditionally independent given c. The term Pr{rc} may then be expressed as:
$\begin{array}{cc}\begin{array}{c}\mathrm{Pr}\left\{\underset{\underset{\_}{\_}}{r}\underset{\underset{\_}{\_}}{c}\right\}=\prod _{m=1}^{{N}_{R}}\prod _{l=0}^{{N}_{F}1}\mathrm{Pr}\left\{{r}_{m,l}\underset{\underset{\_}{\_}}{c}\right\}\\ =\prod _{m=1}^{{N}_{R}}\prod _{l=0}^{{N}_{F}1}\mathrm{exp}\left(\frac{1}{2\text{\hspace{1em}}{\sigma}^{2}}{\uf603{r}_{m,l}\sum _{n=1}^{{N}_{T}}{h}_{n,m,l}\xb7{c}_{n,l}\uf604}^{2}\right),\end{array}& \mathrm{Eq}\text{\hspace{1em}}\left(12\right)\end{array}$
where σ^{2 }is the noise spectral density given by σ^{2}=N_{0}/2.

[0104]
Substituting equations (11) and (12) into equation (10), the LLR for the kth coded bit may then be expressed as:
$\begin{array}{cc}\begin{array}{c}L\left({b}_{k}\right)=\\ \text{\hspace{1em}}\mathrm{ln}\text{\hspace{1em}}\frac{\sum _{\underset{{b}_{k}=+1\text{\hspace{1em}}}{\underset{\underset{\_}{\_}}{c}:\underset{\underset{\_}{\_}}{c}=f\left(\underset{\underset{\_}{\_}}{b}\right)}}\left[\prod _{m=1}^{{N}_{R}}\prod _{l=0}^{{N}_{F}1}\mathrm{exp}\left(\frac{1}{2\text{\hspace{1em}}{\sigma}^{2}}{\uf603\begin{array}{c}{r}_{m,l}\\ \sum _{n=1}^{{N}_{T}}{h}_{n,m,l}\xb7{c}_{n,l}\end{array}\uf604}^{2}\right)\prod _{p=1}^{{N}_{T}{N}_{F}q}\mathrm{Pr}\left\{{b}_{p}\right\}\right]}{\sum _{\underset{{b}_{k}=1\text{\hspace{1em}}}{\underset{\underset{\_}{\_}}{c}:\underset{\underset{\_}{\_}}{c}=f\left(\underset{\underset{\_}{\_}}{b}\right)}}\left[\prod _{m=1}^{{N}_{R}}\prod _{l=0}^{{N}_{F}1}\mathrm{exp}\left(\frac{1}{2\text{\hspace{1em}}{\sigma}^{2}}{\uf603\begin{array}{c}{r}_{m,l}\\ \sum _{n=1}^{{N}_{T}}{h}_{n,m,l}\xb7{c}_{n,l}\end{array}\uf604}^{2}\right)\prod _{p=1}^{{N}_{T}{N}_{F}q}\mathrm{Pr}\left\{{b}_{p}\right\}\right]},\end{array}& \mathrm{Eq}\text{\hspace{1em}}\left(13\right)\end{array}$
where k={n,l,i}. Equation (13) may further be decomposed as follows:
$\begin{array}{cc}\begin{array}{c}L\left({b}_{k}\right)=\mathrm{ln}\text{\hspace{1em}}\frac{\sum _{\underset{{b}_{k}=+1\text{\hspace{1em}}}{\underset{\underset{\_}{\_}}{c}:\underset{\underset{\_}{\_}}{c}=f\left(\underset{\underset{\_}{\_}}{b}\right)}}\left[\prod _{m=1}^{{N}_{R}}\prod _{l=0}^{{N}_{F}1}\mathrm{exp}\left({\beta}_{m,l}\right)\prod _{\underset{p\ne k}{p=1}}^{{N}_{T}{N}_{F}q}\mathrm{Pr}\left\{{b}_{p}\right\}\right]}{\sum _{\underset{{b}_{k}=1\text{\hspace{1em}}}{\underset{\underset{\_}{\_}}{c}:\underset{\underset{\_}{\_}}{c}=f\left(\underset{\underset{\_}{\_}}{b}\right)}}\left[\prod _{m=1}^{{N}_{R}}\prod _{l=0}^{{N}_{F}1}\mathrm{exp}\left({\beta}_{m,l}\right)\prod _{\underset{p\ne k}{p=1}}^{{N}_{T}{N}_{F}q}\mathrm{Pr}\left\{{b}_{p}\right\}\right]}+\\ \text{\hspace{1em}}\mathrm{ln}\text{\hspace{1em}}\frac{\mathrm{Pr}\left\{{b}_{k}=+1\right\}}{\mathrm{Pr}\left\{{b}_{k}=1\right\}}\\ \text{\hspace{1em}}={L}_{e}\left({b}_{k}\right)+{L}_{a}\left({b}_{k}\right),\\ \mathrm{where}\\ {\beta}_{m,l}=\frac{1}{2\text{\hspace{1em}}{\sigma}^{2}}\text{\hspace{1em}}{\uf603{r}_{m,l}\sum _{n=1}^{{N}_{T}}{h}_{n,m,l}\xb7{c}_{n,l}\uf604}^{2}.\end{array}& \mathrm{Eq}\text{\hspace{1em}}\left(14\right)\end{array}$

[0105]
As shown in equation (14), the LLR for the kth coded bit, L(b_{k}), may be decomposed into two parts. The term L_{a}(b_{k}) represents the a priori information for the kth coded bit computed by the decoder and fed back to the detector. This detector a priori information is expressed in the form of a priori LLRs, which may be expressed as:
$\begin{array}{cc}{L}_{a}\left({b}_{k}\right)=\mathrm{ln}\frac{\mathrm{Pr}\left\{{b}_{k}=+1\right\}}{\mathrm{Pr}\left\{{b}_{k}=1\right\}}.& \mathrm{Eq}\text{\hspace{1em}}\left(15\right)\end{array}$

[0106]
The term L_{e}(b_{k}) represents the extrinsic information for the kth coded bit computed by the detector and fed forward to the decoder. The product of the a priori probabilities, ΠPr{b_{p}}, in equation (14) may be expressed as:
$\begin{array}{cc}\prod _{\underset{p\ne k}{p=1}}^{{N}_{T}{N}_{F}q}\mathrm{Pr}\left\{{b}_{p}\right\}=C\xb7\mathrm{exp}\left(\prod _{\underset{p\ne k}{p=1}}^{{N}_{T}{N}_{F}q}\frac{1}{2}{b}_{p}{L}_{a}\left({b}_{p}\right)\right)=C\xb7\mathrm{exp}\left(\alpha \right),& \mathrm{Eq}\text{\hspace{1em}}\left(16\right)\end{array}$
where C is a constant and
$\alpha =\sum _{p=1,p\ne k}^{{N}_{T}{N}_{F}q}\frac{1}{2}{b}_{p}{L}_{a}\left({b}_{p}\right).$
Hence, the detector extrinsic information, L_{e}(b_{k}), may be expressed in terms of the detector a priori LLRs, as follows:
$\begin{array}{cc}{L}_{e}\left({b}_{k}\right)=\mathrm{ln}\frac{\begin{array}{c}\sum _{\underset{{b}_{k}=+1}{\underset{\underset{\_}{\_}}{c}:c=f\left(\underset{\underset{\_}{\_}}{b}\right)}}\\ \left[\prod _{m=1}^{{N}_{R}}\prod _{i=0}^{{N}_{F}1}\mathrm{exp}\left({\beta}_{m,l}\right)\mathrm{exp}\left(\sum _{\underset{p\ne k}{p=1}}^{{N}_{T}{N}_{F}q}\frac{1}{2}{b}_{p}{L}_{a}\left({b}_{p}\right)\right)\right]\end{array}}{\begin{array}{c}\sum _{\underset{{b}_{k}=1}{\underset{\underset{\_}{\_}}{c}:c=f\left(\underset{\underset{\_}{\_}}{b}\right)}}\\ \left[\prod _{m=1}^{{N}_{R}}\prod _{i=0}^{{N}_{F}1}\mathrm{exp}\left({\beta}_{m,l}\right)\mathrm{exp}\left(\sum _{\underset{p\ne k}{p=1}}^{{N}_{T}{N}_{F}q}\frac{1}{2}{b}_{p}{L}_{a}\left({b}_{p}\right)\right)\right]\end{array}}.& \mathrm{Eq}\text{\hspace{1em}}\left(17\right)\end{array}$

[0107]
Since the detector a priori information, L_{a}(b_{k}), is known by the decoder, it may be subtracted from L(b_{k}) by summers 422 in FIG. 4A such that only the detector extrinsic information, L_{e}(b_{k}), is provided to the decoder.

[0108]
It can be seen from equations (13) and (17) that the computational complexity to derive the LLRs for the coded bits grows exponentially with the number of frequency subchannels (N_{F}), the number of transmit antennas (N_{T}), and the size of the signal constellation (2^{q}). Several techniques may be used to reduce the computational burden to derive the coded bit LLRS. Such techniques include the use of interference nulling to isolate each transmitted signal by removing the other interferers and the use of a “dualmaxima” or some other approximation to compute the LLRS. These techniques are described in further detail below.

[0109]
Without loss of generality, the signal from transmit antenna 1 may be treated as the desired signal and the other signals from the remaining (N_{T}−1) transmit antennas may be treated as interference to the desired signal. With N_{R }receive antennas, where N_{R}≧N_{T}, the (N_{T}−1) interferers may be nulled (or canceled). For each of the N_{F }frequency subchannels, the vector of N_{R }modulation symbols, r _{l }(which are received from the N_{R }receive antennas for the lth frequency subchannel) may be premultiplied by an (N_{R}−N_{T}+1)×N_{R }nulling matrix, Θ _{l} ^{(1)}, and the resulting vector {tilde over (r)} _{l} ^{(1) }of (N_{R}−N_{T}+1) elements may be expressed as:
{tilde over (r)} _{l} ^{(1)}=Θ _{l} ^{(1)} r _{l}=Θ _{l} ^{(1)} H _{l} c _{l}+Θ _{l} ^{(1)} n _{l} ={tilde over (H)} _{l} ^{(1)} c _{1,l} +ñ _{l} ^{(1)}, for l=0, 1, . . . , N _{F}−1. Eq (18)

[0110]
As shown in equation (18), the components from transmit antennas 2, 3, . . . , N_{T }are suppressed in the vector {tilde over (r)} _{l} ^{(1) }and only the component c_{1,l }from desired transmit antenna 1 remains.

[0111]
The nulling matrices, Θ _{l} ^{(n)}, may be determined based on algorithms known in the art. The derivation of the nulling matrix, Θ _{l} ^{(1)}, for transmit antenna 1 is briefly described as follows. First, the N_{R}×(N_{T}−1) channel response matrix, H _{l} ^{(1)}, for transmit antennas 2 through NT and the NR receive antennas is determined. A set of (N_{R}−N_{T}+1) orthonormal vectors {ν_{1} ^{(1) }ν_{2} ^{(1) }. . . ν_{N} _{ R } _{−N} _{ T } _{+1} ^{(1)}}, whose members are the rows of the nulling matrix, Θ _{l} ^{(1)}, is then computed such that
Θ _{l} ^{(1)} H _{l} ^{(1)}=0,
where 0 is the allzero matrix, and
Θ _{l} ^{(1)} Θ _{l} ^{(1)*}=I,
where Θ _{l} ^{(1)* }is the Hermitian of Θ _{l} ^{(1) }and I is the identity matrix (i.e., all ones along the diagonal and zeros elsewhere). Fast algorithms are available for computing the orthonormal vectors, as is known in the art. As indicated by the notation, different nulling matrices are derived for different transmit antennas and different frequency subchannels (i.e., Θ _{l} ^{(n) }for n=1, 2, . . . , N_{T}, and l=0, 1, . . . , N_{F}−1).

[0112]
Derivation of the nulling matrices for a MIMO system is described in further detail by Vahid Tarokh et al in a paper entitled “Combined Array Processing and SpaceTime Coding,” IEEE Transactions on Information Theory, Vol. 45, No. 4, May 1999, which is incorporated herein by reference.

[0113]
After nulling the interference on the desired signal due to the signals from the other (N_{T}−1) transmit antennas, the LLRs for the coded bits from the desired transmit antenna may then be calculated in a similar manner as described above, without regard to the components from the other (N_{T}−1) transmit antennas. For transmit antenna 1, the LLRs for the coded bits transmitted on all N_{F }frequency subchannels of this transmit antenna, [b_{1,0,1 }. . . b_{1,0,q }b_{1,1,1 }. . . b_{1,1,q }. . . b_{1,N} _{ F } _{−1,1 }. . . b_{1,N} _{ F } _{−1,q}], may be expressed as:
$\begin{array}{cc}L\left({b}_{1,l,i}\right)=\mathrm{ln}\frac{\mathrm{Pr}\left\{{b}_{1,l,i}=+1{\underset{\underset{\_}{\_}}{\stackrel{~}{r}}}^{\left(1\right)}\right\}}{\mathrm{Pr}\left\{{b}_{1,l,i}=1{\underset{\underset{\_}{\_}}{\stackrel{~}{r}}}^{\left(1\right)}\right\}},\text{}\begin{array}{c}\mathrm{for}\text{\hspace{1em}}l=0,1,\dots \text{\hspace{1em}},{N}_{F}1\\ \mathrm{and}\text{\hspace{1em}}i=1,2,\dots \text{\hspace{1em}},q,\end{array}& \mathrm{Eq}\text{\hspace{1em}}\left(19\right)\end{array}$
where {tilde over (r)} ^{(1)}=[{tilde over (r)} _{0} ^{(1)T} {tilde over (r)} _{l} ^{(1)T }. . . {tilde over (r)} _{N} _{ F } _{−1} ^{(1)T}]^{T}.

[0114]
After the interference nulling, the LLR computation is simplified since only the desired signal from one transmit antenna is considered at a time. Equation (19) may be expressed in a form similar to equation (14), as follows:
$\begin{array}{cc}{L}^{\left(1\right)}\left({b}_{k\text{\hspace{1em}}}\right)=\mathrm{ln}\frac{\begin{array}{c}\sum _{\underset{{b}_{k}=+1}{{c}_{1}:{c}_{1}=f\left({b}_{1}\right)}}\\ \left[\prod _{m=1}^{{N}_{R}}\prod _{i=0}^{{N}_{F}1}\mathrm{exp}\left({\beta}_{m,l}\right)\mathrm{exp}\left(\sum _{\underset{p\ne k}{p=1}}^{{N}_{T}{N}_{F}q}\frac{1}{2}{b}_{p}{L}_{a}\left({b}_{p}\right)\right)\right]\end{array}}{\begin{array}{c}\sum _{\underset{{b}_{k}=1}{\underset{\underset{\_}{\_}}{c}:c=f\left(\underset{\underset{\_}{\_}}{b}\right)}}\\ \left[\prod _{m=1}^{{N}_{R}}\prod _{i=0}^{{N}_{F}1}\mathrm{exp}\left({\beta}_{m,l}\right)\mathrm{exp}\left(\sum _{\underset{p\ne k}{p=1}}^{{N}_{T}{N}_{F}q}\frac{1}{2}{b}_{p}{L}_{a}\left({b}_{p}\right)\right)\right]\end{array}}+\text{}\text{\hspace{1em}}\mathrm{ln}\frac{\mathrm{Pr}\left[{b}_{k}=+1\right\}}{\mathrm{Pr}\left\{{b}_{k}=1\right\}},& \mathrm{Eq}\text{\hspace{1em}}\left(20\right)\end{array}$
where k=1, 2, . . . , N_{F}·q and k={m, l}.

[0115]
As shown in equation (20), instead of calculating (N_{F}·N_{T}·q) LLR values for all N_{T }transmit antennas, only (N_{F}·q) LLR values are calculated at a time for each of N_{T }transmit antennas. However, by performing the interference nulling, the complexity of the calculation in Eq (20) is no longer exponential in the number of transmit antennas N_{T }since (1) each summation is performed over only the modulation symbols c _{n }transmitted from the desired nth transmit antenna, and (2) the term
$\prod \mathrm{Pr}\left\{{b}_{p}\right\}$
is evaluated only for the coded bits transmitted from the nth transmit antenna.

[0116]
The product of the a priori probabilities,
$\prod \mathrm{Pr}\left\{{b}_{p}\right\},$
in equation (20) may be expressed as:
$\begin{array}{cc}\prod _{\underset{p\ne k}{p=1}}^{{N}_{F}q}\mathrm{Pr}\left\{{b}_{p}\right\}=C\xb7\mathrm{exp}\left(\sum _{\underset{p\ne k}{p=1}}^{{N}_{F}q}\frac{1}{2}{b}_{p}{L}_{a}\left({b}_{p}\right)\right)=C\xb7\mathrm{exp}\left({\alpha}_{n}\right).& \mathrm{Eq}\text{\hspace{1em}}\left(21\right)\end{array}$
The detector extrinsic information, L_{e} ^{(n)}(b_{k}), may then be expressed in terms of the detector a priori LLRs, as follows:
$\begin{array}{cc}{L}_{e}^{\left(n\right)}\left({b}_{k}\right)=\mathrm{ln}\frac{\begin{array}{c}\sum _{\underset{{b}_{k}=+1}{\underset{\_}{c}:\underset{\_}{c}=f\left({\underset{\_}{b}}_{n}\right)}}\\ \left[\prod _{m=1}^{{N}_{R}}\prod _{l=0}^{{N}_{F}1}\mathrm{exp}\left({\beta}_{m,l}\right)\mathrm{exp}\left(\sum _{\underset{p\ne k}{p=1}}^{{N}_{F}q}\frac{1}{2}{b}_{p}{L}_{a}\left({b}_{p}\right)\right)\right]\end{array}}{\begin{array}{c}\sum _{\underset{{b}_{k}=1}{\underset{\_}{c}:\underset{\_}{c}=f\left({\underset{\_}{b}}_{n}\right)}}\\ \left[\prod _{m=1}^{{N}_{R}}\prod _{l=0}^{{N}_{F}1}\mathrm{exp}\left({\beta}_{m,l}\right)\mathrm{exp}\left(\sum _{\underset{p\ne k}{p=1}}^{{N}_{F}q}\frac{1}{2}{b}_{p}{L}_{a}\left({b}_{p}\right)\right)\right]\end{array}}.& \mathrm{Eq}\text{\hspace{1em}}\left(22\right)\end{array}$

[0117]
The detection with interference nulling described above may be repeated N_{T }times, once for each transmit antenna. For each repetition to recover the desired signal from a particular transmit antenna, the (N_{T}−1) interferers of this desired signal may be nulled out by premultiplying the received modulation symbol vectors, r _{l}, with the nulling matrix, Θ _{l} ^{(n)}, derived for that transmit antenna and that frequency subchannel, as shown in equation (18). The LLRs for the coded bits in the desired signal may then be computed, as shown in equations (20) and (22). Thus, equation (20) or (22) may be evaluated N_{T }times, once for each desired signal, with each evaluation providing a set of (N_{F}·q) LLRs for the coded bits in the desired signal.

[0118]
The reduced computational complexity for deriving the LLRs for the coded bits is achieved with a corresponding decrease in diversity, since the desired signal is received with a diversity of order (N_{R}−N_{T}+1), instead of a diversity of order N_{R}, using equation (18).

[0119]
The dualmaxima approximation may also be used to reduce the computational complexity associated with deriving the LLRs for the coded bits. As shown in equations (20) and (22), the LLR for each coded bit is computed as the logarithm of the ratio of two summations. Each summation is performed over a number of elements, with each such element being composed of products of exponential terms, exp(β_{m,l}) and exp(α_{n}). The exponentiation in the elements of each summation enhances the differences between the individual elements of the summation. Hence, one element typically dominates each summation, and the following approximation may be made:
$\begin{array}{cc}\mathrm{ln}\sum _{j}\mathrm{exp}\left({a}_{j}\right)\approx \underset{j}{\mathrm{max}}\left({a}_{j}\right).& \mathrm{Eq}\text{\hspace{1em}}\left(23\right)\end{array}$

[0120]
For simplicity, the following may be defined:
$\begin{array}{cc}\begin{array}{c}{L}_{k}=\mathrm{ln}\text{\hspace{1em}}\frac{\sum _{\underset{\_}{u}:{u}_{k}=+1}\mathrm{exp}\left[M\left(\underset{\_}{u},\underset{\_}{y}\right)\right]}{\sum _{\underset{\_}{u}:{u}_{k}=1}\mathrm{exp}\left[M\left(\underset{\_}{u},\underset{\_}{y}\right)\right]}\\ =\mathrm{ln}\text{\hspace{1em}}\sum _{\underset{\_}{u}:{u}_{k}=+1}\mathrm{exp}\left[M\left(\underset{\_}{u},\underset{\_}{y}\right)\right]\mathrm{ln}\text{\hspace{1em}}\sum _{\underset{\_}{u}:{u}_{k}=1}\mathrm{exp}\left[M\left(\underset{\_}{u},\underset{\_}{y}\right)\right].\end{array}& \mathrm{Eq}\text{\hspace{1em}}\left(24\right)\end{array}$
Applying the approximation shown in equation (23) for the sum of exponents to equation (24), the following can be expressed:
$\begin{array}{cc}{L}_{k}\approx \underset{\underset{\_}{u}:{u}_{k}=+1}{\mathrm{max}}\left\{M\left(\underset{\_}{u},\underset{\_}{y}\right)\right\}\underset{\underset{\_}{u}:{u}_{k}=1}{\mathrm{max}}\left\{M\left(\underset{\_}{u},\underset{\_}{y}\right)\right\}.& \mathrm{Eq}\text{\hspace{1em}}\left(25\right)\end{array}$
The approximation shown in equation (25) is often referred to as the dualmaxima approximation.

[0121]
The dualmaxima approximation may be used to simplify the computation for the LLRs for the coded bits. Specifically, for equation (22), the logarithm of the ratio of two summations may first be decomposed as follows:
$\begin{array}{cc}\begin{array}{c}{L}_{e}^{\left(n\right)}\left({b}_{k}\right)=\mathrm{ln}\text{\hspace{1em}}\sum _{\underset{{b}_{k}=+1\text{\hspace{1em}}}{{\underset{\_}{c}}_{n}:{\underset{\_}{c}}_{n}=f\left({\underset{\_}{b}}_{n}\right)}}\left[\prod _{m=1}^{{N}_{R}}\prod _{l=0}^{{N}_{F}1}\mathrm{exp}\left({\beta}_{m,l}\right)\text{\hspace{1em}}\mathrm{exp}\left({\alpha}_{n}\right)\right]\\ \mathrm{ln}\text{\hspace{1em}}\sum _{\underset{{b}_{k}=1\text{\hspace{1em}}}{{\underset{\_}{c}}_{n}:{\underset{\_}{c}}_{n}=f\left({\underset{\_}{b}}_{n}\right)}}\left[\prod _{m=1}^{{N}_{R}}\prod _{l=0}^{{N}_{F}1}\mathrm{exp}\left({\beta}_{m,l}\right)\text{\hspace{1em}}\mathrm{exp}\left({\alpha}_{n}\right)\right].\end{array}& \mathrm{Eq}\text{\hspace{1em}}\left(26\right)\end{array}$
Next, instead of summing over the individual elements for all possible values of the coded bits for the modulation symbols c _{n }from the nth transmit antenna, the dualmaxima approximation algorithm finds the maximum element in each summation (i.e., one for the numerator and another for the denominator in equation (22)) and uses these two maximum elements in the LLR calculation, as shown in equation (25).

[0122]
By using approximations based on the dualmaxima approximation, the computational complexity can be made to increase linearly in the number of coded bits per modulation symbol, q, instead of exponentially. Simulation results have shown that the performance degradation due to the use of such approximations is negligible over the range of SNRs where the use of highorder modulations is justified.

[0123]
Other approximations and simplifications may also be used to reduce the number of complex additions and multiplications needed to compute the LLRs for the coded bits, and this is within the scope of the invention.

[0124]
Other simplifications that may be used for computing LLRs are described by Andrew J. Viterbi in a paper entitled “An Intuitive Justification and a Simplified Implementation of the MAP Decoder for Convolutional Codes,” IEEE Journal on Selected Areas in Communications, Vol. 16, No. 2, February 1998, pp. 260264, and by Patrick Robertson et al. in a paper entitled “A Comparison of Optimal and SubOptimal MAP Decoding Algorithms Operating in the Log Domain,” IEEE International Conference on Communication, 1995, pp. 10091012, both of which are incorporated herein by reference. These various simplification techniques typically perform computations in the logdomain, where division becomes subtraction and multiplication becomes addition.

[0125]
FIG. 4B is a block diagram of an embodiment of a receiver unit 400 b, which is another embodiment of the receiver portion of receiver system 150 in FIG. 1. In this embodiment, different demodulation and decoding schemes may be used for the N_{T }transmit antennas. Receiver unit 400 b may thus be used to receive a data transmission from transmitter unit 200 b in FIG. 2B, which employs separate coding and modulation schemes on a perantenna basis.

[0126]
The signals transmitted from the N_{T }transmit antennas are initially received by each of N_{R }antennas 152 a through 152 r and routed to a respective receiver 154. Each receiver 154 conditions, digitizes, and processes a respective received signal to provide a respective stream of transmission symbols. The transmission symbol stream from each receiver 154 is provided to a respective OFDM demodulator 410 within a demodulator 156 b. Each OFDM demodulator 410 removes the cyclic prefix appended to each OFDM symbol by the transmitter system and then transforms each received OFDM symbol to provide a vector of N_{F }received modulation symbols for the N_{F }frequency subchannels used to transmit the OFDM symbol. The N_{R }modulation symbol vectors from all N_{R }OFDM demodulators 410 for each transmission symbol period are provided to a detector/decoder 158 b, which is another embodiment of detector/decoder 158 in FIG. 1.

[0127]
In the embodiment shown in FIG. 4B, detector/decoder 158 b includes a detector 420 b and N_{T }decoder blocks 440, which collectively perform iterative detection and decoding on the modulation symbols received from all N_{R }receive antennas to provide the decoded data. Each decoder block 440 is assigned to process the modulation symbols transmitted from a respective transmit antenna, which may have been coded and modulated with its own specific coding and modulation schemes.

[0128]
Detector 420 b receives the modulation symbols from demodulator 156 b and the a priori information from the N_{T }decoders 430 a through 430 t and provides softdecision symbols for the N_{T }transmit antennas, with each such softdecision symbol being an estimate of a transmitted coded bit and may be represented by the LLR, as shown in equation (22). For each transmission symbol period, detector 420 b provides N_{T }vectors of softdecision symbols for the N_{T }transmit antennas to the N_{T }decoder blocks 440, with each vector including (N_{F}·q_{n}) softdecision symbols (where q_{n }is dependent on the specific modulation scheme used for the nth transmit antenna). Within each decoder block 440, the detector a priori information for each coded bit being processed by that decoder block is subtracted from the corresponding softdecision symbol to derive the extrinsic information for the coded bit. The detector extrinsic information for all (N_{F}·q_{n}) coded bits is then converted from parallel to serial by P/S converter 424, deinterleaved by channel deinterleaver 426, and provided as a priori information to decoder 430.

[0129]
Decoder 430 within each decoder block 440 uses the decoder a priori information in the decoding process and provides the decoded data for the transmit antenna assigned to and processed by the decoder block. Decoder 430 further provides the a posteriori information for the coded bits transmitted by the assigned transmit antenna. A summer 432 then subtracts the decoder a priori information from the decoder a posteriori information to derive the decoder extrinsic information, which is then interleaved by channel interleaver 434, converted from serial to parallel by S/P converter 436, and provided as a priori information to detector 420 b and summer 422.

[0130]
Similar to that described for FIG. 4A, the detection and decoding process may be iterated a number of times. During the iterative detection and decoding process, the reliability of the bit decisions is improved with each iteration.

[0131]
FIG. 4C is a block diagram of an embodiment of a receiver unit 400 c, which is yet another embodiment of the receiver portion of receiver system 150 in FIG. 1. In this embodiment, the detector performs successive nulling and interference cancellation to recover one transmitted signal at a time. Receiver unit 400 c may be used to recover a data transmission from transmitter unit 200 b in FIG. 2B (which employs separate coding and modulation schemes on a perantenna basis).

[0132]
The N_{R }received signals are initially processed by receivers 154 and further processed by demodulator 156 to provide N_{R }modulation symbol vectors, r, for each transmission symbol period, which are then provided to a detector/decoder 158 c. Detector/decoder 158 c performs iterative detection and decoding as well as successive nulling and interference cancellation. In particular, detector/decoder 158 c implements a multistage (or multilayer) detection scheme that includes both nulling of interferers and postdecoding interference cancellation (i.e., successive nulling and interference cancellation).

[0133]
Detector/decoder 158 c includes a detector 420 c, N_{T }decoder blocks 440, and P/S converter 442. Detector 420 c includes N_{T }detection stages (or layers), with each stage being assigned to process and recover the data for a particular transmit antenna. Each stage (except for the last stage) includes an interference nuller 450, an LLR computer 452, and an interference canceller 460. The last stage only includes LLR computer 452 since all other transmitted signals have been nulled by this time.

[0134]
Within detector 420 c, the received modulation symbol vectors r are provided as the input vectors r ^{(1) }for interference nuller 450 a, which premultiplies the modulation symbol vector r _{l} ^{(1) }for each frequency subchannel with the nulling matrix Θ _{l} ^{(1) }for that frequency subchannel of the first transmit antenna to provide the vector {tilde over (r)} _{l} ^{(1) }having the components from the other (N_{T}−1) transmit antennas approximately removed. The premultiplication may be performed as shown in equation (18), which is:
{tilde over (r)} _{l} ^{(1)}=Θ _{l} ^{(1)} r _{l}=Θ _{l} ^{(1)} H _{l} c _{l}+Θ _{l} ^{(1)} n _{l}.
Interference nuller 450 a performs N_{F }premultiplications to derive N_{F }vectors, {tilde over (r)} ^{(1)}=[{tilde over (r)} _{0} ^{(1)T} {tilde over (r)} _{1} ^{(1)T }. . . {tilde over (r)} _{N} _{ F } _{−1} ^{(1)T}]^{T}, for the N_{F }frequency subchannels of the first transmit antenna.

[0135]
The vectors {tilde over (r)} ^{(1) }are then provided to LLR computer 452 a, which computes the LLRs for the coded bits transmitted from the first transmit antenna, as shown in equation (22). The LLRs for the (N_{F}·q_{1}) coded bits from the first transmit antenna are then provided to decoder block 440 a, which operates on the decoder a priori information to provide the detector a priori information and the decoded bits for the first transmit antenna, as described below. The detector a priori information from decoder block 440 a is provided back to LLR computer 452 a and used to compute the new decoder a priori information for the next iteration. The detection and decoding for the first transmit antenna may be iterated a number of times.

[0136]
The decoded bits from decoder block 440 a are also provided to interference canceller 460 a. Assuming that the data for the first stage has been decoded correctly, the contribution of these decoded bits on the received modulation symbols (which is denoted as î ^{(1)}) is derived and subtracted from that stage's input vectors r ^{(1) }to derive the input vectors r ^{(2) }for the next stage. This interference cancellation may be expressed as:
r ^{(2)} =r ^{(1)} −î ^{(1)}. Eq (27)

[0137]
Each subsequent stage performs the detection and decoding in a similar manner as described above for the first stage to provide the decoded bits for the assigned transmit antenna. However, the input vectors, r ^{(n)}, for each subsequent stage contain less interference than that of the previous stage. Also, since the nulling is performed by interference nuller 450 using the modulation symbols from all N_{R }receive antennas, the diversity order increases by one from one stage to the next. Finally, in the last stage, only the signal contribution from the last (N_{T}th) transmit antenna remains, if the interference cancellation was effectively performed in the preceding stages. Hence, no nulling is necessary and the iterative detection and decoding may be performed directly on that stage's input vectors r ^{(N} ^{ T } ^{)}.

[0138]
Predecoding interference estimation and cancellation may also be used, and this is within the scope of the invention. In this case, a hard decision may be made on the LLR outputs from the detector. The hard decision may then be remodulated and multiplied with the estimated channel response to obtain predecoding interference estimates (which are typically not as reliable as postdecoding interference estimates). The predecoding interference estimates may then be canceled from the received modulation symbols.
Decoders

[0139]
Decoders 430 in FIGS. 4A and 4B may be implemented based on various designs and may be dependent on the particular coding scheme(s) used at the transmitter system. For example, each decoder 430 may be implemented as an iterative decoder (i.e., a Turbo decoder) if a Turbo code is used. The structures for the Turbo decoders for serial and parallel concatenated convolutional codes are described below.

[0140]
FIG. 5A is a simplified block diagram of a Turbo decoder 430 x capable of performing iterative decoding for serial concatenated convolutional codes, such as the one shown in FIG. 3A. Turbo decoder 430 x includes inner and outer maximum a posteriori (MAP) decoders 512 a and 512 b, a code deinterleaver 514, and a code interleaver 516.

[0141]
The coded bits (or more specifically, the a priori LLRs for the decoder, L_{a} ^{D}(b_{k})) are provided to inner MAP decoder 512 a, which derives the a posteriori information for the coded bits based on the inner convolutional code. The a posteriori information is then subtracted by the a priori information for MAP decoder 512 a to provide extrinsic information, e_{k} ^{s1}, which is indicative of corrections/adjustments in the confidence of the values for the information bits. The extrinsic information is then deinterleaved by code deinterleaver 514 and provided as a priori information to outer MAP decoder 512 b. MAP decoder 512 a also provides the LLRs for the coded bits, which comprise the a posteriori information, L^{D}(b_{k}), that is provided to summer 432 in FIGS. 4A and 4B.

[0142]
MAP decoder 512 b receives the a priori information from MAP decoder 512 a (after the code deinterleaving) and derives the a posteriori information for the coded bits based on the outer convolutional code. The a posteriori information is subtracted by the a priori information for MAP decoder 512 b to provide extrinsic information, e_{k} ^{s2}, which is indicative of further corrections/adjustments in the confidence of the values for the information bits. The extrinsic information, e_{k} ^{s2}, is then interleaved by code interleaver 516 and provided to inner MAP decoder 512 a.

[0143]
The decoding by inner and outer MAP decoders 512 a and 512 b may be iterated a number of times (e.g., 8, 12, 16, or possibly more). With each iteration, greater confidence is gained for the detected values of the information bits. After all the decoding iterations have been completed, the final LLRs for the information bits are provided to a bit detector within MAP decoder 512 b and sliced to provide the decoded bits, which are harddecision (i.e., “0” or “1”) values for the information bits.

[0144]
MAP decoders 512 a and 512 b may be implemented with the wellknown BCJR softinput softoutput MAP algorithm or its lower complexity derivatives. Alternatively, the softoutput Viterbi (SOV) algorithm may be implemented instead of the MAP algorithms. MAP decoders and MAP algorithms are described in further detail in the aforementioned papers by Viterbi and Robertson. The MAP and SOV algorithms may also be used to decode simple convolutional codes. The complexity of these algorithms is comparable to the standard Viterbi decoding algorithm, multiplied by the number of iterations.

[0145]
FIG. 5B is a simplified block diagram of a Turbo decoder 430 y capable of performing iterative decoding for parallel concatenated convolutional codes, such as the one shown in FIG. 3B. Turbo decoder 430 y includes a S/P converter 510, two MAP decoders 512 c and 512 d, two code interleavers 524 a and 524 b, a code deinterleaver 526, and a P/S converter 528.

[0146]
The coded bits (or more specifically, the a priori LLRs for the decoder, L_{a} ^{D}(b_{k})) are provided to S/P converter 510, which provides the a priori LLRs for the information bits, L_{a} ^{D}(b_{k} ^{x}), to MAP decoder 512 c and code interleaver 524 b, the a priori LLRs for the first constituent encoder's parity bits, L_{a} ^{D}(b_{k} ^{y}), to MAP decoder 512 c, and the a priori LLRs for the second constituent encoder's parity bits, L_{a} ^{D}(b_{k} ^{z}), to code interleaver 524 b, where L_{a} ^{D}(b_{k})={L_{a} ^{D}(b_{k} ^{x}), L_{a} ^{D}(b_{k} ^{y}), L_{a} ^{D}(b_{k} ^{z})}.

[0147]
MAP decoder 512 c receives the a priori LLRs for the information bits, L_{a} ^{D}(b_{k} ^{x}), the a priori LLRs for the first constituent encoder's parity bits, L_{a} ^{D}(b_{k} ^{y}), and extrinsic information from MAP decoder 512 d, e_{k} ^{p2 }(after deinterleaving by code deinterleaver 526). MAP decoder 512 c then derives the a posteriori information for the information bits based on the first constituent convolutional code. This a posteriori information is then subtracted by the received a priori information to provide extrinsic information, e_{k} ^{p1}, which is indicative of corrections/adjustments in the confidence of the values for the information bits determined from the first constituent encoder's parity bits. The extrinsic information is then interleaved by code interleaver 524 a and provided to MAP decoder 512 d.

[0148]
MAP decoder 512 d receives the a priori LLRs for the information bits, L_{a} ^{D}(b_{k} ^{x}) (after interleaving by code interleaver 524 b), the a priori LLRs for the second constituent encoder's parity bits, L_{a} ^{D}(b_{k} ^{z}), and the extrinsic information from MAP decoder 512 c, e_{k} ^{p1 }(after interleaving by code interleaver 524 a). MAP decoder 512 d then derives the a posteriori information for the information bits based on the second constituent convolutional code. This a posteriori information is then subtracted by the received extrinsic information, e_{k} ^{p1}, to provide the extrinsic information, e_{k} ^{2}, which is indicative of further corrections/adjustments in the confidence of the values for the information bits determined from the second constituent encoder's parity bits. The extrinsic information, e_{k} ^{2}, is then deinterleaved by code deinterleaver 526 and provided to MAP decoder 512 c.

[0149]
P/S converter 528 receives the first constituent encoder's parity bit LLRs from MAP decoder 512 c, the second constituent encoder's parity bit LLRs from MAP decoder 512 d, and the information bit LLRs from MAP decoder 512 d. P/S converter 528 then performs paralleltoserial conversion of the received LLRs and provides the a posteriori information, L^{D}(b_{k}), to summer 432 in FIGS. 4A and 4B.

[0150]
The decoding by MAP decoders 512 c and 512 d may also be iterated a number of times (e.g., 8, 12, 16, or possibly more). After all the decoding iterations have been completed, the final LLRs for the information bits are provided to a bit detector within MAP decoder 512 d and sliced to provide the decoded bits. MAP decoders 512 c and 512 d may be implemented with the BCJR SISO MAP algorithm or its lower complexity derivatives or with the SOV algorithm.

[0151]
In general, the number of iterations in both the decoder and the iterative detectordecoder can be fixed or variable (i.e., adaptive). In the latter case, the stop criterion may be triggered when (1) the BER converges or reaches an acceptable level, (2) the worse or average LLR reaches a particular confidence level, or (3) some other criterion is met.
Interference Cancellation

[0152]
FIG. 6 is a block diagram of an embodiment of an interference canceller 460 x, which may be used for each interference canceller 460 in FIG. 4C. Within interference canceller 460 x, the decoded bits from the decoder block 440 for the same stage are reencoded and channel interleaved by a TX data processor 114 x to provide reencoded bits for the transmit antenna being processed by the stage (i.e., the assigned transmit antenna). The reencoded bits are further symbol mapped by a modulator 116 x to provide remodulated symbols, which are estimates of the modulation symbols at the transmitter prior to the OFDM processing and channel distortion. TX data processor 114 x and modulator 116 x each performs the same processing (e.g., encoding, channel interleaving, and modulation) as that performed at the transmitter system for the data stream on the assigned transmit antenna. The remodulated symbols are then provided to a channel simulator 612, which processes the symbols with the estimated channel response to provide estimates of the interference due to the decoded bits.

[0153]
For each frequency subchannel, channel simulator 612 multiples the remodulated symbols for the assigned nth transmit antenna with a vector ĥ _{n,l }that includes an estimate of the channel response between the nth transmit antenna and each of the N_{R }receive antennas. The vector ĥ _{n,l }is one column of the estimated channel response matrix Ĥ _{l }for the lth frequency subchannel. The matrix Ĥ _{l }may be determined by a channel estimator associated with the same stage and provided to channel simulator 612.

[0154]
If the remodulated symbol corresponding to the nth transmit antenna is expressed as {tilde over (c)}_{n,l}, then the estimated interference component î _{l} ^{(n) }due to the symbol from the nth transmit antenna may be expressed as:
$\begin{array}{cc}{\underset{\_}{\hat{i}}}_{l}^{\left(n\right)}=\left[\begin{array}{c}{\hat{h}}_{n,1,l}\xb7{\stackrel{~}{c}}_{n,l}\\ {\hat{h}}_{n,2,l}\xb7{\stackrel{~}{c}}_{n,l}\\ \vdots \\ {\hat{h}}_{n,{N}_{R},l}\xb7{\stackrel{~}{c}}_{n,l}\end{array}\right].& \mathrm{Eq}\text{\hspace{1em}}\left(28\right)\end{array}$

[0155]
The N_{R }elements in the interference vector î _{l} ^{(n) }correspond to components in the input vector r _{l} ^{(n) }due to the modulation symbol {tilde over (c)}_{n,l }transmitted from the nth transmit antenna. The interference vectors for all N_{F }frequency subchannels may be formed as î ^{(n)}=[î _{0} ^{(n)T} î _{1} ^{(n)T }. . . î _{N} _{ F } _{−1} ^{(n)T}]^{T}. The components in the vectors î ^{(n) }are interference to the remaining (not yet detected) modulation symbols from the other transmit antennas which are also included in the input vectors r ^{(n)}. The interference vectors î ^{(n) }are then subtracted from the input vectors r ^{(n) }by a summer 614 to provide modified vectors r ^{(n+1) }having the interference components from the decoded bits removed. This cancellation can be expressed as shown above in equation (27). The modified vectors r ^{(n+1) }are provided as the input vectors to the next processing stage, as shown in FIG. 4C.

[0156]
The successive cancellation receiver processing technique is described in further detail in the aforementioned U.S patent application Ser. Nos. 09/854,235 and 09/993,087, and by P. W. Wolniansky et al. in a paper entitled “VBLAST: An Architecture for Achieving Very High Data Rates over the RichScattering Wireless Channel”, Proc. ISSSE98, Pisa, Italy, which is incorporated herein by reference.
Deriving and Reporting Channel State Information

[0157]
In FIG. 1, a channel estimator within demodulator 156 may process the received OFDM symbols and derive estimates of one or more characteristics of the communication channel, such as the channel frequency response, the channel noise variance, the SNR of the received symbols, and so on. Detector/decoder 158 may also derive and provide the status of each received packet and may further provide one or more other performance metrics indicative of the decoded results. These various types of information may be provided to controller 170.

[0158]
Controller 170 may determine or select a particular “rate” to be used for all transmit antennas, for each transmit antenna, for each subset of transmit antennas, for each transmission channel, or for each group of transmission channels based on the various types of information received from demodulator 156 and detector/decoder 158. The rate is indicative of a set of specific values for a set of transmission parameters. For example, the rate may indicate (or may be associated with) a specific data rate to be used for the data transmission, a specific coding scheme and/or code rate, a specific modulation scheme, and so on. Channel state information (CSI) in the form of the selected rate, the channel response estimates, and/or other information may be provided by controller 170, processed by an encoder 180, modulated by a modulator 182, and conditioned and transmitted by one or more transmitters 154 back to transmitter system 110. Various forms of CSI are described in the aforementioned U.S. patent application Ser. No. 09/993,087.

[0159]
At transmitter system 110, the one or more modulated signals from receiver system 150 are received by antennas 124, conditioned by receivers 122, demodulated by a demodulator 140, and decoded by a decoder 142 to recover the channel state information transmitted by the receiver system. The channel state information is then provided to controller 130 and used to control the processing of the data transmission to the receiver system. For example, the data rate of the data transmission may be determined based on the selected rate provided by the receiver system, or may be determined based on the channel response estimates provided by the receiver system. The specific coding and modulation schemes associated with the selected rate are determined and reflected in the coding and modulation control provided by controller 130 to TX data processor 114 and modulator 116.

[0160]
The iterative detection and decoding techniques have been described specifically for serial and parallel concatenated convolutional codes. These techniques may also be used with other codes, such as convolutional codes, block codes, concatenated codes of different types (e.g., a convolutional code with a block code), and so on. Furthermore, the iterative detection and decoding techniques have been described specifically for a MIMOOFDM system. These techniques may also be used for a MIMO system that does not implement OFDM, an OFDM system that does not utilize MIMO, or some other wireless communication systems (e.g., a wireless LAN system).

[0161]
The iterative detection and decoding techniques may be implemented in various units in a wireless communication system, such as in a terminal, a base station, an access point, and so on.

[0162]
The iterative detection and decoding techniques described herein may be implemented by various means. For example, these techniques may be implemented in hardware, software, or a combination thereof. For a hardware implementation, the elements used to perform the iterative detection and decoding (e.g., detector 420 and decoder(s) 430) may be implemented within one or more application specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), processors, controllers, microcontrollers, microprocessors, other electronic units designed to perform the functions described herein, or a combination thereof.

[0163]
For a software implementation, the iterative detection and decoding may be performed with modules (e.g., procedures, functions, and so on) that perform the computations and functions described herein. The software codes may be stored in a memory unit (e.g., memory 172 in FIG. 1) and executed by a processor (e.g., controller 170). The memory unit may be implemented within the processor or external to the processor, in which case it can be communicatively coupled to the processor via various means as is known in the art.

[0164]
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.