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Publication numberUS20060024943 A1
Publication typeApplication
Application numberUS 10/903,365
Publication dateFeb 2, 2006
Filing dateJul 30, 2004
Priority dateJul 30, 2004
Also published asCN1728357A, US8679964, US8691685, US20070166994, US20080293243
Publication number10903365, 903365, US 2006/0024943 A1, US 2006/024943 A1, US 20060024943 A1, US 20060024943A1, US 2006024943 A1, US 2006024943A1, US-A1-20060024943, US-A1-2006024943, US2006/0024943A1, US2006/024943A1, US20060024943 A1, US20060024943A1, US2006024943 A1, US2006024943A1
InventorsSung Kang, Da-Yuan Shih, Yoon-Chul Son
Original AssigneeKang Sung K, Da-Yuan Shih, Yoon-Chul Son
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Prevention and control of intermetallic alloy inclusions that form during reflow of Pb free, Sn rich, solders in contacts in microelectronic packaging in integrated circuit contact structures where electroless Ni(P) metallization is present
US 20060024943 A1
Abstract
In using Ni(P) and Sn-rich solders in Pb free interconnections, the prevention and control of the formation of intermetallic compound inclusions, can be achieved through a reaction preventive or control layer that is positioned on top of an electroless Ni(P) metallization, such as by application of a thin layer of Sn on the Ni(P) or through the application of a thin layer of Cu on the Ni(P
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Claims(6)
1. In the fabrication of integrated circuit interconnection structures
wherein stacked layers of metal for different purposes are caused to fuse together by subjecting said layers to a fusion temperature excursion,
a process for inhibiting a potential undesirable interaction of first and second adjacent layers during said fusion temperature excursion comprising the steps of:
exposing a surface of said first of said potential interacting layers,
applying a protective layer of a metal having, during said fusion temperature excursion, at least one inhibiting property for said interaction, over said exposed surface of said first of said potential interacting layers,
applying said second layer of said first and second potential interacting layers over said protective layer, and,
subjecting the assembly stack of said first, said protective and said second layers to said fusion temperature excursion.
2. The process of claim 1 wherein said first layer is of electroless Ni(P) metallization, said protective layer is a metal taken from the group of Sn, and Cu, and said second layer is a further layer of the interconnection.
3. The process of claim 1 wherein said first layer is of electroless Ni(P) metallization, said protective layer is a metal taken from the group of Sn, and Cu, in a thickness range of between 0.1 and 5 micron and said second layer is a further layer of the interconnection.
4. The process of claim 1 wherein said first layer is of electroless Ni(P) metallization, said protective layer is a metal taken from the group of Sn, and Cu, in a thickness range of between 0.1 and 5 micron, said second layer is a further layer of the interconnection, and said temperature exursion is up through 250 degrees C.
5. The process of claim 1 wherein said first layer is of electroless Ni(P) metallization, said protective layer is a metal taken from the group of Sn, and Cu, in a thickness range of between 0.1 and 5 micron, said second layer is a further layer of the interconnection, and said temperature exursion is up through 250 degrees C.
6. The process of claim 1 wherein said first layer is of electroless Ni(P) metallization, said protective layer is a metal taken from the group of Sn, and Cu, in a thickness range of between 0.1 and 5 micron, and said second layer is a layer of Sn-rich Pb-free solders of a material taken from the group of pure Sn, Sn-3.5% Ag, Sn-0.7% Cu, Sn-3% Bi, Sn-3.5%-0.7% Cu, Sn-3.5% Ag-3% Bi, Sn-8%-Zn-3% Bi, Sn-3.5% Ag-0.7% Cu-0.5% Sb, and Sn-2.5% Ag-0.5% Cu.
Description
FIELD OF THE INVENTION

The invention is related to the fabrication of high reliability integrated circuit interconnection structures with lead free solder and in particular to the prevention of the formation of intermetallic compound inclusions that form during reflow connecting where electroless Ni(P) metallization is present.

BACKGROUND OF THE INVENTION

In integrated circuit interconnection structures, a stack of layers are assembled in which the individual metal layers provide different functions. There are situations where efforts are required to prevent unwanted interaction between layers. There is such a situation in connection with the use of lead free solder and in particular to the prevention of the formation of intermetallic compound inclusions that form during reflow connecting where electroless Ni(P) metallization is present.

Electroless nickel-phosphorus (Ni—P) films are widely used in the microelectronic industry for several types of metallizations. They have such characteristics as excellent solderability, corrosion resistance, uniform thickness and selective deposition.

The electroless nickel phosphorous technology and its applications is well known and described in such publications as: Wiegele et al, in the Proceedings of IEEE Electronic Component and Technology Conference, 1998, p. 861; Mei et al in the Proceedings of the

IEEE Electronic Component and Technology Conference, 1998, p. 952; Lin et al in the Proceedings of IEEE Electronic Component and Technology Conference, 2001, p. 455; K. C. Hung in the Proceedings of IEEE Electronic Component and Technology Conference, 2002, p. 1650; and O.Villalobos in the Proceedings of IEEE Electronic Component and Technology Conference, 2002, p. 732.

In this technology, when an Ni—P film reacts with Sn—Pb eutectic solder, a part of the film underneath the solder crystallizes into Ni3P with a (P-rich layer); that forms at about the reflow temperature of about 200˜240° C. This low temperature reaction is referred to in the art as “solder reaction-assisted crystallization” and is described in a publication by Kim et al in the J Appl.Phys 85, 8456(1999). The “solder reaction-assisted crystallization” is different from the well known self-crystallization of Ni-P that occurs at a higher temperature.

The solder reaction-assisted crystallization is accompanied by the formation of inclusions of Ni—Sn intermetallic compounds and the formation of voids in the layer known as Kirkendall voids as described by Hung et al in the Mater. Res. publication Vol. 15, pg 2534, (2000); and by P. L. Liu et al in the Metall. Mater. Trans. publication Vol.A 31A, pg 2857, (2000).

Such interfacial reactions affect reliability and are often attributed as being the source of formation of a weak and brittle interface between Ni—P and Sn—Pb solder; as described in publications by; R Wiegele et al.in the Proceedings of IEEE Electronic Component and Technology Conference, 1998, p. 861; by Mei et al in the Proceedings of the IEEE Electronic Component and Technology Conference, 1998, p. 9520 and by Villalobos in the Proceedings of IEEE Electronic Component and Technology Conference, 2002, p. 732.

When Sn—Pb solder is replaced by Sn-rich Pb-free solders, the reliability issue of the Ni—P interface is expected to be even more important since Pb-free solders have a higher Sn content and a higher reflow temperature as described by K. C.Hung in the Proceedings of the IEEE Electronic Component and Technology Conference, 2002, p. 1650; and by. K. Zeng et al. in Materials Science and Engineering R 38, 55 (2002).

Electroless Ni(P) is a good candidate as a reaction barrier for Pb-free, Sn-rich solders, because the intermetallic compounds forming on an electroless Ni(P) surface tend to grow more slowly than on Cu metallization during soldering.

However, severe inclusions or spalling of intermetallic compounds from Ni(P) have been reported by Kang et al in the Proceedings of the 51 st ECTC May 2001 pgs 448-454; when Pb-free solders such as pure Sn, Sn-3.5Ag, Sn-3.5Ag-3Bi (in weight %) are applied in a form of solder paste onto an electroless Ni(P) layer. Typical examples of intermetallic compounds inclusions occur where for example Sn-3.5Ag solder paste is applied on an Ni(P) layer and reflowed at 250C for durations of between 2 min and 10 min. A further example of intermetallic compound spalling occurs when Sn solder is electroplated onto Ni(P) and the reflow condition is severe such as for 10 min reflow at 250C or the Ni(P) is electroless Ni(P).

The delamination or spalling of intermetallic compounds at the soldering interface is a reliability risk factor in thermo-mechanical solder joints.

There have been earlier efforts involving such metals as Au,Ag and Pd. In those efforts a thin layer of Au on top of Ni(P) metallization did not protect the Ni(P) and therefore intermetallic compound formation or spalling was observed. In the case of an Au layer, the dissolution rate of Au into the molten Sn-rich solder, such as Sn-3.5% Ag, is expected to be so rapid that it can not protect the Ni(P) metallization. A similar situation would be expected with a thin layer of Ag or Pd on top of Ni(P) metallization.

SUMMARY OF THE INVENTION

In accordance with the invention where it is desired to control and suppress a reaction between Ni(P) and Sn-rich solders where an intermetallic compound inclusion may form adjacent to an electroless Ni(P) layer due to the P atoms that exist in Ni(P) and which would result in poor adhesion, control and suppression can be achieved through a control or protective layer on top of the electroless Ni(P) metallization such as by application of a thin layer of Sn on the Ni(P) or through the application of a thin layer of Cu on the Ni(P).

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1-7 are views of metallurgical samples of two adjacent layers in a stack selected to demonstrate that the formation of intermetallic compound inclusions or spalling from an electroless Ni(P) surface can be controlled or prevented by the application of a layer of Sn or Cu on the Ni(P) surface; wherein:

FIG. 1 shows intermetallic compound inclusion formation or spalling from an Ni(P) metallization, where Sn-3.5% Ag solder paste was applied on an Ni(P) layer and reflowed at 250C for 2 min.

FIG. 2 shows intermetallic compound inclusion formation or spalling from an Ni(P) metallization, where Sn-3.5% Ag solder paste was applied on an Ni(P) layer and reflowed at 250C for 10 min.

FIG. 3 shows an intermetallic compound inclusion that is well attached at an Ni(P) interface, having been reacted with electroplated Sn solder at 250C for a relatively short time, such as 2 min.

FIG. 4 shows an intermetallic compound inclusion at an Ni(P) metallization interface, where electroplated Sn solder was reacted at 250C for an extended time, such as 10 min.

FIG. 5 shows side by side samples of intermetallic compound inclusions at Ni(P) metallization interfaces each with a thin Sn layer of about 1 micron thickness, electroplated on top of an electroless Ni(P) layer, followed by being reacted with Sn-3.5% Ag solder paste at 250C, the left one for 2 min duration and the right one for 30 min duration.

FIG. 6 shows side by side samples of intermetallic compound inclusions at Ni(P) metallization interfaces each with a thin Cu layer of about 0.4 micron thickness, electroplated on top of an electroless Ni(P) layer, followed by being reacted with Sn-3.5% Ag solder paste at 250C, one for 2 min duration and the other for 30 min duration

FIG. 7 shows side by side samples of intermetallic compound inclusions at Ni(P) metallization interfaces each with a thin Cu layer of about 0.9 micron thickness, electroplated on top of an electroless Ni(P) layer, followed by being reacted with Sn-3.5% Ag solder paste at 250C, the left one for 2 min duration and the right one for 30 min duration

DESCRIPTION OF THE INVENTION

Referring to FIG. 1 there is shown a photomicrographic view of an exemplary sample of a Pb free solder joint wherein an electroless metallization 1 of Ni(P) on which a 250 um thick paste of SnAg has been subjected to a 250 degree C reflow temperature in nitrogen gas for about 2 minutes forming a layer 2. In the layer 2, intermetallic compound inclusion formations or spalling areas, of NiSn, of which two, 3 and 4 are shown at the interface 5 with the Ni(P) metallization I occurs, resulting in an increase in probability of delamination at the metallization interface 5.

As reflow time is extended, intermetallic compound growth and separation from the interface, becomes more enhanced, as shown in FIG. 2.

Referring to FIG. 2 there is shown a photomicrographic view of an exemplary sample with an electroless metallization 10 of Ni(P) on which a 250 um thick paste 20 of SnAg has been subjected to a 250 degree C reflow temperature for an extended duration of about 20 minutes.

It is considered that FIG. 2 is showing a Pb-free solder joint where, when the reflow time is extended, the growth of intermetallic compound inclusions 30 and a separation 40 at the metallization interface 5 become more enhanced.

The causes of the compound formations and resulting separations have been attributed to effects of poor adhesion between the P-rich layer on the Ni(P), intermetallic compound inclusions or spalling and insufficient protection of the Ni(P) layer during the reflow soldering operation.

Protection for the Ni(P) metallization can be provided through applying a protective layer directly on and over the Ni(P).

Referring to FIG. 3 where there is shown a relatively thin protective layer 50 of the invention, that is applied in a thickness range of about 0.1 micron to 5 micron and becomes well attached at the Ni(P) interface 5. The application may be achieved for example through electroplating, electroless deposition, sputtering or depositing followed by reflowing of a material such as pure Sn solder, in a quantity of about 200 micrometers thick, at a temperature of about 250C for a relatively short time, such as 2 min. Standard application techniques such as solder paste stencil printing; solder paste screen printing, and the solder application techniques of electroplating, evaporation,sputtering and molten transfer. The materials useable with the protective layer 50 when applied on top of Ni(P) metallization include Si-rich Pb-free solders, such as pure Sn, Sn-3.5% Ag, Sn-0.7% Cu, Sn-3% Bi, Sn-3.5%-0.7% Cu, Sn-3.5% Ag-3% Bi, Sn-8%-Zn-3% Bi, Sn-3.5% Ag-0.7% Cu-0.5% Sb; Sn 2.5% Ag-0.5% Cu; Pb bearing solders such as 63% Sn-37% Pb, 60% Sn-40% Pb, 63% Sn-37% Pb-2% Ag.

As shown in FIG. 3, a Ni—Sn intermetallic compound layer 60 forms and is well adhered at the interface 5 and no sign of inclusion formation or spalling appears.

The protective layer 50 on top of Ni(P) metallization wets well the Sn-rich solder and forms Ni—Sn or Ni—Cu—Sn intermetallic compounds that operate to protect the Ni(P).

There is however a limitation in prolonged, extended reflow. As the time is extended, undesired separation progressvely appears. This is illustrated in FIG. 4 where in an extended reflow of 10 min at 250C with a pure electroplated Sn-plated sample a sign of separation is encountered, labelled 70, at the interface 5. Under such a condition, the P-rich layer, possibly as a Ni3P phase, occuring at the interface 5, would produce poor adhesion.

The effectiveness of a control or protective layer of the positioned at the interface 5 between the electroless Ni(P) layer and the metallization 1 is illustrated in connection with side by side photomicrograph views in FIGS. 5, 6 and 7.

Considering FIG. 5 wherein the side by side samples each have a protective or control layer of plated Sn labelled 80 over the Ni(P) metallization of about 1 micron thickness, followed by being reacted with Sn-3.5% Ag solder paste at a temperature of 250C. One sample was reflowed for a 2 minute duration and the other for a 30 min duration in nitrogen gas. In both cases, there is no sign of intermetallic compound inclusion formation or spalling at all. The thin layer of electroplated Sn protects the Ni(P) surface by forming a Ni—Sn layer immediately during reflow.

Considering FIG. 6 wherein the side by side samples each have a protective or control layer of electroless plated Cu labelled 81 over the Ni(P) metallization of about 0.4 micron thickness, followed by being reacted with Sn-3.5% Ag solder paste at a temperature of 250C. One sample was reflowed for a 2 minute duration and the other for a 30 min duration. At both durations, there is no sign of intermetallic compound inclusion formation or spalling at all. The layer of electroplated Cu 81 protects the Ni(P) surface.

Considering FIG. 7 wherein a similar example to that of FIG. 6 is shown in which the side by side samples each have a protective or control layer of electroless plated Cu over the Ni(P) metallization that is of about 0.9 micron thickness labelled 82, followed by being reacted with Sn-3.5% Ag solder paste at a temperature of 250C. The left sample was reflowed for a 2 minute duration and the right for a 30 min duration. At both durations there is no sign of intermetallic compound inclusion formation or spalling at all. The 0.9 micron layer of electroplated Cu protects the Ni(P) surface. An electroless Cu layer may also be deposited on top of a nickel plate layer by seeding an electroless nickel phospher layer using Pd. The electroless process is more practical than electroplating.

What has been described is the suppression of a reaction that forms intermetallic compound inclusions between Ni(P) and Sn-rich solders in Pb free interconnections that is achieved through a reaction preventive or control layer that is positioned on top of an electroless Ni(P) metallization, such as by application of a thin layer of Sn on the Ni(P) or through the application of a thin layer of Cu on the Ni(P).

Referenced by
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US7936569 *Jan 30, 2006May 3, 2011Sanyo Electric Co., Ltd.Circuit device and method of manufacturing the same
US8569632 *Oct 16, 2006Oct 29, 2013Napra Co., Ltd.Wiring board having through hole or non-through hole, and method for producing the same
US8816213 *Jul 22, 2011Aug 26, 2014Tdk CorporationTerminal structure, printed wiring board, module substrate, and electronic device
US20080095926 *Oct 16, 2006Apr 24, 2008Napra Co., Ltd.Wiring board having through hole or non-through hole, and method for producing the same
US20120044651 *Jul 22, 2011Feb 23, 2012Tdk CorporationTerminal structure, printed wiring board, module substrate, and electronic device
Legal Events
DateCodeEventDescription
Jul 30, 2004ASAssignment
Owner name: IBM CORPORATION, NEW YORK
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:KANG, SUNG KWON;SHIH, DA-YUAN;SON, YOON-CHUL;REEL/FRAME:015734/0061;SIGNING DATES FROM 20040702 TO 20040709