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Publication numberUS20060124467 A1
Publication typeApplication
Application numberUS 11/300,327
Publication dateJun 15, 2006
Filing dateDec 15, 2005
Priority dateMay 20, 2003
Publication number11300327, 300327, US 2006/0124467 A1, US 2006/124467 A1, US 20060124467 A1, US 20060124467A1, US 2006124467 A1, US 2006124467A1, US-A1-20060124467, US-A1-2006124467, US2006/0124467A1, US2006/124467A1, US20060124467 A1, US20060124467A1, US2006124467 A1, US2006124467A1
InventorsRong-Ming Ho, In-Mau Chen, Yu-Tsan Tseng, Bao-Tsan Ko, Wen-Hsien Tseng
Original AssigneeIndustrial Technology Research Institute
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Formed by selectively degrading (e.g., by hydrolysis) the first polymer blocks of a block polymer on a conductive substrate to form a nanoporous material with periodically ordered nanochannels exposing the conductive substrate; and electroplating metal into the nanochannels
US 20060124467 A1
Abstract
Metal nanodot arrays and fabrication methods thereof. A film of a block copolymer is deposited on a conductive substrate. The block copolymer comprises first polymer and second polymer blocks, wherein the first polymer blocks have a periodically ordered morphology. The first polymer blocks are selectively degraded to form a nanopatterned template comprising periodically ordered nanochannels. By electroplating, metal is deposited into the nanochannels that expose the conductive substrate, thus forming a metal nanodot array.
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Claims(29)
1. A method for fabricating a metal nanodot array, comprising:
providing a conductive substrate;
depositing a film of a block copolymer on the conductive substrate, wherein the block copolymer comprises first polymer and second polymer blocks, the first polymer blocks forming a periodically ordered morphology;
selectively degrading the first polymer blocks to form a nanopatterned template comprising periodically ordered nanochannels exposing the conductive substrate; and
depositing metal into the nanochannels by electroplating, thereby forming the metal nanodot array.
2. The method as claimed in claim 1, wherein the conductive -substrate comprises a non-transparent substrate.
3. The method as claimed in claim 1, wherein the conductive substrate comprises a transparent substrate.
4. The method as claimed in claim 1, wherein the conductive substrate comprises conductive and non-conductive areas, and the step of depositing metal comprises selectively depositing metal into the nanochannels exposing the conductive areas.
5. The method as claimed in claim 1, wherein the conductive substrate comprises a periodic array of conductive areas.
6. The method as claimed in claim 5., wherein the conductive areas are arranged at an interval of about 1-300 μm.
7. The method as claimed in claim 1, wherein the metal is deposited by pulse electroplating.
8. The method as claimed in claim 7, wherein the pulse electroplating is performed with a current on/off ratio less than 10.
9. The method as claimed in claim 1, further comprising depositing more than one metals into the nanochannels by electroplating to form multi-level metal studs.
10. The method as claimed in claim 1, wherein the metal comprises one or more of Ni, Co, Fe, Mo, W, Pd, or alloys thereof.
11. The method as claimed in claim 1, further comprising forming a conductive layer overlying the nanopatterned template and the metal nanodot array.
12. The method as claimed in claim 1, further comprising removing the nanopatterned template after forming the metal nanodot array.
13. The method as claimed in claim 12, further comprising forming nanoscale objects using the metal nanodot array as catalyst after removing the nanopatterned template.
14. The method as claimed in claim 13, wherein the nanoscale objects comprise carbon nanotubes (CNTs).
15. The method as claimed in claim 14, wherein the nanopatterned template is removed by placing the substrate in a furnace at combustion atmosphere, and the carbon nanotubes are grown in-situ in the furnace at an elevated temperature.
16. The method as claimed in claim 1, wherein the first polymer blocks form a hexagonal cylindrical morphology with its axis perpendicular to a surface of the substrate.
17. The method as claimed in claim 1, wherein the first polymer blocks comprise poly(L-lactide), poly(D-lactide), poly(lactide), and the second polymer blocks comprise poly(styrene), poly(vinylpyridine), and poly(acrylonitrile).
18. The method as claimed in claim 1, wherein the first polymer blocks are poly(L-lactide) and the second polymer blocks are poly(styrene).
19. The method as claimed in claim 1, wherein the first polymer blocks are selectively degraded by hydrolysis.
20. A metal nanodot array, comprising
a conductive substrate with conductive areas and non-conductive areas; and
a metal nanodot array selectively disposed in the conductive areas of conductive substrate.
21. The metal nanodot array as claimed in claim 20, wherein the conductive substrate comprises a non-transparent substrate.
22. The metal nanodot array as claimed in claim 20, wherein the conductive substrate comprises a transparent substrate.
23. The metal nanodot array as claimed in claim 20, the conductive areas are formed as a periodic array.
24. The metal nanodot array as claimed in claim 23, the conductive areas have an interval of about 1-300 μm.
25. The metal nanodot array as claimed in claim 20, further comprising a nanopatterned template with periodically ordered nanochannels exposing the conductive substrate, and the metal nanodot array being disposed within the nanochannels that expose the conductive areas.
26. The metal nanodot array as claimed in claim 25, further comprising a conductive layer overlying the nanopatterned template and the metal nanodot array.
27. The metal nanodot array as claimed in claim 20, further comprising nanoscale objects overlying the metal nanodot array.
28. The metal nanodot array as claimed in claim 27, wherein the nanoscale objects comprises carbon nanotubes (CNTs).
29. The metal nanodot array as claimed in claim 20, wherein the metal nanodot array comprises multi-level metal studs formed of more than one metals.
Description
CROSS REFERENCE TO RELATED APPLICATION

This application is a Continuation-In-Part of copending U.S. patent application Ser. No. 10/850,169, filed May 18, 2004 and published as US 2004/0265548 A1 on Dec. 30, 2004, which is a non-provisional application claiming the priority of provisional U.S. Ser. No. 60/472,377 filed May 20, 2003, the disclosures of which are hereby incorporated by reference in their entireties.

BACKGROUND

The present invention relates in general to nanomaterials. More particularly, it relates to metal dot arrays and fabrication methods thereof.

In recent years, the science involving the manufacturing and applications of nanomaterials has become one of the most promising and creative research areas. One convenient way to prepare materials at nanoscale dimension is to provide nanopatterned templates, i.e., “nanopatterns” with periodic porous nanostructured articles, for the growth of nanomaterials. These nanopatterned templates can be considered as “nanoreactors” for producing nanomaterials. More recently, extensive studies to exploit the concept of nanoreactors have been carried out in different research areas, and wide varieties of nanomaterials and nanoarrays have thus been obtained. Different methods for nanopatterning such as photolithography, soft lithography, scanning probe lithography, electronlithography (i.e., top-down methods) and self-assembly of living cells, surfactants, dendrimers and block copolymers (i.e., bottom-up methods) have been proposed and examined.

A novel method for making nanopatterned templates which utilizes oriented degradable block copolymers is described in copending U.S. patent application Ser. No. 10/850,169 (Publication No. 2004/0265548 A1), entitled “NANOPATTERNED TEMPLATES FROM ORIENTED DEGRADABLE DIBLOCK COPOLYMER THIN FILMS”. The invention is generally directed to applications of the nanopatterned templates for making nanoarrays by electroplating methods.

SUMMARY

According to one aspect of the invention, a method for fabricating a metal nanodot array is provided. A film of a block copolymer is deposited on a conductive substrate. The block copolymer comprises first polymer and second polymer blocks, wherein the first polymer blocks self-assemble into a periodically ordered morphology. The first polymer blocks are selectively degraded to form a nanopatterned template comprising periodically ordered nanochannels. By electroplating, metal is deposited into the nanochannels that expose the conductive substrate, thus forming a metal nanodot array.

According to another aspect of the invention, a metal nanodot array is provided, which comprises a conductive substrate including conductive areas and non-conductive areas, and a metal nanodot array selectively disposed on the conductive areas of conductive substrate.

DESCRIPTION OF THE DRAWINGS

For a better understanding of the present invention, reference is made to a detailed description to be read in conjunction with the accompanying drawings, in which:

The patent or application file contains at least one drawing executed in color. Copies of this patent or patent application publication with color drawing(s) will be provided by the office upon request and payment of the necessary fee.

FIGS. 1 to 5 are schematic diagrams showing a method of fabricating metal nanodot arrays according to one embodiment;

FIGS. 6 to 8 are schematic diagrams showing a method of fabricating metal nanodot arrays according to another embodiment;

FIG. 9 is a top view SPM (scanning probe microscopy) image of PS-PLLA film on ITO glass after hydrolysis;

FIG. 10 is a cross-section FESEM (field emission scanning electron microscopy) image of PS-PLLA film on ITO glass after hydrolysis; and

FIG. 11 is a EDS (energy-dispersive spectrometry) mapping image showing Ni deposition in nanochannels of PS-PLLA template.

DETAILED DESCRIPTION

In the invention, a metal nanodot array is electroplated on a conductive substrate via a nanoreactor. First, referring to FIG. 1, a thin film 102 of degradable block copolymer is deposited on a conductive substrate 100 by spin coating. The copolymer comprises first polymer and second polymer blocks, incompatible with each other. By selecting appropriate solvent for spin coating, the first polymer blocks 102 a self-assemble into a periodically ordered morphology surrounded by matrix of the second polymer blocks 102 b, as shown in FIG. 2. Preferably, the first polymer blocks 102 a have a hexagonal cylindrical morphology with its axis perpendicular to the substrate 100. Subsequently, the first polymer blocks 102 a are selectively degraded by hydrolysis to form a nanopatterned template 104 comprising periodically ordered nanochannels 103, as shown in FIG. 3. The nanochannels 103 expose the underlying conductive substrate 100, allowing subsequent electrochemical deposition.

The first polymer blocks 102 a may comprise poly(L-lactide), poly(D-lactide), poly(lactide), and the second polymer blocks 102 a may comprise poly(styrene), poly(vinylpyridine), and poly(acrylonitrile). Preferably, the block copolymer is poly(styrene)-poly(L-lactide) (PS-PLLA) chiral block copolymer, wherein the first polymer is poly(L-lactide) and the second polymer is polystyrene. In such a case, well-oriented, hexagonal cylindrical nanochannel arrays can be obtained by using a sodium hydroxide solution of methanol/water at about 50-60° C. for the hydrolysis of PLLA. Further details of forming the nanopatterned template 104 can be found in the copending application U.S. patent application Ser. No. 10/850,169 (Publication No. 2004/0265548 A1).

The conductive substrate 100 used herein includes bulk conductive substrates or non-conductive substrates having an uppermost conductive layer. The conductive substrate 100 may be transparent or non-transparent. Examples of transparent conductive substrate include indium tin oxide (ITO), indium zinc oxide (IZO), and aluminum-doped zinc oxide (AZO) glass substrates.

Referring to FIG. 4, after formation of the nanopatterned template 104, the nanochannels 103 are filled with metal 105 by electroplating. The metal 105 may be any of a variety of metals or metal alloys. In particular, when the metal 105 is to provide nucleation points for growing carbon nanotubes (CNT), Ni, Co, Fe, Mo, W, Pd, or alloys thereof are preferable. Furthermore, according to the invention, two or more different metals can be sequentially deposited by electroplating to form multi-level metal studs within the nanochannels 103. Although electroplating can be carried out by various electroplating techniques well known in the art, pulse electroplating is particularly preferred. For example, a constant-current pulse electroplating technique may be employed, characterized in that the plating current is controlled at a constant level and the representative waveform involved is a square wave. The current on/off ratio is usually less than 10, preferably about 1:0.1-15.

Current densities and electrode surface potentials may vary depending on the specific substrate to be plated. Generally, anode and cathode current densities may vary within a range of from about 103 mA/cm2 to 10−5 mA/cm2. Plating baths are maintained in a temperature ranging from about 20° C. to about 110° C. Specific ranges vary depending upon the metal being plated. Plating is continued for a time sufficient to form a deposit of desired thickness. Generally, plating time for a metal nanodot array is from about 10 to about 106 seconds. For CNT manufacture, desired thickness of the catalytic metal 105 may range from about 1 to about 50 nm.

Referring to FIG. 5A, after electroplating, the nanopatterned template 104 may be removed by salvation, oxidation, selective etching, reactive ion etching (RIE), or combustion, leaving an array of metal dots 105 on the conductive substrate 100. The metal nanodot array 105 can be used in production of arrays of CNT or other nanoscale objects such as silicon nanowires. For example, in the combustion method, the substrate may be placed in a furnace and heated to about 350° C. at combustion atmosphere (e.g., air or oxygen). After removal of the nanopatterned template 104, the furnace temperature is ramped up to about 500° C. for in-situ growing CNT arrays.

Rather than removing the nanopatterned template 104, referring to FIG. 5B, a subsequent conductive layer 106 may be blanketly deposited on the metal dot array 105 and the nanopatterned template 104. In this case, the conductive layer 106 is electrically connected to the underlying conductive substrate 100 through the metal dots 105 while the nanopatterned template 104 serves as insulator. The conductive layer 106 may be deposited by well known methods such as sputtering or chemical vapor deposition (CVD). In addition, the conductive layer 106 may be further patterned into a desired portion of integrated circuits, such as bonding pads or interconnect wirings. In such a case, the conductive substrate 100 is a semiconductor substrate with partially completed circuits thereon.

FIGS. 6-8 illustrate another embodiment of the invention, wherein the metal dots are selectively deposited within nanochannels in specific areas. Referring to FIG. 6, the conductive substrate 200 of this embodiment comprises conductive areas 200 a and non-conductive areas 200 b. Such a substrate can be obtained, for example, by patterning the ITO layer of a ITO glass substrate. A nanopatterned template 204 is then formed on the substrate with periodically ordered nanochannels 203. Next, metal 205 is selectively deposited within the nanochannels 203 that expose the conductive areas 200 a by electroplating. Removal of the nanopatterned template 204 reveals the nanodots 205 with a specific pattern on the substrate.

Accordingly, by providing a patterned conductive substrate, metal dot arrays can be selectively deposited in predetermined areas. For example, for FED displays, the conductive areas may be formed as a periodic array with an interval of about 1-300 μm for optimal electron emission properties. One advantage of the invention is that by the choice of predetermined conductive/non-conductive pattern of the substrate and the nano-reactor, the nanoscale dots array can be selectively arranged in a microscale pattern, which makes control of the CNT growth density become possible. Although FIGS. 6-8 comprise a periodic array of rectangular conductive areas 200 a, it should be understood that any shape, spacing, or layout of conductive areas 200 a can be utilized such that the physical properties of the array are suitable for use in a device of interest.

Without intending to limit it in any manner, the present invention will be further illustrated by the following examples.

EXAMPLE

Block copolymer PS365-PLLA109 (ƒPLLA ν=0.25) was prepared by living free radical and ring opening polymerization in sequence. Detailed synthetic routes are described in copending U.S. patent application Ser. No. 10/850,169 (Publication No. 2004/0265548 A1). On the basis of molecular weight and volume ratio, the PS-PLLA is designated as PSx-PLLAy (ƒPLLA ν=Z). x and y represent the numbers of repeating units for PS and PLLA blocks measured by NMR, respectively, and z indicates the volume fraction of PLLA calculated by assuming densities of PS and PLLA are 1.02 and 1.248 g/cm3. The molecular weight of PS and PLLA were 38200 g/mole and 15700 g/mole, respectively. The polydispersity of PS-PLLA was determined 1.21.

A thin film of the block copolymer was formed on ITO glass by spin coating from dilute solution (1.5 wt % of PS-PLLA) at about 50° C. at a spin rate of 1500 rpm. Well-oriented, perpendicular hexagonal cylindrical nanochannel arrays were obtained using a 0.5M NaOH solution, which was prepared by dissolving 2 g of NaOH in a 40/60 (by volume) solution of methanol/water at 60° C. FIG. 9 and FIG. 10 are top view SPM and cross-section FESEM images, respectively of PS365-PLLA109 thin films on ITO glass after 120 hours hydrolysis at 50° C.

The cylindrical nanochannels within PS-PLLA template were filled with Ni metals by electrochemical deposition. An electrochemical analyzer operated in chronopotentiometry (CP) mode (CH Instruments, Model 627B) was used. Constant current deposition was performed at room temperature with a conventional three-electrode setup, using a 3M AgCl reference electrode, DSA (Ti/IrO2) counter electrode, and PS-PLLA coated-ITO/glass working electrode. The electrolyte contained NiSO4.6H2O, NiCl2.6H2O, and H3BO3. The direct current and deposition time were 10−5 A and 10,000 seconds respectively. The current on/off ratio was 1:5. FIG. 11 shows that the deposition of Ni indeed occurred in all the nanochannels as evidenced by EDS (energy-dispersive spectrometry) mapping.

While the invention has been described by way of example and in terms of preferred embodiment, it is to be understood that the invention is not limited thereto. To the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the art). Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.

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US8071467 *Apr 7, 2010Dec 6, 2011Micron Technology, Inc.Methods of forming patterns, and methods of forming integrated circuits
US8080615Jun 19, 2007Dec 20, 2011Micron Technology, Inc.Crosslinkable graft polymer non-preferentially wetted by polystyrene and polyethylene oxide
US8083953Mar 6, 2007Dec 27, 2011Micron Technology, Inc.Registered structure formation via the application of directed thermal energy to diblock copolymer films
US8101261Feb 13, 2008Jan 24, 2012Micron Technology, Inc.One-dimensional arrays of block copolymer cylinders and applications thereof
US8114300Apr 21, 2008Feb 14, 2012Micron Technology, Inc.Multi-layer method for formation of registered arrays of cylindrical pores in polymer films
US8114301May 2, 2008Feb 14, 2012Micron Technology, Inc.Graphoepitaxial self-assembly of arrays of downward facing half-cylinders
US8273647Nov 3, 2011Sep 25, 2012Micron Technology, Inc.Methods of forming patterns, and methods of forming integrated circuits
US8283258Aug 16, 2007Oct 9, 2012Micron Technology, Inc.Selective wet etching of hafnium aluminum oxide films
US8388854Dec 31, 2007Mar 5, 2013Intel CorporationMethods of forming nanodots using spacer patterning techniques and structures formed thereby
US8512583Sep 19, 2011Aug 20, 2013HGST Netherlands B.V.Method using block copolymers and a hard electroplated mask for making a master disk for nanoimprinting patterned magnetic recording disks
US8618000Aug 14, 2012Dec 31, 2013Micron Technology, Inc.Selective wet etching of hafnium aluminum oxide films
US20110003069 *Dec 29, 2009Jan 6, 2011National Tsing Hua UniversityFabrication method of nanomaterials by using polymeric nanoporous templates
DE102008015333A1 *Mar 20, 2008Oct 1, 2009Gsi Helmholtzzentrum Für Schwerionenforschung GmbhNanodraht-Strukturelement
WO2009088587A2 *Dec 2, 2008Jul 16, 2009Robert ChauMethods of forming nanodots using spacer patterning techniques and structures formed thereby
WO2013032440A1 *Aug 30, 2011Mar 7, 2013Hewlett-Packard Development Company, L.P.Depositing nano-dots on a substrate
Classifications
U.S. Classification205/118, 205/171
International ClassificationC08F8/50, C08J5/00, C25D11/02, C25D5/02
Cooperative ClassificationC08J5/005, B82Y30/00, C08F8/50
European ClassificationB82Y30/00, C08F8/50, C08J5/00N
Legal Events
DateCodeEventDescription
Dec 15, 2005ASAssignment
Owner name: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE, TAIWAN
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:HO, RONG-MING;CHEN, IN-MAU;TSENG, YU-TSAN;AND OTHERS;REEL/FRAME:017373/0202;SIGNING DATES FROM 20051124 TO 20051129