US 20060226521 A1
A semiconductor device comprising a metallic leadframe (103) with a first surface (103 a) and a second surface (103 b). The leadframe includes a chip pad (104) and a plurality of segments (107); the chip pad is held by a plurality of straps (105), wherein each strap has a groove (106). A chip (101) is mounted on the chip pad and electrically connected to the segments. A heat spreader (110) is disposed on the first surface of the leadframe; the heat spreader has its central portion (110 a) spaced above the chip connections (108), and also has positioning members (110 b) extending outwardly from the edges of the central portion so that they rest in the grooves of the straps. Encapsulation material surrounds the chip, the electrical connections, and the spreader positioning members, and fills the space between the spreader and the chip, while leaving the second leadframe surface and the central spreader portion exposed.
1. A semiconductor device comprising:
a metallic leadframe having a first surface and a second surface, said leadframe including a chip pad and a plurality of segments;
a plurality of straps holding said chip pad, each strap having a groove;
a semiconductor chip mounted on said chip pad and electrically connected to said segments;
a heat spreader disposed on said first surface of said leadframe, said heat spreader comprising a central portion spaced above said chip connections, and positioning members outwardly extending from edges of said central portion to rest in said grooves of said straps; and
encapsulation material surrounding said chip, electrical connections, and spreader members, filling said space between said spreader and chip, while leaving said second leadframe surface and said central spreader portion exposed.
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17. An apparatus comprising:
a metallic leadframe having a first surface and a second surface, said leadframe including a pad for mounting a heat-generating object; a plurality of segments operable to anchor connections to said object;
a plurality of straps holding said pad, each strap having a groove; and
a heat spreader disposed on said first surface of said leadframe, said heat spreader comprising a portion spaced above said pad, and positioning members outwardly extending from edges of said portion to rest in said grooves of said straps.
The present invention is related in general to the field of electrical systems and semiconductor devices and more specifically to thermally enhanced semiconductor devices having integrated metallic chip support and heat spreader.
Removing the thermal heat generated by active components belongs to the most fundamental challenges in integrated circuit technology. Coupled with the ever shrinking component feature sizes and increasing density of device integration is an ever increasing density of power and thermal energy generation. However, in order to keep the active components at their low operating temperatures and high speed, this heat must continuously be dissipated and removed to outside heat sinks. This effort becomes increasingly harder, the higher the energy density becomes.
In known technology, one approach to heat removal, specifically for devices with metallic leads, focuses on thermal transport through the thickness of the semiconductor chip from the active surface to the passive surface. The passive surface, in turn, is attached to the chip mount pad of a metallic leadframe so that the thermal energy can flow into the chip mount pad of the metallic leadframe. The layer of the typical polymer attach material represents a thermal barrier. When properly formed, the leadframe can act as a heat spreader to an outside heat sink. In many semiconductor package designs, this implies a leadframe with a portion formed such that this portion protrudes from the plastic device encapsulation; it can thus be directly attached to the outside heat sink. Examples are described in U.S. Pat. No. 5,594,234, issued on Jan. 14, 1997 (Carter et al., “Downset Exposed Die Mount Pad Leadframe and Package”) and U.S. Pat. No. 6,072,230, issued on Jun. 6, 2000 (Carter et al., “Bending and Forming Method of Fabricating Exposed Leadframes for Semiconductor Devices”).
Another approach of known technology, specifically for ball-grid array devices without leadframes, employs a heat spreader spaced in proximity of the active surface of the semiconductor chip, at a safe distance from the electrical connections of the active surface. In this approach, the heat has to spread first through the macroscopic thickness of the molding material (typically an epoxy filled with inorganic particles, a mediocre thermal conductor) and only then into a metallic heat spreader. Frequently, the spreader is positioned on the surface of the molded package; in other devices, it is embedded in the molded package, as described in U.S. Pat. No. 6,552,428, issued on Apr. 22, 2003 (Huang et al., “Semiconductor Package having an Exposed Heat Spreader”).
For leadless devices with small outlines (both relative to area consumption and device height), the application of any one of these thermal approaches is aggravated by the need for robustness during the encapsulation process, especially in transfer molding or injection molding methods. Any thermal advancement has to be low-cost, since cost-adding technical proposals are contrary to the strong market emphasis on total semiconductor device package cost reduction.
A need has therefore arisen to for a concept of a low-cost, thermally improved and electrically high performance leadless structure. In addition, a general semiconductor package structure is needed which based on fundamental physics and design concepts flexible enough to be applied for different semiconductor product families and a wide spectrum of design and assembly variations. It should not only meet high thermal and electrical performance requirements, but should also achieve improvements towards the goals of enhanced process yields and device reliability.
The present invention provides improved thermal performance of integrated circuits, especially of the SON, SOIC, SOP, and PDIP families, solving one of the most intractable limitations of semiconductor technology. One embodiment of the invention is a semiconductor device comprising a metallic leadframe with a first surface and a second surface. The leadframe includes a chip pad and a plurality of segments; the chip pad is held by a plurality of straps, wherein each strap has a groove. A chip is mounted on the chip pad and electrically connected to the segments. A heat spreader is disposed on the first surface of the leadframe; the heat spreader has its central portion spaced above the chip connections, and also has positioning members extending outwardly from the edges of the central portion so that they rest in the grooves of the straps. Encapsulation material surrounds the chip, the electrical connections, and the spreader positioning members, and fills the space between the spreader and the chip, while leaving the second leadframe surface and the central spreader portion exposed.
The base metal for both the leadframe and the heat spreader is preferably copper. The preferred thickness range for leadframe as well as spreader is between about 300 and 150 μm. The depth of the grooves in the chip pad straps are preferably about half the leadframe thickness.
Preferably, the heat spreader has a three-dimensional dome-like shape to approximate, together with the metallic chip pad, an almost closed thermally conductive shell surrounding the chip. Further, the heat spreader has preferably at least one groove formed so that it enhances the adhesion to the encapsulation material.
In another embodiment of the invention, a heat sink is in contact with the central spreader portion. In yet another embodiment of the invention, another heat sink is in contact with the second surface of the leadframe.
It is a technical advantage of the invention that it offers low-cost design and structure options for semiconductor packages to create short paths of steepened temperature gradient in order to dissipate the heat flux away from high-temperature IC portions to (outside) heat sinks.
It is another technical advantage that the innovation of the invention is accomplished using the installed equipment base so that no investment in new manufacturing machines is needed.
The technical advances represented by the invention, as well as the objects thereof, will become apparent from the following description of the preferred embodiments of the invention, when considered in conjunction with the accompanying drawings and the novel features set forth in the appended claims.
The present invention is related to U.S. Pat. No. 6,597,065, issued on Jul. 22, 2003 (Efland, “Thermally Enhanced Semiconductor Chip having Integrated Bonds over Active Circuits”).
Chip 101 has an active surface 101 a, which comprises components such as integrated circuits, discrete transistors and diodes, and also passive parts including capacitors and resistors. Active surface 101 a generates the thermal energy/heat during device operation, which needs to be transported away in order to maintain the preferred operation temperatures and to prevent overheating of the active components.
The most effective way of removing thermal energy is by conduction; less effective, but nevertheless welcome mechanisms include thermal transport by convection and by radiation. In quantitative terms, the energy transport by thermal conductance is expressed by a differential equation, which expresses, following FOURIER's approach, the thermal flux Q per unit of time as being the product of thermal conductivity λ multiplied by the gradient of temperature T, in the direction of decreasing temperature, and by the area q perpendicular to the temperature gradient:
When, over the length 1, the temperature drop is steady and uniform from the high temperature T2 to the low temperature T1, then (grad T) reduces to (T2−T1)/l:
In the present invention, improvements of both λ·q and (grad T) are simultaneously provided to enhance the thermal flux vertically away from the heat-generating active components on the active surface 101 a of the semiconductor chip 101.
In addition to this enhanced thermal flux vertically away from the active chip surface, there is the traditional possibility of conducting thermal energy in the opposite direction through the semiconductor material chip 101 to its passive surface 101 b and beyond into leadframe 103. Through the second surface 103 b of leadframe 103, the thermal flux can enter the ambient or an attached substrate.
Leadframe 103 is made of a base metal, preferably copper or a copper alloy. Alternative base metals include brass, aluminum, iron-nickel alloys (such as “Alloy 42”), and invar. Frequently, the base metal is fully covered with a plated layer; as an example, the copper base metal may be plated with a nickel layer.
[As defined herein, the starting material of the leadframe is called the “base metal”, indicating the type of metal. Consequently, the term “base metal” is not to be construed in an electrochemical sense (as in opposition to ‘noble metal’) or in a structural sense.]
The base metal of leadframe 103 originates with a metal sheet in the preferred thickness range from 100 to 300 μm; thinner sheets are possible. The ductility in this thickness range provides the 5 to 15% elongation that facilitates the segment bending and forming operation. The leadframe is stamped or etched from the starting metal sheet.
As stated above, the base metal of leadframe 103 may often be plated, for instance with a nickel layer. The plated layer is preferably rough, non-reflective nickel having a thickness between 0.2 and 1.0 μm, preferably 0.5±25 μm. Nickel is the preferred metal because, positioned under the tin-based solder of contemporary devices, it reduces the propensity for tin whiskers. The plated nickel layer is ductile for the leadframe bending and forming process.
The X-ray view of
Typically, the heat spreader is stamped and formed form sheet metal; in this process, the positioning members 110 b obtain a configuration, which provides strong anchoring of the encapsulation material onto the heat spreader. An example of suitably formed members with at least one curving for encapsulation adhesion is schematically illustrated in
In its final form, the heat spreader 110 comprises a three-dimensional bell-shaped metal part. Together with the metallic chip pad 104 of the leadframe, the bell-shaped heat spreader approximates for the device 100 an integrated, thermally strong conductive shell surrounding chip 101.
Device 100 is packaged by encapsulation material 120, which surrounds chip 101, the electrical connections 108, and the spreader positioning members 110 b. The encapsulation material fills the space between spreader 110 and chip 101, but leaves the second leadframe surface 103 b and the central spreader portion 110 exposed. The preferred encapsulation material is a molding compound containing thermally conductive fillers.
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While this invention has been described in reference to illustrative embodiments, this description is not intended to be construed in a limiting sense. Various modifications and combinations of the illustrative embodiments, as well as other embodiments of the invention, will be apparent to persons skilled in the art upon reference to the description.
As an example, the invention covers integrated circuits made in substrates of silicon, silicon germanium, gallium arsenide, or any other semiconductor material used in integrated circuit manufacture.
As another example, the invention covers generally a heat-generating semiconductor unit. This concept thus includes single-chip as well as multi-chip devices. Further, the concept includes devices employing wire-bonded assembly as well as flip-chip assembly.
It is therefore intended that the appended claims encompass any such modifications or embodiments.