US 20070069241 A1
A memory array having memory cells comprising a diode and an antifuse can be made smaller and programmed at lower voltage by using antifuse materials having higher dielectric constant and higher acceleration factor than silicon dioxide, and by using diodes having lower band gaps than silicon. Such memory arrays can be made to have long operating lifetimes by using the high acceleration factor and lower band gap materials. Antifuse materials having dielectric constants between 5 and 27, for example hafnium silicon oxynitride or hafnium silicon oxide are particularly effective. Diode materials with band gaps lower than silicon, such as germanium or a silicon-germanium alloy are particularly effective.
1. A memory cell for reliable low voltage reading and writing comprising:
a diode in series with an antifuse, the antifuse being made of one of XvSiwOx, XvOw and XvSiwOxNy, where X represents an element from the family consisting of La, Hf, Ta, Y, Zr, and Nb and the subscripts v, w, x, and y can have any values that form a stable compound.
2. A memory cell for reliable low voltage reading and writing as in
3. A memory cell for reliable low voltage reading and writing as in
4. A memory cell for reliable low voltage reading and writing as in
5. A memory cell for reliable low voltage reading and writing as in
6. A memory cell for reliable low voltage reading and writing as in
7. A memory cell for reliable low voltage reading and writing as in
8. A memory cell for reliable low voltage reading and writing as in
9. A memory cell for reliable low voltage reading and writing comprising:
a diode in series with an antifuse, the antifuse being formed from a layer made of an insulating material having a dielectric constant in the range of 6 to 27; and
wherein the diode is formed from a semiconductor material with a band gap smaller than that of silicon.
10. A memory cell for reliable low voltage reading and writing as in
11. A memory cell for reliable low voltage reading and writing as in
12. A memory cell for reliable low voltage reading and writing as in
13. A memory cell for reliable low voltage reading and writing as in
14. A memory cell for reliable low voltage reading and writing as in
15. A memory cell for reliable low voltage reading and writing as in
16. A memory cell for reliable low voltage reading and writing as in
17. A memory cell for reliable low voltage reading and writing as in
18. A method of forming and programming an array of memory cells each comprising an antifuse in series with a diode, the method comprising:
forming the antifuse from an insulator having a dielectric constant above 5;
forming the diode from a thin film semiconductor material with a band gap smaller than that of silicon;
programming a selected one of the memory cells by applying a voltage in a direction opposite that of natural current flow through the diode of the selected memory cell, the voltage being sufficient to short the antifuse.
19. A method of forming and programming an array of memory cells as in
applying a second voltage to word lines contacting unselected ones of the memory cells; and
applying a third voltage to bit lines contacting the unselected ones of the memory cells, wherein the second and third voltages are substantially equal.
20. A method of forming and programming an array of memory cells as in
21. A method of forming and programming a memory cell comprising an antifuse in series with a diode, the method comprising:
forming the antifuse from an insulator having a dielectric constant above 5,
forming the diode from a semiconductor material having a band gap smaller than that of silicon;
programming the memory cell by:
applying a first voltage in a direction of natural current flow through the diode, the first voltage being sufficient to short the antifuse; and
applying a second voltage in the direction of natural current flow through the diode, the second voltage being sufficient to cause current to pass through the shorted antifuse and to further reduce resistance of the shorted antifuse.
22. A method of forming and programming a memory cell as in
applying the first voltage to word lines contacting unselected memory cells; and
applying a third voltage to bit lines contacting unselected memory cells that is lower than the first voltage.
23. A method of forming and programming a memory cell as in
24. A method of forming and programming a memory cell as in
25. A method of forming and programming a memory cell as in
26. In a memory comprising an array of memory cells, each memory cell comprising an antifuse in series with a diode, each memory cell having an anode end connected to an anode end of the diode and a cathode end connected to a cathode end of the diode, and each memory cell cathode end being connected to a word line and each memory cell anode end being connected to a bit line, a method of programming one of the memory cells comprising:
applying to a bit line connected to a selected one of the memory cells a voltage sufficient to short the antifuse of the selected one of the memory cells;
applying to a word line connected to the selected one of the memory cells a ground voltage;
applying to bit lines contacting the anode ends of memory cells not selected a voltage less than or equal to a threshold voltage of the diodes; and
applying to word lines contacting the cathode ends of memory cells not selected a voltage less than or equal to one threshold voltage below the voltage sufficient to short the antifuse of the memory cell.
27. A method of programming one of the memory cells of
28. A method of programming one of the memory cells of
This application relates to concurrently filed U.S. application Ser. No. ______ (attorney docket number MA-153) by N. Johan Knall, entitled “REVERSE-BIAS METHOD FOR WRITING MEMORY CELLS IN A MEMORY ARRAY”; and to U.S. application Ser. No. ______, (attorney docket number MA-154) by James M. Cleeves, entitled “MEMORY CELL WITH HIGH-K ANTIFUSE FOR REVERSE BIAS PROGRAMMING”; all filed herewith and incorporated herein by reference.
The invention relates to programming and reading an array of nonvolatile memory cells each comprising a diode in series with an antifuse.
Integrated circuit memories are typically large arrays of memory cells connected between bit lines and word lines. In order to achieve reliable programming and reading of the memory cells within the array, memory cells selected to be programmed or read must be isolated from memory cells that are not selected. Also, as it becomes increasingly important to minimize power used by integrated circuit devices, it is desirable to minimize power consumption in integrated circuit memories. Lowering the voltage for reading and writing usually reduces power consumption. Also lowering the voltage usually allows elements of the integrated circuit device to shrink, thus reducing manufacturing cost. Therefore it is desirable to program and operate memories at lower voltages.
Other materials besides silicon and silicon dioxide have been considered for making some integrated circuit structures.
A paper by Joe W. McPherson et al. entitled “Trends in the Ultimate Breakdown Strength of High Dielectric-Constant Materials” published in IEEE Transactions on Electron Devices, Vol. 50, No. 8, August 2003 indicates that the ultimate breakdown strength Ebd of a dielectric material is found to decrease as the dielectric constant K increases. The paper indicates that great interest exists in the breakdown strength of high-K dielectrics because for CMOS technology scaling to continue, the conventional SiO2 gate-dielectric (which has a high Ebd) must be replaced. The paper gives new time-dependent dielectric breakdown (TDDB) data over a wide range of dielectric materials The paper also discusses acceleration factor (the relationship between voltage and time to breakdown) and gives acceleration factor data for selected materials. But the McPherson et al. paper says nothing about materials used for making antifuses or diodes such as are used for making memory cells.
The present invention is defined by the appended claims, and nothing in this section should be taken as a limitation on those claims. In general, the invention is directed to methods of forming and programming an array of nonvolatile memory cells each comprising an antifuse in series with a diode. The invention takes advantage of the one-way nature of the diode and uses materials that allow for lower voltage operation. In particular, antifuses having dielectric constants higher than that of silicon dioxide and diodes having band gaps lower than that of silicon are found to be effective in allowing the memories to operate at lower voltages.
In order to shrink the memory cell horizontal area without having manufacturing problems, the vertical dimension of the memory cell must also be reduced, and that means the write voltage and read voltage must be reduced. But antifuses and diodes made from films of silicon dioxide have already been made just a few atoms thick, and can not be made thinner. However, using a material with a higher dielectric constant allows films of dielectric to be thicker for the same breakdown field strength (breakdown voltage divided by thickness is breakdown field strength).
One aspect of the invention is to form a memory cell from a diode in series with an antifuse where the antifuse is made, not from silicon dioxide, but from a material having a higher dielectric constant than silicon dioxide. The elements lanthanum (La), hafnium (Hf), tantalum (Ta), yttrium (Y), zirconium (Zr), and niobium (Nb) when oxidized or combined with nitrogen form dielectrics with higher dielectric constants than silicon dioxide and can each be used to form antifuses in memory cells that can be written and read at lower voltages than silicon dioxide.
An aspect of the invention is to assure that the dielectric constant of the insulator used for the memory cell antifuse is higher than that of silicon dioxide (3.9). In particular, a dielectric constant range of approximately 5 to 27 in the antifuse and a band gap smaller than that of silicon work well to produce memory cells that can be reliably read and written at lower voltages than memory cells of silicon dioxide and silicon.
When the antifuse is formed from an insulator having a dielectric constant above about 5 and the diode is a thin film with a band gap smaller than silicon, the memory cells can be programmed by applying a low voltage in a direction opposite that of natural current flow through the diode, which shorts the antifuse to produce the programmed memory cell. A programming voltage sufficient to short the antifuse can be lower than that required to program a memory cell made from a silicon dioxide antifuse and a doped silicon diode. While a selected memory cell is being programmed, unselected memory cells preferably receive minimal voltage, thus minimizing power consumption in the memory array.
It is also advantageous to program such a memory cell by applying two voltages in the forward direction of the diode. The first application of voltage shorts the antifuse (forms a conductive path through the antifuse), and the second application of voltage makes a larger opening at the location of the short, thus reducing resistance to current flow through the short location.
It is important to avoid disturbing or programming unselected memory cells while programming the selected cells. It is also important to avoid disturbing any of the memory cells while reading the memory cells, and this is true for the life of the device, which may be on the order of 10 years. A memory cell array is accessed by word lines and bit lines, typically running orthogonal to each other in separate horizontal layers of an integrated circuit structure, such that each memory cell is accessed by one word line and one bit line. The memory cells of the present invention each comprise an antifuse in series with a diode. The antifuse may be placed at either the cathode end or the anode end of the diode. According to one aspect of the invention, while a voltage sufficient to short an antifuse is applied to a bit line contacting the selected memory cell and a ground voltage is applied to a word line contacting the selected memory cell, a voltage less than or equal to the diode threshold voltage is applied to bit lines of unselected cells and a voltage that is lower than the voltage sufficient to short an antifuse of a memory cell by one diode threshold voltage is applied to word lines contacting unselected memory cells. This assures that the selected memory cell is programmed and that unselected memory cells are not programmed or otherwise disturbed.
When developing improvements in integrated circuit memories, it is desirable to reduce the cost of manufacturing while improving operating speed, reducing power consumption, and maintaining a good useful lifetime of the devices. The present invention is directed to memory arrays in which memory cells are formed from a diode and an antifuse connected in series. Preferred embodiments orient the diode and antifuse in a vertical stack between word lines and bit lines.
A critical requirement for shrinking memory devices to deep submicron sizes is to reduce the voltage levels required to write and read the memory cells. For example, whereas the prior art programming voltage illustrated in
Careful attention to several parameters of materials used in the memory cells is especially important to reduce the write and read voltages applied to diode-plus-antifuse memory arrays and especially for monolithic three-dimensional memory arrays such as those manufactured by Matrix Semiconductor, Inc., assignee of the present patent application. A monolithic three dimensional memory array is one in which multiple memory levels are formed above a single substrate, such as a wafer, with no intervening substrates. The layers forming one memory level are deposited or grown directly over the layers of an existing level or levels. In contrast, stacked memories have been constructed by forming memory levels on separate substrates and adhering the memory levels atop each other, as in Leedy, U.S. Pat. No. 5,915,167, “Three dimensional structure memory.” The substrates of stacked memories may be thinned or removed from the memory levels before bonding, but since the memory levels are initially formed over separate substrates, such memories are not true monolithic three dimensional memory arrays.
One solution to this problem has been discussed in the concurrently filed U.S. patent application Ser. No. ______ (docket number MA-153) of N. Johan Knall entitled “REVERSE-BIAS METHOD FOR WRITING MEMORY CELLS IN A MEMORY ARRAY. That patent application has been incorporated herein by reference. Another solution to the problem is to replace the silicon and silicon dioxide materials used in the antifuses and diodes with different materials having different breakdown strengths, different thicknesses, different dielectric constants, different acceleration factors (see below) and different band gaps.
In order to program at lower voltage without making the antifuse too thin, the antifuse material must have a lower breakdown strength at an adequate thickness. Recent measurements of breakdown strength (the electric field strength at which the dielectric develops a sudden and sustained rise in leakage current) as a function of dielectric constants of materials have shown that there is a negative correlation between breakdown strength Ebd and dielectric constant K. Silicon dioxide (SiO2) has a dielectric constant of 3.9 and a breakdown strength of about 13 MV/cm (megavolts per centimeter). Higher-K dielectrics break down at lower field strengths, and therefore lower voltages for the same thickness. For optimum benefit, some embodiments incorporate a combination of changes. For antifuses, a material with a higher dielectric constant than silicon dioxide is used at a greater thickness than commonly used for silicon dioxide antifuses such that the change in dielectric constant is greater than the change in thickness. Hence a lower breakdown voltage is achieved along with greater manufacturing ability for the antifuse.
It is desirable to make antifuses with a thickness greater than 20 angstroms. If antifuse thickness becomes less than 20 angstroms (only a few atoms thick), rather than simply breaking down at a correspondingly lower voltage, another phenomenon occurs. Below about 20 angstroms, upon application of a voltage, the dielectric exhibits high tunneling current without breaking down, such that it is difficult to form a permanent conductive path. An antifuse should behave as an insulator until a breakdown voltage is reached, then develop a permanent conductive path due to melting in the presence of high current that occurs upon breakdown. Therefore it is desirable to use antifuse materials that have sufficiently high dielectric constants that they can be made thicker than 20 angstroms and still break down cleanly at a fairly low voltage.
Making the antifuse too thick also has problems. Increased thickness increases resistance (reduces leakage) through the antifuse to the point that voltage drop across the memory cell (antifuse plus diode) is almost entirely across the antifuse, and the diode no longer protects the antifuse sufficiently from being shorted when a reverse bias is applied to the memory cell. Therefore, it is undesirable to use antifuse materials that have such a high dielectric constant that they must be made thicker than about 65 angstroms. We have found that a thickness range of 20 to 65 angstroms avoids both these problems.
Some of the materials indicated in
Materials that appear satisfactory for making antifuses programmable at lower voltages can be described with the general formulas XvSiwOx, XvOw and XvSiwOxNy, where X represents an element from the family consisting of lanthanum (La), hafnium (Hf), tantalum (Ta), yttrium (Y), zirconium (Zr), and niobium (Nb) and the subscripts v, w, x, and y can have any value that forms a stable compound. Thus, some acceptable materials include HfO2, La2O3, LaSiON, Hf2SiO, HfSiON, Ta2O5, Ta2O3N to name a few.
For both easy writing and undisturbed reading, it is desirable to have a material that sharply changes its behavior in response to changing the applied voltage. That is, when being written at a WRITE voltage, the material should break down and change states quickly, for example over a period of microseconds or less in order for the memory cell to be written. However, when being read at a somewhat lower READ voltage, the material should reliably not break down even over an extended lifetime on the order of 10 years. Thus, for a desirable material, a curve that relates time to breakdown to voltage should have a steep slope. This slope is called acceleration factor. We have recognized that a high acceleration factor is beneficial in the manufacture and operation of integrated circuit memory cells that use antifuses. Thus we have examined materials looking for high acceleration factors, thinking such materials could be used to make antifuses and diodes in memory cells. As presented in the above McPherson et al. paper, the characteristic breakdown strengths Ebd of SiO2, HfSiON, Ta2O5, and PZT are 13.6, 7, 4, and 0.8 MV/cm, respectively. However, even though the breakdown strength Ebd is observed to decrease with dielectric constant K, the field acceleration factor γ is observed to increase with K. We see that Ebd decreases as approximately k−0.65 while γ increases as K0.66. For high-K materials, the field acceleration factor γ is significantly greater than that for SiO2.
Desirable Antifuse Characteristics
The acceleration factor curves of
Similarly, if tantalum oxide Ta2O5 at the high end of the desired K range, is selected, the desired read field strength is 2.4 MV/cm, and a thickness of 63 angstroms, at the top end of the desired thickness range is needed in order to assure the 10-year lifetime during reading. But anther material, PZT, has such a steep acceleration curve and breaks down at such low field strength that this material would have to be 400 angstroms thick to be read at 1.5 volts over a long lifetime, so PZT is not practical for antifuses in memory cells that will be read at 1.5 volts. Of course, the same methodology can be used to choose a material and an optimum thickness and dielectric constant if a higher or lower read voltage is desired. For a higher or lower read voltage, the optimum material would have a correspondingly lower or higher dielectric constant.
Additional materials are practical for antifuse use.
Lower Band Gap Materials for Diodes
When considering materials for the diode of the memory cell, the band gap of the diode material must be considered. It is a further aspect of the invention that the read voltage is reduced by using a low bandgap semiconductor material to form the diode. Band gap is an intrinsic property of a material, and determines the threshold voltage of the diode and to some extent the conductivity through the diode. The band gap of silicon is about 1.12 electron volts at 300 degrees Kelvin. The read voltage using re-crystallized silicon diodes has been about 2 volts. At lower sensing currents, the read voltage for a silicon diode could drop a few hundred millivolts, but it is difficult to form a silicon diode that can be read reliably at 1.5 volts. It is desirable to form the diodes from a material with a lower band gap than that of silicon so that programming of antifuses in series with the diodes may be done more quickly and at lower programming voltages. Lifetime of the antifuses in the array is especially improved by using a lower read voltage because for the one-time-programmable memory cells of this invention, far more of the lifetime is spent in read operations. One group of materials that works well for diodes is the group consisting of germanium and the silicon germanium alloys. The diodes may be formed either by re-crystallizing or by depositing the selected diode material. The general formula SixGe1-x encompasses this family of materials (though elemental silicon is not included). As germanium content increases, the band gap decreases proportionally to 0.66 electron volts for pure germanium. So pure germanium has about half the diode threshold voltage of pure silicon. This SixGe1-x family is useful for reducing the required read voltage while retaining adequate current, and allows read voltage to be reduced by half a volt or more. Gallium antimony has a band gap of 0.72 electron volts and is also suitable for diodes. Indium arsenic at 0.36 electron volts and lead sulfide at 0.41 electron volts can provide even lower acceptable read voltages.
Programming and Reading
With the new materials discussed above, it is possible to quickly program (write) memory cells using forward diode bias voltages to the memory cells that are lower than used in the prior art. It is also possible to read the memory cells without disturbing their values over a long lifetime, expected to be on the order of 10 years.
Thus the selection of new materials discussed above allows programming and reading at lower voltages than the prior art. Because the devices can be scaled to smaller dimensions, both power and cost of manufacturing are reduced.
A word line arrangement having multiple layers of word line segments for three-dimensional memory arrays may be used with memory cells of the present invention. Such a word line arrangement is described by Roy E. Scheuerlein in detail in U.S. patent application Ser. No. 10/403,844, which is incorporated herein by reference. A method for sensing while programming a non-volatile memory cell described by Kleveland et al. in U.S. Pat. No. 6,574,145 may be used with the present invention for sensing memory cell values, and is incorporated herein by reference.
The foregoing detail has described only a few of the many possible implementations of the present invention. For this reason, this detailed description is intended to illustrate, not to limit. Variations and modifications of the embodiments disclosed herein may be made based on the description set forth herein, without departing from the scope and spirit of the invention. It is only the following claims, including all equivalents, that are intended to define the scope of this invention. While certain embodiments have been described in the context of a three-dimensional, field-programmable, memory array, it should be appreciated that such an array is not necessarily required. Moreover, the embodiments described above are specifically contemplated to be used alone as well as in various combinations. Accordingly, other embodiments, variations, and improvements not described herein are not necessarily excluded from the scope of the invention.