Publication number | US20070179738 A1 |

Publication type | Application |

Application number | US 11/341,738 |

Publication date | Aug 2, 2007 |

Filing date | Jan 27, 2006 |

Priority date | Jan 27, 2006 |

Also published as | US7248994 |

Publication number | 11341738, 341738, US 2007/0179738 A1, US 2007/179738 A1, US 20070179738 A1, US 20070179738A1, US 2007179738 A1, US 2007179738A1, US-A1-20070179738, US-A1-2007179738, US2007/0179738A1, US2007/179738A1, US20070179738 A1, US20070179738A1, US2007179738 A1, US2007179738A1 |

Inventors | John Stolan |

Original Assignee | Stolan John A |

Export Citation | BiBTeX, EndNote, RefMan |

Referenced by (3), Classifications (6), Legal Events (8) | |

External Links: USPTO, USPTO Assignment, Espacenet | |

US 20070179738 A1

Abstract

An apparatus and method for determining a linear position from a linear variable differential transformer (LVDT) including a primary coil driven by an excitation signal, and two secondary coils coupled to two correlated signals. The method includes converting the correlated signals to a digital estimate, for each of the correlated signals, and evaluating an amplitude of the correlated signals to determine the linear position. The process of converting the correlated signals comprises comparing the correlated signal to an analog feedback signal to generate a comparison result and incrementally adjusting the digital estimate in response to sampling the comparison result at an estimation frequency. The converting process also includes converting the digital estimate to the analog feedback signal, collecting a digital estimate history at a sample frequency that is a binary multiple of the excitation frequency, and analyzing the digital estimate history to determine the amplitude substantially near the excitation frequency.

Claims(32)

a first signal analyzer including an analog input operably coupled to the first positional output and a second signal analyzer including an analog input operably coupled to the second positional output, each of the first signal analyzer and the second signal analyzer comprising:

a feedback loop configured to generate a digital estimate that substantially tracks an amplitude of the analog input, the feedback loop comprising:

a comparator configured for comparing the analog input to an analog feedback signal and generating a comparison result;

a digital estimator operating at an estimation frequency and configured to sample the comparison result and modify the digital estimate by an incremental adjustment amount responsive to the comparison result to reduce a difference between the amplitude of the analog input signal and an amplitude of the analog feedback signal; and

a digital-to-analog converter configured to convert the digital estimate to the analog feedback signal; and

an amplitude analyzer configured to collect a digital estimate history by sampling the digital estimate at a sample frequency that is a binary multiple of the excitation frequency and analyze the digital estimate history to determine an amplitude of the digital estimate substantially near the excitation frequency; and

a result calculator configured to evaluate the amplitude of the digital estimate from the first signal analyzer and the amplitude of the digital estimate from the second signal analyzer to generate a numerical representation of the linear position of the movable component.

an amplitude generator configured for generating a digital representation of the excitation signal at each time period of a generation frequency;

a pulse-width modulator configured for converting the digital representation to a digital pulse with a duty cycle correlated to the digital representation to generate a pulse-width modulated signal; and

a low pass filter configured for filtering the pulse-width modulated signal to generate the excitation signal.

a first adder configured for adding the amplitude of the first signal analyzer to the amplitude of the second signal analyzer to generate a first term;

a second adder configured for subtracting the amplitude of the second signal analyzer from the amplitude of the first signal analyzer to generate a second term; and

a divider configured for dividing the second term by the first term to generate the linear position.

a pulse-width modulator configured for converting the digital estimate to a digital pulse with a duty cycle correlated to the digital estimate to generate a pulse-width modulated estimate; and

a low pass filter configured for filtering the pulse-width modulated estimate to generate the analog feedback signal.

generating at least two correlated signals from a Linear Variable Differential Transformer (LVDT) by stimulating an excitation input with an excitation signal, wherein the at least two correlated signals are responsive to a linear position of a movable component of the LVDT and the excitation signal;

converting the at least two correlated signals to a digital estimate for each of the at least two correlated signals, the converting comprising:

comparing the correlated signal to an analog feedback signal to generate a comparison result;

incrementally adjusting the digital estimate at an estimation frequency in response to sampling the comparison result such that the incremental adjusting reduces a difference between the correlated signal and the analog feedback signal;

converting the digital estimate to the analog feedback signal;

collecting a digital estimate history by sampling the digital estimate at a sample frequency that is a binary multiple of an excitation frequency of the excitation signal; and

analyzing the digital estimate history to determine an amplitude of the digital estimate substantially near the excitation frequency; and

evaluating the amplitude of the digital estimate substantially near the excitation frequency of the at least two correlated signals to determine a numerical representation of the linear position of the movable component.

generating a digital representation of the excitation signal at each time period of a generation frequency;

converting the digital representation to a digital pulse with a duty cycle correlated to the digital representation to generate a pulse-width modulated signal; and

filtering the pulse-width modulated signal to generate the excitation signal.

converting the digital estimate to a digital pulse with a duty cycle correlated to the digital estimate to generate a pulse-width modulated estimate; and

filtering the pulse-width modulated estimate to generate the analog feedback signal.

converting the first signal to a first digital estimate, the convening comprising:

comparing the first signal to a first analog feedback signal to generate a first comparison result;

incrementally adjusting the first digital estimate at an estimation frequency in response to sampling the first comparison result to reduce a difference between an amplitude of the first signal and an amplitude of the first analog feedback signal;

converting the first digital estimate to the first analog feedback signal;

sampling the first digital estimate at the sample frequency to generate a first digital estimate history; and

analyzing the first digital estimate history to determine a first amplitude of the first signal substantially near the excitation frequency;

converting the second signal to a second digital estimate, the converting comprising:

comparing the second signal to a second analog feedback signal to generate a second comparison result;

incrementally adjusting the second digital estimate at an estimation frequency in response to sampling the second comparison result to reduce a difference between an amplitude of the second signal and an amplitude of the second analog feedback signal;

converting the second digital estimate to the second analog feedback signal;

sampling the second digital estimate at a sample frequency to generate a second digital estimate history; and

analyzing the second digital estimate history to determine a second amplitude of the second signal substantially near the excitation frequency; and

evaluating the first amplitude and the second amplitude to determine a numerical representation of the linear position of the movable component.

generating a digital representation of the excitation signal at each time period of a generation frequency;

converting the digital representation to a digital pulse with a duty cycle correlated to the digital representation to generate a pulse-width modulated signal; and

filtering the pulse-width modulated signal to generate the excitation signal.

adding the first amplitude to the second amplitude to generate a first term;

subtracting the second amplitude from the first amplitude to generate a second term;

dividing the second term by the first term to generate the linear position.

converting the digital estimate to a digital pulse with a duty cycle correlated to the digital estimate to generate a pulse-width modulated estimate; and

filtering the pulse-width modulated estimate to generate the analog feedback signal.

analyzing the first digital estimate comprises:

collecting a first digital estimate history at a sample frequency that is a binary multiple of the excitation frequency of the excitation signal; and

analyzing the first digital estimate history to determine the first amplitude; and analyzing the second digital estimate comprises:

collecting a second digital estimate history at the sample frequency that is the binary multiple of the excitation frequency of the excitation signal; and

analyzing the second digital estimate history to determine the second amplitude.

Description

The present application is related to concurrently filed U. S. patent application Ser. No. (2507-7532US) (22154-US) and entitled DIGITAL METHOD AND APPARATUS FOR RESOLVING SHAFT POSITION.

1. Field of the Invention

This invention relates generally to determining linear position and, more particularly, to using digital means for determining linear position.

2. Description of Related Art

This invention relates to determining linear position by using the electrical outputs of a a Linear Variable Differential Transformer (LVDT). It may be desireable to determine a linear position for many applications. For example, actuation systems on aircraft or rocket motors. One method of doing this is to use a LVDT to sense the position. The LVDT may use a sinusoidal excitation and measurement of two inductively coupled output signals. LVDTs have one primary winding and two secondary windings. The two secondary windings are mechanically arranged so an excitation signal on the primary winding will proportionally couple onto the secondary windings based on the position of a ferrous core. By measuring the voltages on the secondary windings it is possible to determine the linear position of the LVDT.

These output signals from the two secondary windings are generally analog signals, which may require a significant amount of analog electronics to evaluate the signal amplitudes and derive the shaft position. As a result, many proposals use analog-to-digital converters to convert the analog signals to digital signals, which may then be manipulated digitally to determine the respective amplitudes and calculate arithmetic functions to determine the shaft position. However, even these solutions may require complex analog-to-digital converters, and complex arithmetic engines for determining the signal amplitudes.

There is a need for a method and apparatus that reduces the complexity and number of analog components used in determining linear position by using simple analog components coupled to flexible digital logic and digital signal processing.

The present invention reduces the complexity and number of analog devices needed to resolve linear position.

An embodiment of the present invention comprises an apparatus for determining a linear position of a LVDT. The apparatus includes a first signal analyzer, a second signal analyzer, and a result calculator. The LVDT includes an excitation input coupled to an excitation signal with an excitation frequency, a first positional output coupled to an analog input of the first signal analyzer, and a second positional output coupled to an analog input of the second signal analyzer. Each of the first signal analyzer and the second signal analyzer includes a comparator, a digital estimator, a digital-to-analog converter, and an amplitude analyzer. The comparator is configured for comparing the analog input to an analog feedback signal and generating a comparison result. The digital estimator uses the comparison result to modify a digital estimate by an incremental adjustment amount at an estimation frequency in response to the comparison result. The digital estimate is converted to the analog feedback signal by the digital-to-analog converter. The amplitude analyzer collects a digital estimate history at a sample frequency that is a binary multiple of the excitation frequency and determines an amplitude of the digital estimate substantially near the excitation frequency. With the amplitudes determined, the result calculator evaluates the amplitude for each of the first signal analyzer and second signal analyzer to generate the linear position.

Another embodiment of the present invention comprises a method for determining a linear position. The method comprises resolving an excitation signal at an excitation frequency into at least two correlated signals, converting the at least two correlated signals to a digital estimate for each of the correlated signals, and evaluating an amplitude of the digital estimate of the correlated signals to determine the linear position. The process of converting the correlated signals comprises comparing the correlated signal to an analog feedback signal to generate a comparison result and incrementally adjusting the digital estimate in response to sampling the comparison result at an estimation frequency. The converting process also includes converting the digital estimate to the analog feedback signal, collecting a digital estimate history at a sample frequency that is a binary multiple of the excitation frequency, and analyzing the digital estimate history to determine the amplitude of the digital estimate substantially near the excitation frequency.

Yet another embodiment, in accordance with the present invention comprises a method of determining a linear position. This method includes resolving an excitation signal at an excitation frequency into a first signal and a second signal, converting the first signal to a first digital estimate, converting the second signal to a second digital estimate, evaluating a first amplitude and a second amplitude to determine the linear position. Converting the first signal includes comparing the first signal to a first analog feedback signal to generate a first comparison result. Converting the first signal also includes incrementally adjusting the first digital estimate in response to sampling the first comparison result at an estimation frequency, converting the first digital estimate to the first analog feedback signal, and analyzing the first digital estimate to determine the first amplitude of the first signal substantially near the excitation frequency. Similarly, converting the second signal includes comparing the second signal to a second analog feedback signal to generate a second comparison result. Converting the second signal also includes incrementally adjusting the second digital estimate in response to sampling the second comparison result at the estimation frequency, converting the second digital estimate to the second analog feedback signal, and analyzing the second digital estimate to determine the second amplitude of the second signal substantially near the excitation frequency.

In the drawings, which illustrate what is currently considered to be the best mode for carrying out the invention:

The present invention reduces the complexity and number of analog devices needed to resolve linear position obtained from a linear variable differential transformer (LVDT).

In the following description, circuits and functions may be shown in block diagram form in order not to obscure the present invention in unnecessary detail. Conversely, specific circuit implementations shown and described are exemplary only and should not be construed as the only way to implement the present invention unless specified otherwise herein. Additionally, block definitions and partitioning of logic between various blocks is exemplary of a specific implementation. It will be readily apparent to one of ordinary skill in the art that the present invention may be practiced by numerous other partitioning solutions. For the most part, details concerning timing considerations and the like have been omitted where such details are not necessary to obtain a complete understanding of the present invention and are within the abilities of persons of ordinary skill in the relevant art.

In this description, some drawings may illustrate signals as a single signal for clarity of presentation and description. It will be understood by a person of ordinary skill in the art that the signal may represent a bus of signals, wherein the bus may have a variety of bit widths and the present invention may be implemented on any number of data signals including a single data signal. Furthermore, signals may be referred to as asserted and negated. Those of ordinary skill in the art will recognize that in most instances, the selection of asserted or negated may be arbitrary and the invention could be implemented with the opposite states for such signals.

**100**. The LVDT **100** includes an excitation input **110** attached to a primary coil **102** and at least two secondary coils **104** attached to modulation outputs (**120** and **130**). The LVDT also includes a ferrous core **115**, which moves linearly relative to the primary coil **102** and secondary coils **104**. Generally, the core may be attached to a linkage or other means for mechanical linking (not shown) to external parts (not shown). The primary coil **102** and secondary coils **104** include windings positioned such that when an electrical signal is induced in the primary coil **102** inductive coupling produces electrical signals in the secondary coils **104** windings. The secondary coils **104** may be positioned such that, the amount of inductive coupling to each secondary coils **104** may be different and dependent on the position of the core **115**. Thus, by measuring the voltages on the secondary coils **104** it is possible to determine the linear position of the core **115** and, as a result, the linear position of a linkage attached thereto. Throughout this description, the modulation outputs (**120** and **130**) may also be referred to as correlated signals (**120** and **130**) or as a first positional output **120** and a second positional output **130**.

By way of example, **112** that may be applied to the excitation input **110** coupled to the primary coil. In this example, the excitation signal **112** is a sinusoidal signal driven through the primary coil, which inductively induces modulated signals in the correlated outputs (**120** and **130**). **102** is moving at a substantially constant rate from one extreme to the other. A first signal **122** on the first positional output **120** includes a modulated amplitude that is modulated along an increasing envelope **106** having a substantially linear rate corresponding to the movement of the core **115**. Similarly, a second signal **132** on the second positional output includes a modulated amplitude that is modulated along a decreasing envelope **108** having a substantially linear rate corresponding to the movement of the core **115**. **2**C are simple examples illustrating general operation with a simple constant linear movement. Those of ordinary skill in the art will recognize that the envelopes (**106** and **108**) representing movement of the core **115** may be complex, and perhaps vibratory waveforms. As a result, the excitation frequency should be substantially higher than an expected rate of change of the core **115** displacement. For example, the excitation signal **112** may have an excitation frequency generally in the range of about 1 to 10 kHz, but the scope of the invention is not limited to this range.

**110** couples to the primary coil of the LVDT **100**. The secondary coils of the LVDT **100** are coupled to a first positional output **120** and a second positional output **130**. Each of the first positional output **120** and the second positional output **130** are coupled to a signal analyzer (**200**A and **200**B). Each signal analyzer (**200**A and **200**B) generates an amplitude (**290**A and **290**B) for its respective input signal.

A result calculator **300** receives the outputs from the signal analyzers (**200**A and (**200**B) to calculate the linear position **340**. The position of the core **115** may be determined by the difference between the two secondary windings divided by their sum. Thus, the result calculator **300** may comprise an arithmetic unit configured for calculating the equation (A−B)/(A+B) wherein A represents the amplitude **290**A from the first signal analyzer **200**A, B represents the amplitude **290**B from the second signal analyzer **200**B, and the calculation result represents the linear position **340**.

The result calculator also may comprises dedicated circuitry for calculating the linear position as illustrated in **290**B from the first amplitude **290**A. Similarly, an adder add the first amplitude **290**A and second amplitude **290**B. A divider **320** divides the result from the subtractor by the result from the adder to determine the linear position **340**. The final result is a digital representation of the linear position **340**. An optional filter **336** may be used to filter the linear position **340** with a conventional digital filtering algorithm to further reduce noise and generate a filtered linear position **350**.

**200**. The signal analyzer **200** is the same for both the first signal analyzer **200**A and the second signal analyzer **200**B. Thus, the first positional output **120** and the second positional output **130** couple to the input signal **205** of their respective signal analyzers (**200**A and **200**B). Similarly, the amplitude **290** output from the signal analyzer **200** couples to the corresponding amplitude output of the first signal analyzer **200**A and the second signal analyzer **200**B.

In the signal analyzer **200**, the input signal **205** couples to a digital converter **210**, which converts the analog input signal to a digital estimate **240**. The digital estimate **240** is used by an amplitude analyzer **400** to generate the amplitude of the input signal **205**.

The amplitude analyzer **400** repeatedly samples the digital estimate **240** using the sample clock **405** to create a digital estimate history, which may be used to convert the time varying digital estimate **240** from the time domain to the frequency domain. The outputs of the amplitude analyzer **400** is a digital signal indicating the amplitude **290** of the modulated signal substantially near the excitation frequency. In other words, the output of the first amplitude analyzer is a digital value indicating the amplitude **290**A of the first positional output **120** substantially near the excitation frequency and the output of the second amplitude analyzer is a digital value indicating the amplitude **290**B of the second positional output **130** substantially near the excitation frequency. The amplitude analyzer **400** is explained more fully below.

A digital converter **210** is used to provide a continuously available estimate of the input signal **205** accurate to within one bit. A continuously available estimate may be advantageous in that it does not have the sample and hold characteristics of many conventional analog-to-digital converters and may not need to be synchronized to other clocks within the system.

Details of a representative embodiment of the digital converter **210** are illustrated in **210**, the input signal **205** couples to a simple fast analog comparator **220**. The other input of the analog comparator **220** is coupled to an analog feedback signal **260**. The comparison result **225** is a digital signal that may be asserted if the input signal **205** is larger than the analog feedback signal **260** and negated if the input signal **205** is smaller than the analog feedback signal **260**.

A digital estimator **230**, which is controlled by an estimation clock **215**, analyzes the comparison result **225** to update the digital estimate **240**. The update rate at which the estimation clock **215** runs is selected such that the estimate will always be able to track the input signal **205**. Thus, the estimation frequency may be a substantially higher frequency than the excitation frequency. For example, and not limitation, the estimation clock **215** may run at or above one Mhz for an excitation frequency of about 10 Khz.

The digital converter **210** is a feedback loop that begins by selecting a starting digital estimate **240** of the signal amplitude, which is stored in an estimate register **238**. The comparison result **225** is used by adjustment logic **232** to determine whether the digital estimate **240** should be improved by modifying the digital estimate **240** by an incremental adjustment amount. Thus, based on the comparison result **225**, the adjustment logic **232** may generate an adjustment signal **236** for incrementing, decrementing, or maintaining the digital estimate **240**. The resulting new digital estimate couples to a digital-to-analog converter **250**, which generates the analog feedback signal **260** for comparison in the comparator **220**. The feedback loop continues until the digital estimate **240** is an accurate representation of the input signal **205**. Then, as the input signal **205** changes, the digital converter **210** can easily track the changes through the adjustment logic **232** and feedback loop.

For many applications, this method may be unacceptably slow. However, the present invention takes advantage of the A Priori knowledge that the input signal will be substantially a sinusoidal wave of known frequency and limited, but varying, amplitude. The update rate (i.e., the estimation frequency) is selected such that the estimate will always be able to accurately track the input signal. As a result, this method is faster than other conversion methods, provides an estimate accurate to within one bit, and provides an estimate that is continuously available to other circuitry in the system.

The digital-to-analog converter **250** may be implemented in a variety of ways known to those of ordinary skill in the art. One representative embodiment of the digital-to-analog converter **250** that may be simple to implement is illustrated in **240** is used by a pulse-width modulator **252** (PWM), which converts the digital estimate **240** into a pulse-width modulated estimate **254**, which is a series of pulses with varying duty cycles corresponding to the digital estimate values. An analog filter **256** filters the pulse-width modulated estimate **254** to generate the analog feedback signal **260** to represent variations in the digital estimate **240**.

**254**. The width of the pulses (i.e., the duty cycle) is varied in proportion to the magnitude of the digital estimate to generate the pulse train with varying pulse widths. As a result, the pulse-width modulated estimate **254** includes a varying amount of energy, which corresponds to the high portion of the pulses. Therefore, the pulse-width modulated estimate **254** may be filtered by a simple low pass analog filter **256** to generate the analog feedback signal **260** (shown as signal plot **285** in

Returning to **110** may be configured as a sine wave with an excitation frequency. A simple excitation generator **500** may be used for generating the excitation input **110**, as illustrated in **510** creates a digital excitation signal **520** with values that vary at a generation frequency. The digital excitation signal **520** is used by a PWM **252**′, which converts the digital excitation signal **520** into a pulse-width modulated signal **530**. An analog filter **256**′ filters the pulse-width modulated signal **530** to generate the excitation input **110**.

The function of the amplitude generator **510** including the pulse-width modulator **252**′ and analog filter **256**′ is similar to what was described for the digital-to-analog converter **250** of **7**B. However, for the excitation generator **500** the amplitude generator **510** creates the desired signal. Thus, in **510** creates a digital excitation signal **520**, which is a time varying digital representation for emulating a sine wave. The amplitude generator **510** may be some type of arithmetic unit for calculating sine waves, or it may be a simple look-up table with the proper amplitudes for generating a sine wave.

Returning to **400** converts the time varying digital estimate **240** from the time domain to the frequency domain. Generally, converting a time domain signal to the frequency domain generates a function with amplitudes at a variety of frequencies. The output of the amplitude analyzer **400** is a digital signal indicating the amplitude **290** of the modulated signal substantially near the excitation frequency. A number of implementation for finding the amplitude **290** of the modulated signal substantially near the excitation frequency may be used, such as, for example, implementing a conventional Fast Fourier Transform (FFT). However, a simpler implementation may be used for the present invention because only the amplitude **290** at the excitation frequency is needed.

**400**. A sample clock **405** running at a sample frequency feeds a history shift register **420** configured to sample and shift values of the digital estimate **240**. Thus, the history shift register **420** generates a digital estimate history (**425**) N bits long.

The digital estimate history **425** is coupled to a set of summing units **430** in a butterfly pattern recognizable to those of ordinary skill in the art in performing a Discrete Fourier Transform (DFT), except that only the calculations necessary to determine the amplitude at the excitation frequency are performed. A first set of difference units **435** perform subtractions on the results from the first set of summing units. A set of multipliers **440** multiply the subtraction results from the first set of difference units by the appropriate constants for a DFT. A second set of difference units **445** perform subtractions on the results from the multipliers **440**. A third set of difference units **450** perform subtractions on the results from the second set of difference units **445**. A set of squaring units **455** square the absolute value of the results from the third set of difference units **450**. A summing unit **460** adds the results from the set of squaring units **455**, and a square root unit **465** calculates the square root of the result from the summing unit **460** to arrive at the final amplitude **290**.

The number of bits N in the digital estimate history **425** may be chosen to be a binary multiple. In the example of **16** to generate the digital estimate history **425** of signals td**0**-td**15**. In addition, the sample frequency of the sample clock **405** is chosen to correspond to the number of bits such that the sample frequency is a binary multiple of the excitation frequency. Thus, in the example of **425** comprises samples of one full cycle of the excitation frequency.

In operation, the implementation of

Those of ordinary skill in the art will recognize that embodiments of the amplitude analyzer **400** may encompass other bit widths and sample rates for the limited DFT. For example, and not limitation, the limited DFT may use a sample frequency that is of **2** ^{N }times the sample frequency wherein N may be in a range from 2 to 10. In addition, as stated earlier, the amplitude analyzer **400** also encompasses implementations that perform a full DFT or FFT to determine the amplitude of the digital estimate at the excitation frequency.

Although this invention has been described with reference to particular embodiments, the invention is not limited to these described embodiments. Rather, the invention is limited only by the appended claims, which include within their scope all equivalent devices or methods that operate according to the principles of the invention as described.

Referenced by

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US8278779 | Feb 7, 2011 | Oct 2, 2012 | General Electric Company | System and method for providing redundant power to a device |

US8558408 | Sep 29, 2010 | Oct 15, 2013 | General Electric Company | System and method for providing redundant power to a device |

US8712710 | May 13, 2011 | Apr 29, 2014 | Honeywell International Inc. | Method and apparatus for detection of LVDT core fallout condition |

Classifications

U.S. Classification | 702/158 |

International Classification | G01B7/14, G01B7/02, G01B21/02 |

Cooperative Classification | G01D5/2291 |

European Classification | G01D5/00 |

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