|Publication number||US20070179738 A1|
|Application number||US 11/341,738|
|Publication date||Aug 2, 2007|
|Filing date||Jan 27, 2006|
|Priority date||Jan 27, 2006|
|Also published as||US7248994|
|Publication number||11341738, 341738, US 2007/0179738 A1, US 2007/179738 A1, US 20070179738 A1, US 20070179738A1, US 2007179738 A1, US 2007179738A1, US-A1-20070179738, US-A1-2007179738, US2007/0179738A1, US2007/179738A1, US20070179738 A1, US20070179738A1, US2007179738 A1, US2007179738A1|
|Original Assignee||Stolan John A|
|Export Citation||BiBTeX, EndNote, RefMan|
|Referenced by (3), Classifications (6), Legal Events (8)|
|External Links: USPTO, USPTO Assignment, Espacenet|
The present application is related to concurrently filed U. S. patent application Ser. No. (2507-7532US) (22154-US) and entitled DIGITAL METHOD AND APPARATUS FOR RESOLVING SHAFT POSITION.
1. Field of the Invention
This invention relates generally to determining linear position and, more particularly, to using digital means for determining linear position.
2. Description of Related Art
This invention relates to determining linear position by using the electrical outputs of a a Linear Variable Differential Transformer (LVDT). It may be desireable to determine a linear position for many applications. For example, actuation systems on aircraft or rocket motors. One method of doing this is to use a LVDT to sense the position. The LVDT may use a sinusoidal excitation and measurement of two inductively coupled output signals. LVDTs have one primary winding and two secondary windings. The two secondary windings are mechanically arranged so an excitation signal on the primary winding will proportionally couple onto the secondary windings based on the position of a ferrous core. By measuring the voltages on the secondary windings it is possible to determine the linear position of the LVDT.
These output signals from the two secondary windings are generally analog signals, which may require a significant amount of analog electronics to evaluate the signal amplitudes and derive the shaft position. As a result, many proposals use analog-to-digital converters to convert the analog signals to digital signals, which may then be manipulated digitally to determine the respective amplitudes and calculate arithmetic functions to determine the shaft position. However, even these solutions may require complex analog-to-digital converters, and complex arithmetic engines for determining the signal amplitudes.
There is a need for a method and apparatus that reduces the complexity and number of analog components used in determining linear position by using simple analog components coupled to flexible digital logic and digital signal processing.
The present invention reduces the complexity and number of analog devices needed to resolve linear position.
An embodiment of the present invention comprises an apparatus for determining a linear position of a LVDT. The apparatus includes a first signal analyzer, a second signal analyzer, and a result calculator. The LVDT includes an excitation input coupled to an excitation signal with an excitation frequency, a first positional output coupled to an analog input of the first signal analyzer, and a second positional output coupled to an analog input of the second signal analyzer. Each of the first signal analyzer and the second signal analyzer includes a comparator, a digital estimator, a digital-to-analog converter, and an amplitude analyzer. The comparator is configured for comparing the analog input to an analog feedback signal and generating a comparison result. The digital estimator uses the comparison result to modify a digital estimate by an incremental adjustment amount at an estimation frequency in response to the comparison result. The digital estimate is converted to the analog feedback signal by the digital-to-analog converter. The amplitude analyzer collects a digital estimate history at a sample frequency that is a binary multiple of the excitation frequency and determines an amplitude of the digital estimate substantially near the excitation frequency. With the amplitudes determined, the result calculator evaluates the amplitude for each of the first signal analyzer and second signal analyzer to generate the linear position.
Another embodiment of the present invention comprises a method for determining a linear position. The method comprises resolving an excitation signal at an excitation frequency into at least two correlated signals, converting the at least two correlated signals to a digital estimate for each of the correlated signals, and evaluating an amplitude of the digital estimate of the correlated signals to determine the linear position. The process of converting the correlated signals comprises comparing the correlated signal to an analog feedback signal to generate a comparison result and incrementally adjusting the digital estimate in response to sampling the comparison result at an estimation frequency. The converting process also includes converting the digital estimate to the analog feedback signal, collecting a digital estimate history at a sample frequency that is a binary multiple of the excitation frequency, and analyzing the digital estimate history to determine the amplitude of the digital estimate substantially near the excitation frequency.
Yet another embodiment, in accordance with the present invention comprises a method of determining a linear position. This method includes resolving an excitation signal at an excitation frequency into a first signal and a second signal, converting the first signal to a first digital estimate, converting the second signal to a second digital estimate, evaluating a first amplitude and a second amplitude to determine the linear position. Converting the first signal includes comparing the first signal to a first analog feedback signal to generate a first comparison result. Converting the first signal also includes incrementally adjusting the first digital estimate in response to sampling the first comparison result at an estimation frequency, converting the first digital estimate to the first analog feedback signal, and analyzing the first digital estimate to determine the first amplitude of the first signal substantially near the excitation frequency. Similarly, converting the second signal includes comparing the second signal to a second analog feedback signal to generate a second comparison result. Converting the second signal also includes incrementally adjusting the second digital estimate in response to sampling the second comparison result at the estimation frequency, converting the second digital estimate to the second analog feedback signal, and analyzing the second digital estimate to determine the second amplitude of the second signal substantially near the excitation frequency.
In the drawings, which illustrate what is currently considered to be the best mode for carrying out the invention:
The present invention reduces the complexity and number of analog devices needed to resolve linear position obtained from a linear variable differential transformer (LVDT).
In the following description, circuits and functions may be shown in block diagram form in order not to obscure the present invention in unnecessary detail. Conversely, specific circuit implementations shown and described are exemplary only and should not be construed as the only way to implement the present invention unless specified otherwise herein. Additionally, block definitions and partitioning of logic between various blocks is exemplary of a specific implementation. It will be readily apparent to one of ordinary skill in the art that the present invention may be practiced by numerous other partitioning solutions. For the most part, details concerning timing considerations and the like have been omitted where such details are not necessary to obtain a complete understanding of the present invention and are within the abilities of persons of ordinary skill in the relevant art.
In this description, some drawings may illustrate signals as a single signal for clarity of presentation and description. It will be understood by a person of ordinary skill in the art that the signal may represent a bus of signals, wherein the bus may have a variety of bit widths and the present invention may be implemented on any number of data signals including a single data signal. Furthermore, signals may be referred to as asserted and negated. Those of ordinary skill in the art will recognize that in most instances, the selection of asserted or negated may be arbitrary and the invention could be implemented with the opposite states for such signals.
By way of example,
A result calculator 300 receives the outputs from the signal analyzers (200A and (200B) to calculate the linear position 340. The position of the core 115 may be determined by the difference between the two secondary windings divided by their sum. Thus, the result calculator 300 may comprise an arithmetic unit configured for calculating the equation (A−B)/(A+B) wherein A represents the amplitude 290A from the first signal analyzer 200A, B represents the amplitude 290B from the second signal analyzer 200B, and the calculation result represents the linear position 340.
The result calculator also may comprises dedicated circuitry for calculating the linear position as illustrated in
In the signal analyzer 200, the input signal 205 couples to a digital converter 210, which converts the analog input signal to a digital estimate 240. The digital estimate 240 is used by an amplitude analyzer 400 to generate the amplitude of the input signal 205.
The amplitude analyzer 400 repeatedly samples the digital estimate 240 using the sample clock 405 to create a digital estimate history, which may be used to convert the time varying digital estimate 240 from the time domain to the frequency domain. The outputs of the amplitude analyzer 400 is a digital signal indicating the amplitude 290 of the modulated signal substantially near the excitation frequency. In other words, the output of the first amplitude analyzer is a digital value indicating the amplitude 290A of the first positional output 120 substantially near the excitation frequency and the output of the second amplitude analyzer is a digital value indicating the amplitude 290B of the second positional output 130 substantially near the excitation frequency. The amplitude analyzer 400 is explained more fully below.
A digital converter 210 is used to provide a continuously available estimate of the input signal 205 accurate to within one bit. A continuously available estimate may be advantageous in that it does not have the sample and hold characteristics of many conventional analog-to-digital converters and may not need to be synchronized to other clocks within the system.
Details of a representative embodiment of the digital converter 210 are illustrated in
A digital estimator 230, which is controlled by an estimation clock 215, analyzes the comparison result 225 to update the digital estimate 240. The update rate at which the estimation clock 215 runs is selected such that the estimate will always be able to track the input signal 205. Thus, the estimation frequency may be a substantially higher frequency than the excitation frequency. For example, and not limitation, the estimation clock 215 may run at or above one Mhz for an excitation frequency of about 10 Khz.
The digital converter 210 is a feedback loop that begins by selecting a starting digital estimate 240 of the signal amplitude, which is stored in an estimate register 238. The comparison result 225 is used by adjustment logic 232 to determine whether the digital estimate 240 should be improved by modifying the digital estimate 240 by an incremental adjustment amount. Thus, based on the comparison result 225, the adjustment logic 232 may generate an adjustment signal 236 for incrementing, decrementing, or maintaining the digital estimate 240. The resulting new digital estimate couples to a digital-to-analog converter 250, which generates the analog feedback signal 260 for comparison in the comparator 220. The feedback loop continues until the digital estimate 240 is an accurate representation of the input signal 205. Then, as the input signal 205 changes, the digital converter 210 can easily track the changes through the adjustment logic 232 and feedback loop.
For many applications, this method may be unacceptably slow. However, the present invention takes advantage of the A Priori knowledge that the input signal will be substantially a sinusoidal wave of known frequency and limited, but varying, amplitude. The update rate (i.e., the estimation frequency) is selected such that the estimate will always be able to accurately track the input signal. As a result, this method is faster than other conversion methods, provides an estimate accurate to within one bit, and provides an estimate that is continuously available to other circuitry in the system.
The digital-to-analog converter 250 may be implemented in a variety of ways known to those of ordinary skill in the art. One representative embodiment of the digital-to-analog converter 250 that may be simple to implement is illustrated in
The function of the amplitude generator 510 including the pulse-width modulator 252′ and analog filter 256′ is similar to what was described for the digital-to-analog converter 250 of
The digital estimate history 425 is coupled to a set of summing units 430 in a butterfly pattern recognizable to those of ordinary skill in the art in performing a Discrete Fourier Transform (DFT), except that only the calculations necessary to determine the amplitude at the excitation frequency are performed. A first set of difference units 435 perform subtractions on the results from the first set of summing units. A set of multipliers 440 multiply the subtraction results from the first set of difference units by the appropriate constants for a DFT. A second set of difference units 445 perform subtractions on the results from the multipliers 440. A third set of difference units 450 perform subtractions on the results from the second set of difference units 445. A set of squaring units 455 square the absolute value of the results from the third set of difference units 450. A summing unit 460 adds the results from the set of squaring units 455, and a square root unit 465 calculates the square root of the result from the summing unit 460 to arrive at the final amplitude 290.
The number of bits N in the digital estimate history 425 may be chosen to be a binary multiple. In the example of
In operation, the implementation of
Those of ordinary skill in the art will recognize that embodiments of the amplitude analyzer 400 may encompass other bit widths and sample rates for the limited DFT. For example, and not limitation, the limited DFT may use a sample frequency that is of 2 N times the sample frequency wherein N may be in a range from 2 to 10. In addition, as stated earlier, the amplitude analyzer 400 also encompasses implementations that perform a full DFT or FFT to determine the amplitude of the digital estimate at the excitation frequency.
Although this invention has been described with reference to particular embodiments, the invention is not limited to these described embodiments. Rather, the invention is limited only by the appended claims, which include within their scope all equivalent devices or methods that operate according to the principles of the invention as described.
|Citing Patent||Filing date||Publication date||Applicant||Title|
|US8278779||Feb 7, 2011||Oct 2, 2012||General Electric Company||System and method for providing redundant power to a device|
|US8558408||Sep 29, 2010||Oct 15, 2013||General Electric Company||System and method for providing redundant power to a device|
|US8712710||May 13, 2011||Apr 29, 2014||Honeywell International Inc.||Method and apparatus for detection of LVDT core fallout condition|
|International Classification||G01B7/14, G01B7/02, G01B21/02|
|Jan 27, 2006||AS||Assignment|
Owner name: ALLIANT TECHSYSTEMS INC., UTAH
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:STOLAN, JOHN A.;REEL/FRAME:017518/0699
Effective date: 20060125
|Aug 11, 2006||AS||Assignment|
Owner name: ALLIANT TECHSYSTEMS INC., MINNESOTA
Free format text: CORRECTIVE ASSIGNMENT TO CORRECT THE ADDRESS OF THE ASSIGNEE INDICATED INCORRECTLY ON THE RECORDATION FORM COVER SHEET PREVIOUSLY RECORDED ON REEL 017518 FRAME 0699;ASSIGNOR:STOLAN, JOHN A.;REEL/FRAME:018096/0178
Effective date: 20060125
|Aug 24, 2007||AS||Assignment|
Owner name: BANK OF AMERICA, N.A.,NORTH CAROLINA
Free format text: SECURITY AGREEMENT;ASSIGNORS:AMMUNITION ACCESSORIES INC.;ATK COMMERCIAL AMMUNITION COMPANY INC.;ATKCOMMERCIAL AMMUNITION HOLDINGS COMPANY INC.;AND OTHERS;REEL/FRAME:019733/0757
Effective date: 20070329
|Nov 4, 2010||AS||Assignment|
Owner name: BANK OF AMERICA, N.A., CALIFORNIA
Free format text: SECURITY AGREEMENT;ASSIGNORS:ALLIANT TECHSYSTEMS INC.;AMMUNITION ACCESSORIES INC.;ATK COMMERCIAL AMMUNITION COMPANY INC.;AND OTHERS;REEL/FRAME:025321/0291
Effective date: 20101007
|Jan 24, 2011||FPAY||Fee payment|
Year of fee payment: 4
|Nov 26, 2013||AS||Assignment|
Owner name: BANK OF AMERICA, N.A., CALIFORNIA
Free format text: SECURITY AGREEMENT;ASSIGNORS:ALLIANT TECHSYSTEMS INC.;CALIBER COMPANY;EAGLE INDUSTRIES UNLIMITED, INC.;AND OTHERS;REEL/FRAME:031731/0281
Effective date: 20131101
|Jan 26, 2015||FPAY||Fee payment|
Year of fee payment: 8
|May 22, 2015||AS||Assignment|
Owner name: ORBITAL ATK, INC., VIRGINIA
Free format text: CHANGE OF NAME;ASSIGNOR:ALLIANT TECHSYSTEMS INC.;REEL/FRAME:035753/0373
Effective date: 20150209