|Publication number||US20070198899 A1|
|Application number||US 11/673,380|
|Publication date||Aug 23, 2007|
|Filing date||Feb 9, 2007|
|Priority date||Jun 12, 2001|
|Also published as||CN1515079A, CN100389540C, US7240274, US7243295, US20020194567, US20040199856, WO2002101936A2, WO2002101936A3|
|Publication number||11673380, 673380, US 2007/0198899 A1, US 2007/198899 A1, US 20070198899 A1, US 20070198899A1, US 2007198899 A1, US 2007198899A1, US-A1-20070198899, US-A1-2007198899, US2007/0198899A1, US2007/198899A1, US20070198899 A1, US20070198899A1, US2007198899 A1, US2007198899A1|
|Inventors||Daniel Yellin, Doron Rainish|
|Original Assignee||Intel Corporation|
|Export Citation||BiBTeX, EndNote, RefMan|
|Referenced by (16), Classifications (20), Legal Events (1)|
|External Links: USPTO, USPTO Assignment, Espacenet|
This invention relates to channel decoders.
In many of today's advanced communication systems, channel coding is a key ingredient. The transmitter partition's the data stream into blocks of bits (packets) that are encoded to introduce redundancy information into the transmitted block. The encoded data block is modulated and transmitted through the communication link (channel) connecting the transmitter to the receiver, and a channel-corrupted version of the transmitted data block is received at the receiver-end. After down-conversion and demodulation, the channel decoder at the receiver uses the redundancy introduced by the encoder to recover the transmitted information more reliably.
In general, channel decoders are often categorized by the combination of input/output values they accept or provide. For example, a hard-input hard-output (HIHO) decoder accepts a stream of bits (binary values) as input and provides a stream of binary bits at its output that represent the estimated transmitted bit sequence. Soft-input hard-output (SIHO) decoders accept as input real-valued levels called soft symbols or soft bits that represent the reliability of the bit value. A SIHO decoder produces a stream of binary bits at its output that represents the estimated transmitted bit sequence.
Turbo codes are a special case of channel coding that can operate very close to the theoretical limits of channel capacity and, therefore, are close to optimal. See, for example, C. Berrou et al., Near Optimum Error Correcting Coding and Decoding: Turbo Codes, 44 IEEE Transaction on Communications 1261 (1996), which addresses parallel concatenated turbo codes and their associated encoders and decoders. Serial concatenated turbo codes are addressed, for example, in S. Benedetto et al., “Serial Concatenation of Interleaved Codes: Performance Analysis, Design and Iterative Decoding,” IEEE Transaction on Information Theory, vol. 44, No. 3, pp. 909-926, May 1998.
Turbo codes typically use another type of decoder, known as soft-input soft-output (SISO) decoder, that not only accepts soft inputs, but also provides soft-output. Thus, in SISO decoders, the reliability of the estimated bits, as well as the estimated bits, is provided. Some SISO decoders use the Bahl, Cocke, Jeinek and Raviv (BCJR) algorithm or the soft-output Viterbi algorithm (SOVA). See L. R. Bahl et al., Optimal Decoding of Linear Codes for Minimizing Symbol Error Rate, IT-20 IEEE Trans. Inform. Theory 248 (1974); G. D. Forney, The Viterbi Algorithm, 61 Proc. IEEE 268 (1973).
As shown in
As shown in
As illustrated in
An alternative LUT pre-configuration criterion can be the overall probability of error of the decoder that utilizes the LUT. In that case, the entries of the table are chosen to minimize the overall error probability of the resulting decoder.
The parameters N, K1 and K2 are user-defined parameters that may depend on the coding scheme, signal-to-noise ratio (SNR), anticipated channel conditions, and on the value of M.
As shown by
To reduce the number of entries in the table, joint quantization of several symbols can be performed, thereby allowing the decoder 220 to operate on soft multi-symbols requiring fewer bits. This can significantly reduce the number of bits required at the input to the LUT 19 and, therefore, significantly reduce the number of its entries. When implemented for turbo decoders, this also can reduce the overall memory requirements of the decoder because joint quantization of multiple symbols is more economical in terms of storage requirements than individual single-symbol scalar quantization of each symbol (bit).
The soft outputs of the SISO decoder 317 are passed through a summer 321 where the soft inputs are subtracted to generate extrinsic information. The extrinsic information is decompressed into the single-symbol (bit) level by a decompressor 323 and interleaved by the interleaver 325.
Next, the soft symbols are re-compressed by a compressor 327 that functions in a similar manner as the first compressor 315. The compressed symbols are processed by a second SISO decoder block 329 that also can use a LUT 331 to decode the symbols. The SISO block 329 and its LUT 331 can be identical to or substantially the same as the first SISO block 317 and LUT 319. The resulting soft symbols are used to generate extrinsic information at the output of another summer 333. The extrinsic information is decompressed to the bit level by decompressor 335 and de-interleaved by de-interleaver 337. The decompressor 335 may be identical to or substantially the same as decompressor 323.
The process continues in an iterative manner for a predetermined number of iterations of the decoding process, or until some other termination criterion is reached. A slicer 339 then converts the soft symbols to bits to provide the estimated transmitted information sequence â1, â2, . . . , âM.
As explained above, to reduce the number of entries in the tables 319, 331, joint quantization of P symbols can be performed to allow the decoder to operate on soft multi-symbols that require fewer bits to represent each multi-symbol compared to the P*K1 that may be required in the scalar single-symbol quantizer approach. This can significantly reduce the number of bits required at the input to the look-up tables 319, 331 and can significantly reduce the number of the entries in the tables. In the context of turbo decoding, it also can reduce the storage requirements because fewer than M*k1 bits are required to represent each block of M soft symbols. For a rate ⅓ turbo code, at least three such blocks would be stored.
As shown in
The compressors 315 and 327 can be identical to or substantially the same as the joint quantizer 351, and the decompressors 323 and 335 can implement the inverse operation.
As shown in
The decompressors 323 and 335 can be identical to or substantially similar to the pre-configured multi-symbol decompressor 353.
The foregoing techniques using look-up tables to implement the SISO block(s) can be used for other channel decoders, for example, for serially concatenated turbo decoders or for other non-turbo channel decoders. The techniques can be used for SIHO, HIHO and HISO decoders.
Using a look-up table that approximates output of the algorithmic decoding process can help reduce the cost and complexity of channel decoders.
Similarly, the joint quantization approach with compress/decompress stages can be performed without the SISO being replaced by look-up tables, for example, to reduce memory requirements in turbo codes.
Although the techniques have been described above in the context of processing turbo codes, a look-up table can be used to replace a conventional SISO decoder in other contexts as well, such as the BCJR algorithm and the soft-output Viterbi algorithm (SOVA). Soft-input hard-output (SIHO) decoders such as those used in the Viterbi algorithm also can be implemented with this approach, as well as hard-input hard-output (HIHO) decoders. In addition, partial implementation of any of these decoders using a LUT also can be used. For example, the forward iteration of the BCJR algorithm can be implemented in a conventional manner while the backward iteration may be implemented with a LUT.
Various features of the system can be implemented in hardware, software, or a combination of hardware and software. For example, some features of the system can be implemented in computer programs executing on programmable computers. Each program can be implemented in a high level-procedural or object-oriented programming language to communicate with a computer system. Furthermore, each such computer program can be stored on a storage medium, such as read-only-memory (ROM) readable by a general or special purpose programmable computer or processor, for configuring and operating the computer when the storage medium is read by the computer to perform the function described above.
Other implementations are within the scope of the following claims.
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|International Classification||H03M13/27, H03M13/45, H03M13/29, H03M13/23, H03M13/00|
|Cooperative Classification||H03M13/299, H03M13/6588, H03M13/6505, H03M13/2957, H03M13/3905, H03M13/6502, H03M13/6577|
|European Classification||H03M13/65V3, H03M13/65V, H03M13/65D1, H03M13/39A, H03M13/65D, H03M13/29T, H03M13/29T5|
|Mar 1, 2007||AS||Assignment|
Owner name: INTEL CORPORATION, CALIFORNIA
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:YELLIN, DANIEL;RAINISH, DORON;REEL/FRAME:018958/0429;SIGNING DATES FROM 20010909 TO 20010916
Owner name: INTEL CORPORATION, CALIFORNIA
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:YELLIN, DANIEL;RAINISH, DORON;REEL/FRAME:018958/0561;SIGNING DATES FROM 20010909 TO 20010916
Owner name: INTEL CORPORATION, CALIFORNIA
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:YELLIN, DANIEL;RAINISH, DORON;REEL/FRAME:018958/0574;SIGNING DATES FROM 20010909 TO 20010916