|Publication number||US20080050883 A1|
|Application number||US 11/467,480|
|Publication date||Feb 28, 2008|
|Filing date||Aug 25, 2006|
|Priority date||Aug 25, 2006|
|Also published as||WO2008024587A2, WO2008024587A3|
|Publication number||11467480, 467480, US 2008/0050883 A1, US 2008/050883 A1, US 20080050883 A1, US 20080050883A1, US 2008050883 A1, US 2008050883A1, US-A1-20080050883, US-A1-2008050883, US2008/0050883A1, US2008/050883A1, US20080050883 A1, US20080050883A1, US2008050883 A1, US2008050883A1|
|Inventors||Darwin G. Enicks|
|Original Assignee||Atmel Corporation|
|Export Citation||BiBTeX, EndNote, RefMan|
|Referenced by (16), Classifications (18), Legal Events (1)|
|External Links: USPTO, USPTO Assignment, Espacenet|
The invention generally relates to methods of fabrication of integrated circuits (ICs). More specifically, the invention is a method of fabricating multi-layer heterojunction bipolar transistors utilizing compound semiconducting materials.
Fabrication of conventional heterojunction bipolar transistors (HBT) involves using individual layers of homogeneous materials. An example is a modern silicon-germanium heterojunction bipolar transistor (SiGe HBT). The emitter of a SiGe HBT is typically constructed of silicon with either an n-type or p-type polarity, the base region is constructed of SiGe with either n- or p-type polarity, and the collector is made of either p- or n-type silicon.
Using SiGe in the base region improves device performance in several ways: (1) The SiGe provides an energy band offset at the base-emitter, BE, junction for enhanced electron injection resulting in higher collector current densities, JC. (2) Base resistance, rB, is reduced due to enhanced hole carrier mobility (for an npn HBT with boron dopant in the base). (3) Dopant diffusion is minimized in SiGe resulting in a nanometer scale neutral base width (i.e., less than 100 nm); the nanometer scale base width makes possible a greatly reduced transit time, τb (these factors are especially prominent when boron is the dopant material). (4) Ge can be graded to provide a built-in drift field to enhance carrier velocity and further reduce τb. (5) Ge can also be graded into the collector region to increase the base-collector breakdown voltage, BVCB0, which also increases the collector-emitter breakdown, BVCE0.
These enhancements equate to improved performance with regard to important figures of merit such as unity gain cutoff frequency, fT, max oscillation frequency, fmax, minimum noise figure, NFmin, and current gain, β. Additionally, device efficiency is enhanced resulting in reduced power consumption.
HBT technology overall is advancing rapidly. The technology evolution with respect to fT and fmax is illustrated with reference to
wherein CCB is collector-base capacitance and, as described above, rB is device base resistance.
As Wb becomes thin, the total dose of dopant that can be added to the lattice space is reduced. The lower doses of dopant not only result in an elevated rB, but also in very high current gains, β. Current gain is a simple ratio between collector current, IC, and the base current, IB:
IC by itself is a function of many factors. However, assuming all other factors are held constant, IC is inversely proportional to both Wb and the total concentration of base dopant, Nab. The product of Wb and Nab gives the approximate dose of dopant in the base region (assuming a continuously doped base region).
One skilled in the art will recognize that secondary ion mass spectrometry (SIMS) may quantify the elemental concentration of dopant and that dose can also be estimated by integrating the total concentration as a function of profile depth.
Collector current density, JC (units of amps/μm2), is inversely proportional to Dose (defined immediately above) as defined in the denominator of the first term:
and IC may be related to the collector current density by:
where AE is the emitter area (μm2).
Based on the relationship of β defined as the ratio of collector to base current, the base current is directly proportional to Nab added to the base region, and also to Wb. Consequently, a lower dose and/or reduced Wb equates to a reduction in IB. Maintaining very narrow boron doped region in the SiGe HBT, which defines Wb, is made possible due to the reduced rate of boron diffusion. As a result of the foregoing relationships, an increase in IC and reduction in IB equates to a significant increase in β.
High current gains are generally beneficial. However, if too high, the elevated current gain results in substantial reductions in collector-emitter breakdown voltage, BVCE0. BVCE0 is related to the nth root of β and also to the collector-base breakdown voltage, BVCB0.
Therefore, what is needed is a method which allows advances with respect to fT, but that allows a simultaneous reduction in rB, an increase in fmax and ultimately an increased fmax/fT ratio. This technology should provide extra degrees of freedom for the device designer to tune fT/fmax, β, rB, BVCE0, IC, and IB. The technology should also utilize a standard semiconductor manufacturing equipment installed base for optimum manufacturability.
In one exemplary embodiment, the present invention is a method for fabricating an electronic device where the method includes providing a semiconductor substrate having a first surface, doping at least a portion of the first surface, and forming a first compound semiconductor film over the first surface of the substrate. The first compound semiconductor film is doped with a first dopant type and a second compound semiconductor film is formed over the first compound semiconductor film. A third compound semiconductor film is formed over the second compound semiconductor film and the third compound semiconductor film being doped with a second dopant type. In various other embodiments, additional compound semiconductor film layers are added, in selected ways, to the basic film stack described. The compound semiconductor film layers may be comprised of SiGe with varying levels of germanium and various combinations of doped and undoped (i.e., substantially intrinsic) compound semiconductor film layers.
In another exemplary embodiment, the present invention is a method of fabricating a heterojunction bipolar transistor where the method includes forming a collector region in a substrate, the substrate being selected to have at least an uppermost portion comprised of an elemental semiconductor. The elemental semiconductor may be silicon. A multi-layer base region is formed over the collector region. Formation of the multi-layer base region includes forming a doped first silicon-germanium film over the first surface of the substrate and forming a second silicon-germanium film over the first silicon-germanium film. The second silicon-germanium film is selected to have a high concentration of germanium. A doped third silicon-germanium film is formed over the second silicon-germanium film and an elemental semiconductor layer is chosen to act as an emitter and is formed over the third silicon-germanium film. In various other embodiments, additional compound semiconductor film layers, such as additional SiGe layers, are added, in selected ways, to the basic film stack described. The SiGe layers may be formed with varying levels of germanium and various combinations of doped and undoped (i.e., substantially intrinsic) SiGe layers.
In another exemplary embodiment, the present invention is an electronic device which includes a substrate having at least an upper portion being comprised of a semiconductor material. The substrate may be, for example, a silicon wafer, an SOI wafer, or other semiconductor wafer. The substrate may also be comprised of various materials such as a quartz reticle with a polysilicon layer deposited and annealed to re-crystallize the polysilicon to single-crystal silicon. Over the substrate, a first doped compound semiconductor film is disposed with a second compound semiconductor film disposed over the first compound semiconductor film. The second compound semiconductor film is configured to act as a quantum well layer. A third doped compound semiconductor film is disposed over the second compound semiconductor film and a cap layer comprised of a semiconductor material is disposed over the third doped compound semiconductor film. In various other embodiments, additional compound semiconductor film layers, such as additional SiGe layers, are added to the basic film stack described. The SiGe layers may be formed with varying levels of germanium, in various profiles of germanium, and with added various combinations of doped and undoped (i.e., substantially intrinsic) SiGe layers.
In another exemplary embodiment, the present invention is a heterojunction bipolar transistor which includes a collector layer made substantially of an elemental semiconductor and contained in at least an upper portion of a substrate. The substrate may be, for example, a silicon wafer, and SOI wafer, or other semiconductor wafer. The substrate may also be comprised of various materials such as a quartz reticle with a polysilicon layer deposited and annealed to re-crystallize the polysilicon to single-crystal silicon. Over the substrate, an emitter layer made substantially of an elemental semiconductor is disposed. A multi-layer base is disposed over the emitter layer. The multi-layer base is comprised substantially a first doped silicon-germanium layer and a second silicon-germanium layer disposed over the first silicon-germanium layer. The second silicon-germanium layer is configured to act as a quantum well layer and a third doped silicon-germanium layer disposed over the second silicon-germanium layer. In various other embodiments, additional SiGe layers are added to the basic film stack described. The SiGe layers may be formed with varying levels of germanium, in various profiles of germanium, and with added various combinations of doped and undoped (i.e., substantially intrinsic) SiGe layers. The various SiGe layers allow tuning parameters of the device for specific performance characteristics.
Critical shortcomings in the prior art exist that must be overcome to realize further benefits of the advantages of SiGe HBTs. The following disclosure relates specifically to an npn-type SiGe HBT, but the principles involved also relates to pnp-type SiGe HBTs as well as HBTs made with other compound semiconductor materials (e.g., other Group III-V or II-VI materials). Additionally, technology and methods disclosed herein benefits other devices types such as, for example, metal oxide semiconductor field effect transistors (MOSFETs), high electron mobility transistors (HEMTs), high hole mobility transistors (HHMTs), bipolar junction transistors (BJTs), and FINFETs.
The periodic multi-layer (ML) and/or superlattice (SL) have been known for other applications for some time. However, the use of an ML in the base of a SiGe HBT represents a new utilization of this technology. The SL is a special case of an ML, in which layers that are chemically different from adjacent neighbors are successively repeated. Therefore, an SL is a periodic ML. The use of the ML in electronic and photonic devices is important since it enables strategic engineering of the energy band gap and carrier mobilities.
A second SiGe layer 209 is boron doped and a third SiGe layer 211 is similar to the first SiGe layer 207 in that the third SiGe layer 211 has neither a carbon nor a boron doping. The third SiGe layer 211 provides for a second 2DHG transport region. A second SiGeC layer 213 is similar to the first SiGeC layer 205 in that the second SiGeC layer 213 has no boron doping. A silicon cap layer 215 completes the exemplary periodic ML structure 200. The exemplary periodic ML structure 200 thus provides a film stack in which undoped SiGe is alternated with SiGeB and SiGeC.
Undoped SiGe layers have a higher intrinsic carrier mobility than either a SiGeB or SiGeC layer due to less alloy and lattice scattering from the addition of boron or carbon.
σ=e(μe n+μ h p)
where electron and hole mobilities are μe and μh respectively, n and p are electron and hole concentrations due to ionized donor (ND) and acceptor ion (NA) concentrations respectively, and the carrier charge, e, is 1.6×10−19 Coulomb. The resistivity (ρ=σ−1) with NA>>ND may be calculated with μe and n neglected. Therefore, for a given thickness of SiGe film tSiGe, a four point probe sheet resistance measurement (Rs in units of Ω/□) of a p-type or boron (B) doped film is:
There are a number of advantageous film structures that can be produced with ML and/or SL (hereinafter, “ML and/or SL” are simply be referred to as “ML” unless otherwise noted). For example,
The first band gap energy diagram in each of the
The second band gap energy diagram in each of the
Energy band definitions employed herein are considered for ideal theoretical calculations and may vary in practical ML structures. Any energy band gap is also dopant dependent. Therefore, some layers that might be labeled as not having any polarity altering dopants have a slightly different band gap if doped with either a Group III or V semiconductor due to degenerate doping effects (very high doping). However, principles discussed and illustrated, which involve 2-dimensional hole gas (2DHG) and quantum well formation (QW) for the enhancement of the ML conductivity, do not change. Thus, the following definitions are employed with reference to
EG3 is the energy band gap of SiGe doped with boron. The energy band gap is dependent on percentages of both Ge and boron.
The minimum energy band gap of silicon is 1.11 eV, while the minimum band gap of germanium is 0.67 eV. The lattice parameter differences (i.e., differences in unit cell side length) between Si and Ge are 5.43 Å and 5.67 Å respectively. Therefore, a blend of Ge with Si results in a film with an EG and lattice parameter somewhere in-between the pure constituents.
With reference to
The exemplary SiGe ML film stack 600 is shown turned sidewise to indicate a relative band gap for each of the layers. The exemplary SiGe ML film stack 600 is unbiased (e.g., no potential is applied). The first energy band gap diagram 651 indicates energy bands prior to Fermi level alignment. The second energy band gap diagram 653 indicates energy bands after Fermi level alignment. The second SiGe layer 609 with high Ge content and neither boron nor carbon doping is the 2DHG layer and aligns with the EG4 energy level which is the location of the quantum well (QW).
The exemplary SiGe ML film stack 700 is shown turned sidewise to indicate a relative band gap for each of the layers. The exemplary SiGe ML film stack 700 is unbiased (e.g., no potential is applied). The first energy band gap diagram 751 indicates energy bands prior to Fermi level alignment. The second energy band gap diagram 753 indicates energy bands after Fermi level alignment. The first 707 and third 711 SiGe layers with high Ge content and neither boron nor carbon doping are the two 2DHG layers. Each of the two 2DHG layers aligns with EG4 energy levels which are locations of the quantum wells (QW).
The exemplary SiGe ML film stack 800 is shown turned sidewise to indicate a relative band gap for each of the layers. The exemplary SiGe ML film stack 800 is unbiased (e.g., no potential is applied). The first energy band gap diagram 851 indicates energy bands prior to Fermi level alignment. The second energy band gap diagram 853 indicates energy bands after Fermi level alignment. The second SiGe layer 809 with high Ge content and neither boron nor carbon doping is the 2DHG layer and aligns with the EG4 energy level which is the location of the quantum well (QW).
The exemplary SiGe ML film stack 900 is shown turned sidewise to indicate a relative band gap for each of the layers. The exemplary SiGe ML film stack 900 is unbiased (e.g., no potential is applied). The first energy band gap diagram 951 indicates energy bands prior to Fermi level alignment. The second energy band gap diagram 953 indicates energy bands after Fermi level alignment. The first 907, third 911, and fifth 915 SiGe layers with high Ge content and neither boron nor carbon doping are the three 2DHG layers. Each of the three 2DHG layers aligns with EG4 energy levels which are locations of the quantum wells (QW).
A benefit of ML layers for a reduction in sheet resistance (and ultimately the base resistance in HBTs) is quantified with reference to
The remote carbon method discussed above in a pending case illustrates that carbon may be located outside of a boron doped region and still be effective in mitigating boron outdiffusion. Additionally, a total dose of carbon required to mitigate boron diffusion is reduced. The remote carbon method therefore further enhances the sheet resistances (i.e., reduces the sheet resistance) due to a reduction in alloy scattering. The reduction in alloy scattering results in an increased hole carrier mobility.
The ML2DHG-1 layer of
Exemplary embodiments described relate specifically to a heterojunction bipolar transistor (HBT). However, techniques described herein perform similarly for other applications such as channel regions of MOSFET, FINFET, HEMT, and other device types. Also, these layers can be extended to many repetitions. For instance, the structure of
An exemplary method of processing the structures is to form various layers using low-pressure chemical vapor deposition (LPCVD). However, many other methods will work such as, for example, ultrahigh vacuum CVD (UHVCVD), molecular beam epitaxy (MBE), rapid thermal CVD (RTCVD), plasma enhanced CVD (PECVD), and atomic-layer deposition (ALD). These and other methods may all be, singly or in combination, employed as well.
An exemplary method for surface preparation and seedlayer growth begins with a surface pre-clean in a wet bath of dilute hydrofluoric acid diluted with de-ionized water (HF with DI). The pre-clean is typically performed prior to film growth to ensure a clean surface. The surface pre-clean removes native oxides and other surface contamination. The surface is usually dried with isopropyl alcohol (IPA) after pre-clean.
A prebake step, for example at a temperature greater than 900° C. , is typically employed prior to seedlayer growth. However, depending on substrates and technologies employed, prebake temperatures less than 900° C. may also be utilized. The prebake is typically carried out in a hydrogen ambient but inert gas ambient environments may also be utilized. In a specific exemplary method, a hydrogen containing dopant gas may also be utilized, such as arsine (AsH3). Arsine can be utilized to provide a sharp n-type dopant profile at the base-collector junction of an HBT.
Seedlayer growth may be formed from silicon by thermal and/or chemical decomposition of a precursor such as silane (SiH4). However, other silicon precursors such as disilane (Si2H6), dichlorasilane (SiH2Cl2), or other silicon containing precursors may be readily utilized as well. A skilled artisan recognizes that silicon is not the only acceptable seedlayer material. Compounds of SiGe, SiGeC, and pure Germanium (Ge) function properly especially when combined with a layer transfer process such as that used in contemporary silicon-on-insulator (SOI) fabrication facilities. Germanium precursors, such as germane (GeH4), may be utilized, or any Ge containing precursor that can be chemically and/or thermally decomposed. Additionally, chlorine containing precursors are particularly useful for selective epitaxy and selective polysilicon applications. Processing temperatures in the range of 850° C. to 1000° C. obtain good epitaxial growth. However, temperatures less than 850° C. can be used. Seedlayer thicknesses commonly employed are between 10 nm and 100 nm, but are not limited to this range.
Process pressures are usually between 50 Torr and 120 Torr. Pressures less than 50 Torr and greater than 120 Torr may also be used. Common carrier gases (or ambient) include hydrogen (H2) or inert gases such as helium (He), argon (Ar), neon (Ne), and Xenon (Xe). Also, any blend of the above mentioned carrier gases may be utilized. For example, hydrogen and helium can be utilized simultaneously as the carrier gas mix.
The seedlayer may also contain an n-type dopant such as arsenic and/or phosphorous. Precursors in this case are usually arsine (AsH3) and/or phosphine (PH3) respectively but skilled artisans recognize that other precursors may be used as well. If the seedlayer is doped n-type, a range of dopant concentrations is typically from 5E17 atoms/cm3 to 5E18 atoms/cm3. However, some technological considerations may require less than 5E17 atoms/cm3 or more than 5E18 atoms/cm3 depending on performance targets for BVCB0, Early voltage (VAF), ICB0 (reverse bias leakage), or other target parameters. Peak dopant concentrations may be determined by secondary ion mass spectrometry (SIMS) or other techniques known in the art.
SiGe, SiGeC, SiGeB, and/or SiGeC:B layers may be formed by LPCVD or other techniques as described herein or by other methods known in the art. These layers can be arranged in many combinations such as, but not limited to those illustrated in
In a specific exemplary embodiment, the concentration of Germanium for various SiGe ML is between 15% and 25% for thicknesses ranging from approximately 50 nm to 25 nm, respectively. Depending upon selected device characteristics, Ge fractions of less than 15% and greater than 25% may also be used. However, there is a limit to how much Ge can be added to the Si lattice before excess strain relaxation and gross crystalline defects occur. A critical thickness, hc, of a SiGe layer that is lattice matched to underlying silicon is primarily a function of (1) percentage of Ge employed; (2) SiGe film thickness; (3) a thickness of a subsequent cap layer; (4) a temperature employed in HBT film-stack processing; and, (5) a temperature of any thermal anneals following a SiGe deposition. Above the critical thickness, hc, the SiGe film is in a metastable and/or unstable region which implies it relaxes readily with a large enough application of thermal energy. Therefore, a degree of metastability is largely a function of percent Ge, SiGe layer thickness, cap layer thickness, and process induced strain due to thermal energy. The critical thickness of the strain-compensated metastable SiGe base region is determined based on atomic percentage of Ge within an upper and lower bound of a metastable region. The critical thickness determination is based on historical work of People/Bean and Matthews/Blakesly, and is known in to one of skill in art.
A combined thickness of all SiGe Multi-layers taken as a single film stack in embodiments defined above is generally 25 nm to 50 nm. However, based on provisos and considerations given above, thickness ranges less than 25 nm and greater than 50 nm can be useful. Individual multi-layers can be, for example, 5 nm to 10 nm in thickness as determined by X-ray diffraction or other film thickness determination techniques.
Typical film growth conditions include deposition temperatures of 550° C. to 650° C. in a pressure range of 50 Torr to 120 Torr. However, temperatures and pressures outside of these ranges could readily be employed and are partially dependent upon deposition techniques employed. For example, ALD processes are frequently used at temperatures of 300° C. or less. Silane and germane may be used as the silicon and germanium precursors, although other Si and Ge containing precursors may be used provided they are chemically and/or thermally decomposable. Carrier gases and/or mixtures are the same as disclosed for the seed layer growth described above.
Methylsilane (CH3SiH3) is a particular carbon precursor that has been used successfully although any thermally and/or chemically decomposable carbon precursor will function properly. The carbon concentration must be high enough to prevent excessive boron outdiffusion. For example, a peak concentration of 1.2E20 atoms/cm3 of boron requires a peak carbon concentration of approximately 1E20 atoms/cm3 to effectively prevent boron outdiffusion. Required carbon and boron concentrations partially depend on the percent of Ge that is added to the Si lattice. Some characterization may be necessary to determine an optimum ratio of carbon to boron to prevent boron outdiffusion and also to attain a targeted base resistance and other device characteristics. The characterization is necessary due to various permutations of factors such as compound semiconductor selected, percentages of elemental components within the compound, dopant levels, and deposition processes and temperatures utilized.
Diborane (B2H5) is a particular carbon precursor that has been used successfully although other boron and carbon containing precursors will function properly. In a specific exemplary embodiment, a peak boron concentration range is from approximately 5E19 atoms/cm3 to 1.2E20 atoms/cm3, as measured by SIMS following film growth. However, peak concentrations of less than 5E19 atoms/cm3 and greater than 1.2E20 atoms/cm3 may be utilized to achieve a desired target for base resistance, Early voltage, current gain, fmax, or other parameters of interest.
In a SiGe HBT, the cap layer is part of the emitter structure and defines the metallurgical junction placement relative to the Si/SiGe heterojunction. The metallurgical junction placement relative to the Si/SiGe heterojunction also defines the band gap offset ΔEG(0), at the base-emitter heterojunction.
In a specific exemplary embodiment, the cap layer is constructed of silicon using pressure settings, gases, and mixtures similar to those employed in producing the seedlayer. However; processing temperatures in this embodiment are typically between 700° C. and 800° C. Temperatures less than 700° C. and greater than 800° C. may also be useful depending on technology requirements for growth rate, dopant incorporation and activation, and other factors.
The cap layer is typically between 35 nm and 55 nm in thickness but thicknesses less than 35 nm and greater than 55 nm may also be used to tune placement of the metallurgical/heterojunction at the base-emitter side of an HBT. The cap layer is also typically undoped. However, an n-type dopant such as arsenic (As) and/or phosphorous (P) may be used. Arsine and phosphine are typical precursor gases for As and P respectively.
In the foregoing specification, the present invention has been described with reference to specific embodiments thereof. It will, however, be evident to a skilled artisan that various modifications and changes can be made thereto without departing from the broader spirit and scope of the invention as set forth in the appended claims. For example, dopant steps are generally defined herein in terms of implantation procedures (e.g., ion implantation). A skilled artisan will recognize that other dopant techniques, such as diffusion, will also readily product doped-regions in an electronic device.
Also, although process steps and techniques are shown and described in detail, a skilled artisan will recognize that other techniques and methods may be utilized which are still included within a scope of the appended claims. For example, there are frequently several techniques used for depositing a film layer (e.g., chemical vapor deposition, plasma-enhanced vapor deposition, molecular beam epitaxy, atomic layer deposition, atmospheric pressure CVD, etc.). Although not all techniques are amenable to all film types described herein, one skilled in the art will recognize that multiple methods for depositing a given layer and/or film type may be used. Also, although most embodiments are described with specific reference to silicon and germanium compounds, devices fabricated from other Group II-VI or III-V semiconductor compounds such as GaAs, InP, or AlGaAs may benefit from techniques described herein as well. Moreover, the substrate itself may be comprised of a non-semiconducting material, for example, a quartz reticle with a deposited and doped polysilicon layer followed by an anneal step (e.g., rapid-thermal annealing (RTA) or an excimer laser annealing (ELA)). Therefore, a semiconductor substrate could be a non-semiconducting base with a deposited and annealed film on its surface.
Additionally, many industries allied with the semiconductor industry could make use of techniques described herein. For example, a thin-film head (TFH) process in the data storage industry or an active matrix liquid crystal display (AMLCD) in the flat panel display industry could readily make use of the processes and methodologies disclosed. The term “semiconductor” should therefore be recognized as including the aforementioned and related industries.
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|U.S. Classification||438/312, 257/E29.248, 257/E29.084, 257/E29.193, 257/E21.371, 257/E29.085, 257/E29.247|
|Cooperative Classification||H01L29/7782, H01L29/165, H01L29/7781, H01L29/66242, H01L29/161, H01L29/7378|
|European Classification||H01L29/66M6T2H, H01L29/737B8, H01L29/165, H01L29/161|
|Sep 26, 2006||AS||Assignment|
Owner name: ATMEL CORPORATION, CALIFORNIA
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:ENICKS, DARWIN G.;REEL/FRAME:018307/0352
Effective date: 20060714