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Publication numberUS20080197826 A1
Publication typeApplication
Application numberUS 11/555,460
Publication dateAug 21, 2008
Filing dateNov 1, 2006
Priority dateNov 1, 2006
Also published asUS7688050
Publication number11555460, 555460, US 2008/0197826 A1, US 2008/197826 A1, US 20080197826 A1, US 20080197826A1, US 2008197826 A1, US 2008197826A1, US-A1-20080197826, US-A1-2008197826, US2008/0197826A1, US2008/197826A1, US20080197826 A1, US20080197826A1, US2008197826 A1, US2008197826A1
InventorsTod F. Schiff, Jerry Zhijun Zhai, Jun Zhao, Peng Liu
Original AssigneeAnalog Device, Inc.
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Switching power supply controller with transient gain change
US 20080197826 A1
Abstract
A switching power supply controller has a nominal loop gain and transient loop gain that is only activated in response to an abrupt load change in one direction. The transient loop gain may be implemented with a series-connected diode and resistor combination arranged in a feedback configuration with an error amplifier. A large load change in one direction may swing the output of the error amplifier and forward bias the diode to create a non-linear gain change.
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Claims(30)
1. A switching power supply controller having a nominal loop gain and a transient loop gain, wherein the transient loop gain is only activated in response to abrupt load changes in one direction.
2. The controller of claim 1 comprising an error amplifier having a nominal feedback path to implement the nominal loop gain and a transient feedback path to implement the transient loop gain.
3. The controller of claim 2 where the transient feedback path includes a diode to activate the transient feedback path in response to abrupt swings in the output of the error amplifier.
4. The controller of claim 2 where the transient feedback path is arranged to shift the output of the switching power supply in response to the abrupt load changes in the one direction.
5. The controller of claim 4 where the transient feedback path is arranged to shift the output when the abrupt load changes occur at a frequency within a predetermined band.
6. A switching power supply controller comprising:
a modulation circuit to generate one or more switching control signals to control the output of a switching power supply in response to an error signal;
an error amplifier to generate the error signal in response to the output of the switching power supply and a reference signal; and
circuitry to change the gain of the error amplifier in response to an abrupt change in a load coupled to the output of the switching power supply.
7. The controller of claim 6 where the circuitry changes the gain asymmetrically.
8. The controller of claim 6 where the circuitry changes the gain nonlinearly.
9. The controller of claim 6 where the circuitry provides output shift depending on the frequency of transients in the load.
10. The controller of claim 6 where the circuitry includes a diode and a resistor arranged in series in a feedback configuration with the error amplifier.
11. The controller of claim 10 where the circuitry includes a capacitor coupled to the diode and the resistor.
12. The controller of claim 11 where the capacitor is anchored to an ac ground.
13. The controller of claim 6 where the circuitry includes a switch arranged to change the impedance of a feedback network coupled to the error amplifier.
14. The controller of claim 13 where:
the feedback network includes a resistor coupled between an input of the error amplifier and a node, and a capacitor coupled to the node; and
the switch includes a transistor arranged to discharge the node in response to an abrupt change in the load.
15. The controller of claim 13 where the circuitry further includes a comparator arranged to drive the switch in response to an error signal and a threshold signal.
16. The controller of claim 6 where the circuitry changes the compensation of the error amplifier in response to a change in the load.
17. The controller of claim 16 where the circuitry changes the compensation asymmetrically.
18. A method comprising:
controlling the output of a switching power supply in response to an error signal;
generating the error signal in response to the output of the switching power supply and a reference signal according to a function having gain; and
changing the gain in response to an abrupt change in a load coupled to the output of the switching power supply.
19. The method of claim 18 further comprising limiting the swing of the error signal.
20. The method of claim 18 further comprising changing the gain asymmetrically.
21. The method of claim 18 further comprising changing the gain nonlinearly.
22. The method of claim 18 further comprising shifting the output in response to transients in the load.
23. The method of claim 18 where the function includes compensation and the method further comprises changing the compensation in response to a change in the load.
24. The method of claim 23 further comprising changing the compensation asymmetrically.
25. A switching power supply controller comprising:
a modulation circuit to generate one or more switching control signals to control the output of a switching power supply in response to an error signal;
an amplifier arranged to generate the error signal in response to the output of the switching power supply and a reference signal; and
a gain control network to set the gain and compensation of the amplifier;
wherein the gain control network includes a diode and a resistor arranged in series in a feedback configuration with the amplifier.
26. The controller of claim 25 where the gain control network includes:
an input network coupled between the output of the switching power supply and a first input of the amplifier; and
a feedback network coupled between the first input of the amplifier and an output of the amplifier.
27. The controller of claim 26 where the diode and the resistor are coupled between the first input of the amplifier and the output of the amplifier.
28. The controller of claim 25 where the gain control network further includes a capacitor coupled to the diode and the resistor.
29. The controller of claim 27 where:
the diode is connected between the output of the amplifier and a node;
the resistor is connected between the node and the first input of the amplifier;
the input network includes a second resistor connected between the output of the switching power supply and the first input of the amplifier; and
the amplifier has a second input coupled to receive the reference signal.
30. The controller of claim 29 further including a capacitor connected between the node and an AC ground.
Description
    BACKGROUND
  • [0001]
    FIG. 1 illustrates a prior art switching power supply. The system of FIG. 1 includes a modulator 20 that generates switching control signals SC1 and SC2 to drive switch circuits 10 and 12, thereby controlling the amount of power delivered to the load 22 through inductors 14 and 16. An output filter 21 includes a series resistor/capacitor combination to filter the output from the inductors. A voltage mode error amplifier circuit 17 generates an error signal VERR in response to the output voltage VOUT so the modulator can modulate the switch signals to maintain a constant output voltage regardless of the amount of current consumed by the load. The sensed output voltage is combined with an input signal Vref to generate the error signal that is applied to the modulator for closed-loop control of the output. The modulator 20 shown in FIG. 1 is assumed to provide pulse-width modulation (PWM), but other modulation schemes such as pulse frequency modulation (PFM), hysteretic control (ripple regulation), etc., may be used.
  • [0002]
    The system of FIG. 1 also includes a current sensing circuit 18 to generate a signal VCS that provides a measure of the total combined output current delivered to the load. The current sense signal may be used in numerous ways. For example, it may be used to provide over-current shutdown, it may be used to implement current-mode regulation, or it may be combined with voltage feedback to establish a droop impedance for adaptive voltage positioning (AVP) control schemes.
  • [0003]
    The system of FIG. 1 is known as a multi-phase switching power supply because the power components including the switches and inductors are repeated to produce multiple output currents that are summed together to provide the total output current. This increases the amount of current available from the power supply.
  • [0004]
    Although the circuit of FIG. 1 provides good regulation and transient response in many applications, switching power supplies for microprocessors are subject to ever more demanding performance requirements. For example, under certain operating conditions, the supply current demanded by a high performance processor may drop from full load down to 30 percent and then immediately go back up to full load at frequencies of hundreds of kilohertz (kHz). The power supply must be able to supply these rapidly changing currents while still maintaining the supply voltage within a very narrow range.
  • [0005]
    An example of a problem caused by high frequency load transients is saturation of the error amplifier. That is, when the output load current changes rapidly from a low to high or high to low level, the output signal from the error amplifier changes rapidly to force the PWM output to compensate for the given load change. Since the error amplifier is non-ideal, it has some limited minimum and maximum voltage range that can be reached if there is a large error signal generated at the output, as would be the case for very large output load changes. This may drive the error amplifier into saturation with the output at one of the voltage rail limits. Once in saturation, it takes additional time for the error amplifier to swing its output voltage back from the rail once the output voltage of the power supply has come back into regulation.
  • [0006]
    Some efforts have been made to clamp the output of the error amplifier with a diode. Although this may prevent saturation, it may also cause overshoot in response to an abrupt load change in the opposite direction, thus causing the power supply output to exceed the specified voltage range, and possibly damaging the processor which is very sensitive to supply voltage variations.
  • [0007]
    Compounding these problems is the asymmetric slew rate of the output inductors as they are typically configured in switching power supplies. PWM based DC power supplies convert an input voltage to an output voltage via a switched inductor and output filter. The input to output ratio determines the system duty cycle. However, the large signal slew rate is typically asymmetric, so large load changes may drive the PWM stage into saturation at its minimum or maximum duty cycle, and this may cause a different response and non-linear operating point depending on the direction of the load change.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • [0008]
    FIG. 1 illustrates a prior art switching power supply and controller.
  • [0009]
    FIG. 2 illustrates an embodiment of a switching power supply controller according to some of the inventive principles of this patent disclosure.
  • [0010]
    FIG. 3 illustrates another embodiment of a switching power supply controller according to some additional inventive principles of this patent disclosure.
  • [0011]
    FIG. 4 illustrates an embodiment of an error amplifier for a switching power supply controller according to some additional inventive principles of this patent disclosure.
  • [0012]
    FIG. 5 illustrates another embodiment of an error amplifier for a switching power supply controller according to some additional inventive principles of this patent disclosure.
  • [0013]
    FIG. 6 illustrates another embodiment of an error amplifier for a switching power supply controller according to some additional inventive principles of this patent disclosure.
  • DETAILED DESCRIPTION
  • [0014]
    FIG. 2 illustrates an embodiment of a switching power supply controller 30 according to some of the inventive principles of this patent disclosure. The embodiment of FIG. 2 includes a modulation circuit 32 to generate one or more switching control signals SC that may be configured to control the amount of power delivered to the load. The modulation circuit 32 may implement any suitable switching control scheme such as pulse-width modulation (PWM), pulse frequency modulation (PFM), hysteretic control (ripple regulation), etc. The controller 30 has a nominal loop gain 34 that governs the manner in which the modulation circuit normally controls the switching control signal SC in response to an output feedback signal FB and a set-point or reference signal REF. The controller also has a transient loop gain 36 that is only activated in response to an abrupt load change in one direction, for example, only in response to a sudden and steep decrease in the load (load release).
  • [0015]
    FIG. 3 illustrates an embodiment of a switching power supply controller 40 that may be used to implement the nominal and transient loop gains of the embodiment of FIG. 2. In the embodiment of FIG. 3, an error amplifier 44 has a nominal feedback path 46 to implement the nominal loop gain, and a transient feedback path 48 to implement the transient loop gain in response to an abrupt load change in one direction. The controller may include additional functionality 50 to shift the output of the switching power supply in response to abrupt load changes in the one direction. For example, it may be arranged to shift the DC level of the output when the load changes occur at a frequency within a predetermined band.
  • [0016]
    FIG. 4 illustrates an embodiment of an error amplifier for a switching power supply controller according to some additional inventive principles of this patent disclosure. The embodiment of FIG. 4 includes an amplifier 52 shown here as an operational amplifier (op amp) that generates the error signal ERR in response to the output of the switching power supply and a reference signal REF. The reference signal REF is applied to the noninverting (+) input of the op amp, and a feedback signal FB derived from the output of the switching power supply is applied to the inverting (−) input through an input network 54 having an impedance ZIN. A feedback network 56 having an impedance ZFB is connected between the output and the inverting input of the op amp.
  • [0017]
    The embodiment of FIG. 4 also includes a diode D1 and a resistor R1 arranged in series in a feedback configuration with the amplifier. The loop gain and frequency compensation of the controller is nominally determined by the impedances ZIN and ZFB which form a gain control network. However, in the event of a large load change (in this example, a load release), the diode circuit provides an asymmetric gain change that may allow the controller to compensate for asymmetries in the large signal slew-rate of an output inductor. Moreover, the resistor implements a nonlinear gain change that may keep the amplifier out of deep saturation by changing the gain, rather than hard clamping the output of the error amplifier as in the prior art. This refined approach may allow the error amplifier to respond quickly to a large load change in one direction, while still preventing overshoot in the event of a subsequent large load change in the opposition direction.
  • [0018]
    FIG. 5 illustrates another embodiment of an error amplifier for a switching power supply controller according to some of the inventive principles of this patent disclosure. This embodiment is arranged to provide voltage mode output regulation for a switching power supply, but the inventive principles are not limited to this particular implementation. Referring to FIG. 5, an op amp 58 has its (+) input coupled to receive a reference signal VREF which may be a simple set-point voltage, or may include additional signal components such as a droop voltage to implement active voltage positioning (AVP). A feedback voltage VFB that represents the power supply output voltage is applied to the (−) input of the op amp through an input network that includes a parallel combination of resistor RB and capacitor CB. A feedback network connected between the output and (−) input of the op amp includes a capacitor CFB in parallel with the series combination of resistor RA and capacitor CA. The nominal loop gain and compensation are determined by the input and feedback networks.
  • [0019]
    The embodiment of FIG. 5 also includes a diode D2 having its cathode connected to the output of the op amp and its anode connected to a node N2. A resistor R2 is connected between N2 and the (−) input of the op amp. A capacitor C2 is connected between N2 and an AC ground which, in this example, is the control circuit ground.
  • [0020]
    The operation of the embodiment of FIG. 5 will be described in the context of a multi-phase DC-DC buck converter that utilizes a PWM control scheme for a high-performance processor, but the inventive principles are not limited to these particular details. In this example, the nominal output duty cycle is assumed to be less than 50 percent, so the ON slew rate of the output inductors is greater than the OFF slew rate. Thus, when the PWM switching signal is at minimum saturated duty cycle, it has a lower saturated slewing rate than at maximum saturated duty cycle.
  • [0021]
    Under steady load conditions, the error amp output VERR is normally at a bias voltage determined by a ramp voltage in the PWM controller and the nominal output voltage, which is regulated to the voltage on the inverting (−) input of the error amp. If the load increases abruptly, the error amp output swings positive and increases the duty cycle of the PWM output. Since the ON slewing rate is relatively high, the power supply output responds rapidly and prevents the error amp from saturating at its positive rail.
  • [0022]
    If the load decreases abruptly, the PWM may go to minimum duty cycle due to the relatively low OFF slew rate. In the absence of the diode circuit, this would tend to drive the output of the error amp to its negative rail and well below the nominal error amp output voltage, thereby increasing the time required to slew back out of this state. However, the series diode D2 becomes forward biased in response to a rapid drop in the error amp output. This limits the amount of negative swing on the error amp output. Also, when the diode is forward biased, the series resistor sets the feedback gain of the error amp loop and can be sized to provide optimal closed loop gain and control of the output voltage in response to a large load decrease.
  • [0023]
    The embodiment of FIG. 5 may also provide output lift to improve the minimum output voltage during a high frequency transient event. In this example, the maximum amount of output voltage lift may be estimated by the DC current through R2:
  • [0000]

    VLIFT=(VREF−0.3V)RB/R2   (Eq. 1)
  • [0000]
    where D2 is implemented with a Schottky diode (hence the 0.3 volt drop).
  • [0024]
    Capacitor C2 provides an anchor for R2 and provides current to turn on D2 faster when VERR drops rapidly. The charge current through R2 is mirrored to RB to lift the DC output voltage. The amount of lift may be set by tuning the value of R2, while the saturation frequency for maximum lift may be set by tuning the value of C2. Thus, the embodiment of FIG. 5 may be adjusted to provide little or no output lift at low transient frequencies, a predetermined amount of lift in a user-defined frequency band, and constant lift at transient frequencies above the band.
  • [0025]
    FIG. 6 illustrates another embodiment of an error amplifier for a switching power supply controller according to some additional inventive principles of this patent disclosure. This embodiment also includes a resistor R3 and capacitor C3 coupled between the inverting (−) input of error amplifier 60 and ground. The diode, however, is replaced by a transistor M1 that is arranged to pull node N3 to ground and discharge C3 when the error voltage VERR exceeds a predetermined threshold VTH which is set by a voltage source 68. A comparator 62 drives the gate of M1 through any suitable impedance 66. In a monolithic implementation, a transient detect terminal 64 may be made available to the user. The threshold VTH may be programmed internally, or it may be accessible to the user.
  • [0026]
    In some embodiments, the arrangement of FIG. 6 may enable better control of the manner in which R3/C3 are switched, for example, by making the switching of R3/C3 independent of VREF. It may also enable better control of the detection point of the VERR signal.
  • [0027]
    Although the inventive principles of this patent disclosure have been described above with reference to some specific embodiments, these embodiments can be modified in arrangement and detail without departing from the inventive concepts. For example, some of the described embodiments above may provide a transient gain in response to a decreasing load, but embodiments may also be constructed to provide a transient gain in response to a increasing load. As another example, some embodiments are described as providing an asymmetric gain change, but this also applies to asymmetric compensation changes as well. Yet another example is providing lift to increase the output voltage, but the output may also be shifted in the opposite direction as well.
  • [0028]
    Some of the embodiments are described above in the context of analog circuitry where signals are realized as voltage or current mode signals, but digital implementations are also possible according to the inventive principles of this patent disclosure. In a digital implementation, a signal (e.g., an error signal) may take the form of a digital value, and the “circuitry” that manipulates this value may be logic, i.e., hardware, software, firmware, etc. or a combination thereof.
  • [0029]
    Since the embodiments described above can be modified in arrangement and detail without departing from the inventive concepts, such changes and modifications are considered to fall within the scope of the following claims.
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Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US7928704 *Apr 18, 2008Apr 19, 2011Upi Semiconductor CorporationDroop circuits and multi-phase DC-DC converters
US8570011May 9, 2011Oct 29, 2013Stmicroelectronics S.R.L.DC-DC converter circuit
US8638076Oct 23, 2009Jan 28, 2014Intersil Americas Inc.Transient processing mechanism for power converters
US8928303Mar 14, 2013Jan 6, 2015Analog Devices TechnologyApparatus and methods for transient compensation of switching power regulators
US9198239Dec 5, 2012Nov 24, 2015Eldolab Holding B.V.Driver system for driving at least one LED
US20090051334 *Apr 18, 2008Feb 26, 2009Upi Semiconductor CorporationDroop circuits and multi-phase DC-DC converters
US20100102785 *Oct 23, 2009Apr 29, 2010Young Chris MTransient Processing Mechanism for Power Converters
WO2013085381A2 *Dec 5, 2012Jun 13, 2013Eldolab Holding B.V.Driver system for driving at least one led
Classifications
U.S. Classification323/282
International ClassificationG05F1/00
Cooperative ClassificationH02M3/156
European ClassificationH02M3/156
Legal Events
DateCodeEventDescription
Mar 14, 2007ASAssignment
Owner name: ANALOG DEVICES, INC., MASSACHUSETTS
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:SCHIFF, TOD F.;ZHAI, JERRY ZHIJUN;ZHAO, JUN;AND OTHERS;REEL/FRAME:019008/0269;SIGNING DATES FROM 20061218 TO 20070112
Owner name: ANALOG DEVICES, INC.,MASSACHUSETTS
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:SCHIFF, TOD F.;ZHAI, JERRY ZHIJUN;ZHAO, JUN;AND OTHERS;SIGNING DATES FROM 20061218 TO 20070112;REEL/FRAME:019008/0269
Jan 30, 2008ASAssignment
Owner name: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC,ARIZONA
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:ANALOG DEVICES, INC.;ANALOG DEVICES B.V.;REEL/FRAME:020431/0903
Effective date: 20071231
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Free format text: SECURITY AGREEMENT;ASSIGNOR:SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC;REEL/FRAME:023826/0725
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