US 20080278901 A9
Memory module flex circuitry is devised to accommodate packaged integrated circuit devices (ICs) of varying heights or thicknesses. The invention may be employed to advantage in a variety of modules that employ flex circuitry including, but not limited to, fully-buffered, registered or more simple memory modules. Many such modules may replace conventionally-constructed DIMMs without change to the system in which the module is employed. Regions of the flex circuitry devised to provide one or more mounting locales for ICs are delineated, in part, from the main body of the flex circuit. The delineation may be implemented in a preferred embodiment by separating a designated IC mounting area or peninsula from the main body of the flex circuitry either with isolating areas or separations or with tabs that extend from the primary perimeter of the flex circuitry.
1. A memory expansion board comprising:
a rigid substrate having two opposing lateral sides and an edge; and
a flex circuit having a body and multiple circuit mounting areas for mounting CSPs having a first primary function and a peninsular mounting area for mounting at least one CSP having a second primary function, the peninsular mounting area being separate in part from the body of the flex circuit, the flex circuit being wrapped about the edge of the rigid substrate and having plural contacts adapted for connection to a circuit board socket, the plural contacts being disposed near the edge of the rigid substrate.
2. The memory expansion board of
3. The memory expansion board of
4. The memory expansion board of
5. The memory expansion board of
6. The memory expansion board of
7. The memory expansion board of
8. The memory expansion board of
9. The memory expansion board of
10. A memory module comprising:
a rigid substrate having first and second lateral sides and an end edge;
a flex circuit having first and second sides and a main body and a set of contacts fashioned for placement in an edge connector, the flex circuit being populated on its main body with CSPs and populated with at least one CSP on a mounting area separated at least in part from the main body of the flex circuit, the flex circuit being disposed to place a first part of the flex circuit proximal to the first lateral side of the rigid substrate and a second part of the flex circuit proximal to the second lateral side of the rigid substrate.
11. The memory module of
12. The memory module of
13. The memory module of
14. The memory module of
15. The memory module of
16. A flex circuit comprising:
a first side and a second side and a main body and a peninsular mounting area and plural contacts along the first side having expansion board contacts adapted for connection to a circuit board socket; and
a plurality of CSPs mounted along the flex circuit and at least one CSP being mounted on the peninsular mounting area of the flex circuit.
17. The flex circuit of
18. The flex circuit of
19. A circuit module comprising:
a flex circuit devised in accordance with
a rigid substrate having an edge, the flex circuit being wrapped about the rigid substrate to dispose the plural contacts proximal to the edge of the rigid substrate to provide a module that may be inserted into a circuit board socket.
20. The circuit module of
21. The circuit module of
22. The circuit module of
This application incorporates by reference each of the following U.S. patent applications: U.S. patent application Ser. No. 10/934,027, filed Sep. 3, 2004; U.S. patent application Ser. No. 11/005,992, filed Dec. 7, 2004; and U.S. patent application Ser. No. 11/007,551, filed Dec. 8, 2004.
The present invention relates to systems and methods for creating high density circuit modules.
The well-known DIMM (Dual In-line Memory Module) board has been used for years, in various forms, to provide memory expansion. A typical DIMM includes a conventional PCB (printed circuit board) with memory devices and supporting digital logic devices mounted on both sides. The DIMM is typically mounted in the host computer system by inserting a contact-bearing edge of the DIMM into a card edge connector. Systems that employ DIMMs provide limited space for such devices and conventional DIMM-based solutions have typically provided only a moderate amount of memory expansion.
As die sizes increase, the limited surface area available on conventional DIMMs limits the number of devices that may be carried on a memory expansion module devised according to conventional DIMM techniques. Further, as bus speeds have increased, fewer devices per channel can be reliably addressed with a DIMM-based solution. For example, 288 ICs or devices per channel may be addressed using the SDRAM-100 bus protocol with an unbuffered DIMM. Using the DDR-200 bus protocol, approximately 144 devices may be addressed per channel. With the DDR2-400 bus protocol, only 72 devices per channel may be addressed. This constraint has led to the development of the fully-buffered DIMM (FB-DIMM) with buffered C/A and data in which 288 devices per channel may be addressed. With the FB-DIMM, not only has capacity increased, pin count has declined to approximately 69 from the approximately 240 pins previously required.
The FB-DIMM circuit solution is expected to offer practical motherboard memory capacities of up to about 192 gigabytes with six channels and eight DIMMs per channel and two ranks per DIMM using one gigabyte DRAMs. This solution should also be adaptable to next generation technologies and should exhibit significant downward compatibility.
This great improvement has, however, come with some cost and will eventually be self-limiting. The basic principle of systems that employ FB-DIMM relies upon a point-to-point or serial addressing scheme rather than the parallel multi-drop interface that dictates non-buffered DIMM addressing. That is, one DIMM is in point-to-point relationship with the memory controller and each DIMM is in point-to-point relationship with adjacent DIMMs. Consequently, as bus speeds increase, the number of DIMMs on a bus will decline as the discontinuities caused by the chain of point-to-point connections from the controller to the “last” DIMM become magnified in effect as speeds increase. Consequently, methods to increase the capacity of a single DIMM find value in contemporary memory and computing systems.
There are several known methods to improve the limited capacity of a DIMM or other circuit board. In one strategy, for example, small circuit boards (daughter cards) are connected to the DIMM to provide extra mounting space. The additional connection may cause, however, flawed signal integrity for the data signals passing from the DIMM to the daughter card while the additional thickness of the daughter card(s) increases the profile of the DIMM.
Multiple die packages (MDP) are also used to increase DIMM capacity while preserving profile conformity. This scheme increases the capacity of the memory devices on the DIMM by including multiple semiconductor die in a single device package. The additional heat generated by the multiple die typically requires, however, additional cooling capabilities to operate at maximum operating speed. Further, the MDP scheme may exhibit increased costs because of increased yield loss from packaging together multiple die that are not fully pre-tested.
Stacked packages or “stacks” are yet another strategy used to increase circuit board capacity. This scheme increases capacity by stacking packaged integrated circuits to create a stacked high-density circuit module for mounting on the circuit board. In some techniques, flexible conductors are used to selectively interconnect packaged integrated circuits in such stacks.
Staktek Group LP has developed multiple innovations in memory module design and applications including stacks and larger modules. Some designs aggregate several packaged ICs on plug-in modules that replace conventional DIMMs (including, for example, fully buffered, registered or simple DIMM designs).
As signal management is brought on-board and capacities and consequent thermal issues multiply, circuits other than memory are increasingly included in memory modules. The use of other circuitry that may exhibit a profile or dimensionality that differs from that of the memory circuits can increase manufacturing complexity. Consequently, what is needed are methods and systems to adapt flex circuit-based memory modules to more readily incorporate integrated circuit packages of a variety of sizes and dimensions.
Memory module flex circuitry is devised to accommodate packaged integrated circuit devices (ICs) of varying heights or thicknesses. The invention may be employed to advantage in a variety of modules that employ flex circuitry including, but not limited to, fully-buffered, registered or more simple memory modules. Many such modules may replace conventionally-constructed DIMMs without change to the system in which the module is employed.
Regions of the flex circuitry devised to provide one or more mounting locales for ICs are delineated or separated, in part, from the main body of the flex circuit. The delineation or separation may be implemented in a preferred embodiment by separating a designated IC mounting area or peninsula from the main body of the flex circuitry either with isolating areas or separations or with tabs that extend from the primary perimeter of the flex circuitry.
ICs 18 on flexible circuit 12 are, in the depicted embodiment, chip-scale packaged memory devices. For purposes of this disclosure, the term chip-scale or “CSP” shall refer to integrated circuitry of any function with an array package providing connection to one or more die through contacts (often embodied as “bumps” or “balls” for example) distributed across a major surface of the package or die. CSP does not refer to leaded devices that provide connection to an integrated circuit within the package through leads emergent from at least one side of the periphery of the package such as, for example, a TSOP.
Embodiments of the present invention may be employed with leaded or CSP devices or other devices in both packaged and unpackaged forms but where the term CSP is used, the above definition for CSP should be adopted. Consequently, although CSP excludes leaded devices, references to CSP are to be broadly construed to include the large variety of array devices (and not to be limited to memory only) and whether die-sized or other size such as BGA and micro BGA as well as flip-chip. As those of skill will understand after appreciating this disclosure, some embodiments of the present invention may be devised to employ stacks of ICs each disposed where an IC 18 is indicated in the exemplar Figs.
Multiple integrated circuit die may be included in a package depicted as a single IC 18. While in this embodiment memory ICs are used to provide a memory expansion board or module, various embodiments may include a variety of integrated circuits and other components. Such variety may include microprocessors, FPGA's, RF transceiver circuitry, and digital logic, as a list of non-limiting examples, or other circuits or systems which may benefit from a high-density circuit board or module capability. Thus the depicted multiple instances of IC 18 may be devices of a first primary function or type such as, for example, memory, while other devices such as depicted circuit 25, for example, or circuit 19 may be devices of a second primary function or type such as, for example, thermal sensing in which the circuit generates a signal which may be employed to calculate the heat accumulation or temperature of a module. Circuit 19 depicted on
Depicted circuit 25 shown on
Separations 27 give peninsula 26 freedom of movement that will be shown in later Figs. to provide flexibility in positioning integrated circuit (IC) 25 particularly when IC 25 exhibits a profile or thickness that varies from that exhibited by ICs 18.
Between the rows ICR1 and ICR2 of ICs 18, flex circuit 12 has two rows (CR1 and CR2) of module contacts 20. These contacts are adapted for insertion in a circuit board socket such as in a preferred embodiment, an expansion board edge connector. When flex circuit 12 is folded as depicted in later Figs., side 8 depicted in
Side 9 of flex circuit 12 is on the inside in several depicted configurations of module 10 and thus side 9 is closer to substrate 14 about which flex circuit 12 is disposed than is side 8. Other embodiments may have other numbers of ranks and combinations of plural CSPs connected to create the module of the present invention. In particular, some embodiments may be configured to supplant conventional fully-buffered DIMMs as disclosed in detail in co-pending U.S. patent application Ser. No. 11/007,551, filed Dec. 8, 2004 which has been incorporated by reference.
Various discrete components such as termination resistors, bypass capacitors, and bias resistors, in addition to the circuits 19 shown on sides 8 and 9 of flex circuit 12 as well as circuit 25 may be mounted on either or both sides 8 and 9 of flex 12. In the depicted embodiment, however, circuit 25 is depicted on side 9 which will be on the inner side of module 10. In the depicted embodiment, circuit 25 represents a thermal sensor to indicate the temperatures exhibited by the module and, consequently, circuit 25 is placed closer to the substrate by mounting it on what will be the inner side of flex circuit 12 when flex 12 is assembled with the module.
Flex circuit 12 may also depicted with reference to the perimeter edges of its main body 29, two of which perimeter edges are typically long (PElong1 and PElong 2) and two of which are typically shorter (PEshort1 and PEshort2). Other embodiments may employ flex circuits 12 that are not rectangular in shape and may be square in which case the perimeter edges would be of equal size or other convenient shape to adapt to manufacturing particulars. Rectangular shapes for flex circuit 12 assist, however, in providing a low profile for a preferred module devised with use of flex circuit 12.
In the embodiments depicted in
One advantageous methodology for efficiently assembling a circuit module 10 such as described and depicted herein is as follows. In a preferred method of assembling a preferred module assembly 10, a flex circuit 12 is provided with one or more mounting peninsulas that have been delineated from the body of flex circuit 12. That flex circuit 12 is laid flat and one or both sides are populated according to circuit board assembly techniques known in the art. Flex circuit 12 is then folded about end 16A of substrate 14. Next, optionally, tooling holes 17 may be used to align flex 12 to substrate 14. Flex 12 may be laminated or otherwise attached to substrate 14 at portions 24. Further, top surfaces 18T of ICs 18 and the top surface of circuit 25 may be attached to substrate 14 in a manner devised to provide mechanical integrity or thermal conduction.
The depicted adhesive 30 and flex 12 may vary in thickness and are not drawn to scale to simplify the drawing. The depicted substrate 14 has a thickness such that when assembled with the flex 12 and adhesive 30, the thickness measured between module contacts 20 falls in the range specified for the mating connector. In some other embodiments, flex circuit 12 may be wrapped about perimeter edge 16B or both perimeter edges 16A and 16B of substrate 14. In other instances, multiple flex circuits may be employed or a single flex circuit may connect one or both sets of contacts 20 to the resident ICs. A variety of representative embodiments of module 10 that may employ the inventions disclosed herein can be found in U.S. patent application Ser. No. 10/934,027, filed Sep. 3, 2004; U.S. patent application Ser. No. 11/005,992, filed Dec. 7, 2004; and U.S. patent application Ser. No. 11/007,551, filed Dec. 8, 2004 all of which are owned by the assignee of the present invention and are each incorporated by reference into this application.
As shown in the embodiment depicted in
The present invention may be employed to advantage in a variety of applications and environment such as, for example, in computers such as servers and notebook computers by being placed in motherboard expansion slots to provide enhanced memory capacity while utilizing fewer sockets. Two high rank embodiments or single rank high embodiments may both be employed to such advantage as those of skill will recognize after appreciating this specification as well as the U.S. patent applications that have been incorporated herein by reference.
Although the present invention has been described in detail, it will be apparent to those skilled in the art that many embodiments taking a variety of specific forms and reflecting changes, substitutions and alterations can be made without departing from the spirit and scope of the invention. Therefore, the described embodiments illustrate but do not restrict the scope of the claims.