US 20080286446 A1
A method for forming electrically stimulable materials, including programmable resistance and electrical switching materials, in high aspect ratio features. The method includes forming a seed layer in the recessed portion of a feature and using the seed layer to direct the vapor phase deposition of an electrically stimulable material. The seed layer may provide nucleation sites that lead to preferential deposition of the electrically stimulable material on the seed layer relative to the sidewalls of the feature. The seed layer may promote the formation of a finely crystalline morphology of the electrically stimulable material to facilitate deposition in the recessed portions of a feature and inhibit blocking of the top of the feature by large crystals.
1. A method for forming an electronic device comprising:
providing a substrate, said substrate supporting a first layer, said first layer having an opening formed therein, said opening having a sidewall;
forming a seed layer within said opening; and
forming an active material within said opening on said seed layer.
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This application is a continuation-in-part of U.S. patent application Ser. No. 11/046,114, entitled “Chemical Vapor Deposition of Chalcogenide Materials” and filed Jan. 28, 2005, the disclosure of which is incorporated in its entirety herein.
This invention relates to a process for preparing threshold switching and phase-change materials. More particularly, this invention relates to a chemical vapor deposition process for forming threshold switching and phase-change materials that utilizes a seed material to regulate the as-deposited crystal size. Most particularly, this invention relates to formation of threshold switching and phase-change materials in features with restricted dimensions.
Programmable resistance materials and threshold switching materials are promising active materials for next-generation electronic storage, computing and signal transfer devices. A programmable resistance material possesses two or more states that differ in electrical resistance. The material can be programmed back and forth between the states by providing energy to induce an internal chemical, electronic, or physical transformation of the material that manifests itself as a change in resistance of the material. The different resistance states can be used as memory states to store or process data.
Threshold switching materials are capable of being switched between a relatively resistive state (a quiescent low conduction state) and a relatively conductive state. Application of an energy signal, frequently an electrical energy signal, induces the change from the relatively resistive state to the relatively conductive state. The relatively conductive state persists for so long as the energy signal is applied. Once the energy signal is removed, the switching material relaxes back to its quiescent state. Devices that incorporate switching materials are useful as voltage clamping devices, surge suppression devices, signal routing devices, and solid state memory access devices.
Phase change materials are a promising class of programmable resistance materials. A phase change material is a material that is capable of undergoing a transformation, preferably reversible, between two or more distinct structural states. In a common embodiment, a phase change material is reversibly transformable between a crystalline state and an amorphous state. In the crystalline state, the phase change material has lower resistivity; while in the amorphous state, it has higher resistivity. The distinct structural states of a phase change material may be distinguished on the basis of, for example, crystal structure, atomic arrangement, order or disorder, fractional crystallinity, relative proportions of two or more different structural states, a physical (e.g. electrical, optical, magnetic, mechanical) or chemical property etc. Reversibility of the transformations between structural states permits reuse of the material over multiple cycles of operation.
Typically, a programmable resistance material or switching device is formed by placing an active material, such as a phase change material, between two electrodes. Operation of the device is effected by providing an electrical signal between the two electrodes and across the active material. Programmable resistance materials may be used as the active material of a memory device. Write operations in a memory device, which may also be referred to herein as programming operations, apply electric pulses to the memory device. Read operations, which measure the resistance or threshold voltage of the memory device, are performed by providing current or voltage signals across the two electrodes. The transformation between the relatively resistive state and relatively conductive state of a switching material is similarly induced by providing a current or voltage signal between two electrodes in contact with the switching material.
One of the practical challenges that programmable resistance memory devices and switching devices face is a minimization of the energy required to program or switch the active material. Strategies for reducing the energy of operation include modifying the chemical composition of the active material, incorporating an inactive material along with the active material in the region between the electrodes, reducing the volume of active material, and/or reducing the contact area of one or more electrodes contacting the active material.
Fabrication of electronic devices, including switching, memory, and logic devices, typically includes a number of processes that are used to form various features and layers on a surface of a semiconductor wafer or other appropriate substrate. Physical vapor deposition (PVD), chemical vapor deposition (CVD), and other deposition processes involving the reaction, decomposition or coating of gaseous, liquid, or solid precursors may be used in the formation of semiconductor and other electronic devices. Lithography is a patterning process in the formation of electronic devices that is commonly used to define small-scale features and often sets a limit on the extent of device miniaturization. Additional fabrication processes include chemical-mechanical polishing (CMP), etching, annealing, ion implantation, plating, and cleaning. In normal fabrication, an array containing a large number of electronic devices is formed on a semiconductor wafer.
In electronic device fabrication, it is desirable to reduce the length scale or feature size of devices as much as possible so that a greater number of devices can be formed per unit substrate area. As the feature size of devices is minimized, however, processing of the devices becomes more difficult. Small scale features become more difficult to define as the lithographic limit of resolution is reached and features that are defined become more difficult to process.
A common step in processing involves depositing a layer and forming an opening in it. Openings such as channels, trenches, holes, vias, pores or depressions in layers are commonly employed to permit interconnections between devices or layers of a structure. Typically, the opening is formed by lithography, then etching, and is subsequently filled with another material. As the dimension or length scale of an opening decreases upon miniaturization, it becomes increasingly difficult to fill the opening with another material without compromising performance or durability.
Techniques such as physical vapor deposition (PVD) or sputtering fail to provide dense or complete filling of openings when the dimensions of the opening are reduced below a critical size. Instead of providing a dense, uniform filling, these techniques increasingly incompletely fill openings as the feature size of the opening decreases. As the feature size decreases, there is a tendency for the packing density of the material formed in the opening to vary in the depth or lateral dimensions of the opening and as a result, the layer deposited within the opening may include voids, vacancies, gaps, pores, keyholes, or other regions of non-uniform coverage. Imperfections in the filling of openings become especially pronounced as the aspect ratio (ratio of the depth dimension to the lateral dimension of the feature) of the opening increases. Deep, narrow channels, for example, are more difficult to fill uniformly than channels that are shallow and wide. With deep, narrow features, sputtering and other physical deposition techniques are oftentimes unable to deliver sufficient material to the bottom of the feature. Instead, a layer of material is formed over or only near the top of the feature and the lower part of the feature is blocked and remains largely unfilled. Lack of structural uniformity in the filling of openings compromises performance because: (1) variations in device characteristics occur across an array due to differences in the degree or nature of filling non-uniformities from device-to-device and (2) less than optimal performance is achieved for each device due to the defective nature of the material within the opening.
Conformality of deposition is another processing difficulty that becomes exacerbated as feature size decreases. Fabrication of electronic devices generally involves forming a stack of layers, where the individual layers may differ in dimensions (lateral to or normal to the substrate) and compositions. The process of fabricating an electronic device generally involves sequential deposition of one layer upon a lower (previously formed) layer. Optimal device performance requires conformality of later-formed layers with earlier-formed layers. Each layer in a stack must conform to the shape and contours of the layer in the stack upon which it is formed. Uniform coverage and good adhesion are desired.
In addition to difficulties with achieving uniform filling, openings also present complications for achieving conformal deposition that become more pronounced as the size of the opening decreases. The boundary or perimeter of an opening is frequently defined by an edge, step, or other relatively discontinuous feature. The shape of an opening is generally defined by a sidewall or perimeter boundary and a lower surface or bottom boundary. A trench opening, for example, is defined by generally vertical sidewalls and a bottom surface that is generally parallel to the substrate.
When fabricating electronic devices, it is often necessary to first form a layer with an opening and to subsequently deposit another layer over this layer. Conformality requires that the subsequent layer faithfully conform to the shape and texture of the underlying layer having the opening. The subsequent layer must deposit uniformly over both the portion of the underlying layer in which the opening has not been formed as well as over the opening itself. Conformality over the opening requires uniform coverage of the edges or steps that form the boundary of the opening. Achieving conformality over discontinuous features becomes increasingly difficult as the feature size of the opening decreases or the aspect ratio of the opening increases.
Fabrication of programmable resistance and switching devices often includes a step of forming an opening in a dielectric layer and filling the opening with an active programmable or switching material. Miniaturization of programmable resistance and switching devices requires methods for reducing the dimensions of the active material. A reduction in the volume of active material is beneficial because the energy required for operation of programmable resistance and switching devices decreases with decreasing dimensions of the active material. Accordingly, it is desirable to develop techniques for forming and filling openings with small dimensions without suffering from the imperfections in filling and conformality associated with standard prior art techniques such as sputtering or physical vapor deposition. Ideally, the techniques would enable the fabrication of active materials for programmable resistance and switching devices having dimensions near, at or below the lithographic limit.
Referring to the drawings,
To improve the quality of active materials in high aspect ratio devices, new methods for forming active materials in openings with reduced dimensionality are needed. The methods must provide uniform filling of openings with active material as well as greater conformality with underlying and surrounding layers than the prevailing methods.
The instant invention provides electronic devices having logic, memory, switching, or processing functionality based on programmable resistance materials, switching materials, chalcogenide materials, or other active materials and methods of fabricating same.
In accordance with one embodiment of the instant invention, a programmable resistance or switching device includes a substrate with a plurality of stacked layers including a bottom electrode, an insulator layer having an opening formed therein that exposes the bottom electrode, an active material formed in the opening, and a top electrode layer deposited over the active material. The electrode layers may be conductive strips or plugs and may also be in electrical communication with addressing lines or external circuitry.
The active material may be a programmable resistance material, switching material or other electronic material. Representative active materials include chalcogenide materials, pnictide materials, phase-change materials, and threshold switching materials.
The opening may be round, elliptical, bent, rectilinear or other circumferential shape. In one embodiment, the opening is a circular hole that is filled or lined with an active material. In another embodiment, the opening is a trench that is filled or lined with an active material. The opening has an aspect ratio that ranges between 0.25 and 5.
The methods for forming the active material include chemical vapor deposition, atomic layer deposition, selective deposition, and solution deposition. The deposition method includes formation of a seed layer in an opening or other region where deposition of the active material is desired. The seed layer may form as a contiguous or continuous layer or as discrete regions in a recessed portion of the opening. The seed layer influences one or more of the growth rate, crystal structure, crystal size, conformality, composition, electrical properties, and adhesion characteristics of the active material. In one embodiment, the seed layer promotes the formation of an active material with finer crystallinity, where the reduced crystal size facilitates the filling of an opening. In another embodiment, the active material forms preferentially on the seed layer relative to the sidewall surface of the opening to permit more unobstructed access of active material deposition precursors to the deeper portions of the opening.
For a better understanding of the instant invention, together with other and further illustrative objects thereof, reference is made to the following description, taken in conjunction with the accompanying drawings and claims.
For a more complete understanding of the present invention, and the advantages thereof, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which:
Although this invention will be described in terms of certain preferred embodiments, other embodiments that are apparent to those of ordinary skill in the art, including embodiments that do not provide all of the benefits and features set forth herein, are also within the scope of this invention. Accordingly, the scope of the invention is defined only by reference to the appended claims.
The instant invention relates generally to electronic devices that include two or more electrodes in contact or electrical communication with an active material. As used herein, active material refers generally to an electrically stimulable material such as a programmable resistance material that can, for example, be used for memory, programmable logic, or other applications; other memory material; or electrical switching material. A programmable resistance material is a material having two or more states that are distinguishable on the basis of electrical resistance. The two or more states may be structural states, chemical states, electrical states, optical states, magnetic states, or a combination thereof. A programmable resistance material is transformable (“programmable”) between any pair of states by supplying an appropriate amount of energy to the material. The supplied energy may be referred to as a “programming energy”. When transformed (“programmed”) to a particular state, the programmable resistance material remains in that state until additional energy is supplied to the material. The different states of a programmable resistance material are stable in the absence of external energy and persist for an appreciable amount of time upon removal of the source of programming energy. Programmable resistance materials include phase-change materials, chalcogenide materials, pnictide materials, and other multi-resistance state materials.
Phase change materials include materials that are transformable between two or more crystallographically-distinct structural states. The states may differ in crystal structure, unit cell geometry, unit cell dimensions, degree of disorder, particle size, grain size, or composition. Chalcogenide materials are materials that include an element from Column VI of the periodic table as a significant component along with one or more modifying elements from Columns III (e.g. B, Al, Ga, In), IV (e.g. Si, Ge, Sn), and/or V (e.g. Sb, Bi, P, As) of the periodic table. Transition metals (e.g. Ag, Ni, Cu, Cr, V, Fe) may also be included as modifiers. Representative chalcogenide materials include GaSb, InSb, InSe, Sb2Te3, GeTe, SnSb2Te4, Te81Ge15Sb2S2, Ge—Sb—Te alloys (e.g. Ge2Sb2Te5), Ge—Sb—Te—Se alloys, In—Sb—Te alloys, In—Sb—Ge alloys, Ga—Se—Te alloys, Ag—In—Sb—Te alloys, Ge—Sb—Bi—Te alloys, In—Sb—Bi—Te alloys, Te—Ge—Sb—S alloys, Ge—Sn—Sb—Te alloys.
Pnictide materials are materials that include an element from Column V of the periodic table as a significant component along with one or more modifying elements from Columns III, IV, or VI of the periodic table. Many chalcogenide and pnictide materials are phase-change materials that are transformable between and among a plurality of crystalline, partially crystalline, and amorphous states. Other multi-resistance state materials include metal-insulator-metal structures with thin film insulators, or conductive oxide materials such as a family of CuO materials used in RRAM devices. Programmable resistance materials may serve as the active material in memory devices, including non-volatile memory devices. Representative programmable resistance materials in accordance with the instant invention are described in U.S. Pat. Nos. 5,543,737; 5,694,146; 6,087,674; 6,967,344; 6,969,867; 5,757,446; 5,166,758; 5,296,716; 5,534,711; 5,536,947; 5,596,522; 6,087,674; and 7,020,006 as well as in U.S. patent application Ser. Nos. 11/200,466 and 11/301,211; all of which disclosures are incorporated by reference herein. Co-pending U.S. patent application Ser. No. 11/046,114 incorporated by reference hereinabove also provides relevant information about the basic operational characteristics and compositions of chalcogenide phase-change materials.
For illustrative purposes, a representative depiction of the electrical resistance (R) of a phase-change type of programmable resistance material as a function of electrical energy or current pulse magnitude (Energy/Current) is presented in
The resistance plot includes two characteristic response regimes of a chalcogenide phase-change material to electrical energy. The regimes are approximately demarcated with the vertical dashed line 10 shown in
As energy is added to the reset state, the fractional crystallinity increases, and the chalcogenide material transforms in the direction of increasing applied energy among a plurality of partially-crystalline states along the plateau 30. Selected accumulation states (structural states in the accumulation region) are marked with squares in
The regime to the right of the line 10 of
In contrast to the accumulating region, structural transformations that occur in the direct overwrite region are reversible and bi-directional. As indicated hereinabove, each state in the direct overwrite region may be identified by its resistance and a current pulse magnitude, where application of that current pulse magnitude induces changes in fractional crystallinity that produce the particular resistance value of the state. Application of a subsequent current pulse may increase or decrease the fractional crystallinity relative to the fractional crystallinity of the initial state of the chalcogenide material. If the subsequent current pulse has a higher magnitude than the pulse used to establish the initial state, the fractional crystallinity of the chalcogenide material decreases and the structural state is transformed from the initial state in the direction of the reset state along the resistance curve in the direct overwrite regime. Similarly, if the subsequent current pulse has a lower magnitude than the pulse used to establish the initial state, the fractional crystallinity of the chalcogenide material increases and the structural state is transformed from the initial state in the direction of the set state along the resistance curve in the direct overwrite regime.
In OUM (Ovonic Unified (or Universal) Memory) applications, the direct overwrite states of the chalcogenide material are used to define memory states of a memory device. Most commonly, the memory devices are binary memory devices that utilize two of the direct overwrite states as memory states, where a distinct data value (e.g. “0” or “1”) is associated with each state. Each memory state thus corresponds to a distinct structural state of the chalcogenide material and readout or identification of the state can be accomplished by measuring the resistance of the material (or device) since each structural state is characterized by a distinct resistance value as exemplified by the range of direct overwrite states 50 in
To facilitate readout and to minimize readout error, it is desirable to select the memory states of a binary memory device so that the contrast in resistance of the two states is large. Typically the set state (or a state near the set state) and the reset state (or a state near the reset state) are selected as memory states in a binary memory application. The resistance contrast depends on details such as the chemical composition of the chalcogenide, the thickness of the chalcogenide material in the device and the geometry of the device. For a layer of phase-change material having the composition Ge22Sb22Te55, a thickness of ˜600 A, and pore diameter of below ˜0.1 μm in a typical two-terminal device structure, for example, the resistance of the reset state is ˜100-1000 kΩ and the resistance of the set state is under ˜10 kΩ. Phase-change materials in general show resistances in the range of ˜50 kΩ to ˜2000 kΩ in the reset state and resistance of ˜0.5 kΩ to ˜50 kΩ in the set state. In the preferred phase-change materials, the resistance of the reset state is at least a factor of two, and more typically an order of magnitude or more, greater than the resistance of the set state. In addition to binary (single bit) memory applications, chalcogenide materials may be utilized as non-binary or multiple bit memory materials by selecting three or more states from among the direct overwrite states and associating a data value with each state, where each memory state corresponds to a distinct structural state of the chalcogenide and is characterized by a distinct resistance value.
Electrical switching materials are materials that are switchable between two states that differ in electrical conductivity. The two states range in conductivity from the relatively resistive (e.g. comparable to a dielectric) to the relatively conductive (e.g. comparable to a metal). Electrical switching materials generally have a quiescent or relaxed state, usually a relatively more resistive state, in which they exist in the absence of electrical energy. When electrical energy is applied, the switching material transforms to the more conductive state and persists in that state transitorily for so long as it is subjected to a critical amount of energy from an external source. When the external energy decreases below the critical level, the switching material relaxes back to its quiescent state. Switching materials include OTS (Ovonic Threshold Switch) materials, negative differential resistance materials, and metal-insulator-metal structures. Certain chalcogenide and pnictide compositions exhibit electrical switching, including solely within an amorphous crystallographic phase. Illustrative switching materials include those described in U.S. Pat. Nos. 6,967,344 and 6,969,867, as well as in U.S. patent application Ser. No. 11/046,114, incorporated by reference hereinabove.
The electrical switching properties of one type of electrical switching material in accordance with the instant devices are schematically illustrated in
The I-V curve includes a resistive branch and a conductive branch. The branches are labeled in
The switching properties of the material can be described by reference to
When the applied voltage equals or exceeds the threshold voltage, the switching material transforms from the resistive branch to the conductive branch of the I-V curve. The switching event occurs nearly instantaneously and is depicted by the dashed line in
Chemical vapor deposition, hereinafter referred to as CVD, is a method that offers the prospect of uniform, conformal filling of high aspect ratio openings in electronic device fabrication. As used herein, CVD refers to all forms of chemical vapor deposition, including metalorganic chemical vapor deposition (MOCVD) and plasma enhanced chemical vapor deposition (PECVD). In the CVD process, precursors of the constituent elements of a material are reacted to produce a thin film on a substrate. The reaction of the CVD precursors may occur homogeneously in the gas phase or heterogeneously at the solid-gas interface of the substrate surface. Precursors for many elements are available and a variety of thin film compositions can be synthesized using CVD.
In CVD processing, precursors are introduced into a reactor in gas phase form. Precursors that are in the gas phase at room conditions or upon heating are directly introduced into the reactor, typically in diluted form via a carrier gas. Liquid and solid phase precursors are vaporized or sublimed and then introduced into the reactor, also typically in diluted form in the presence of a carrier gas. Upon introduction into the reactor, precursors containing the chemical constituents of the desired material are reacted or decomposed (thermally, photochemically, or in a plasma) to form a thin film of desired composition on a substrate or underlying structure. The rate of deposition, stoichiometry, composition and morphology of the film can be varied through appropriate control over process parameters such as reaction temperature; substrate; selection of precursors; reactor pressure; and the rate of introduction of precursors into the reactor. CVD offers the advantages of providing high purity thin films at relatively low temperatures. Since CVD precursors or intermediates have molecular dimensions, they can readily access the recessed portions of high aspect ratio features. As a result, CVD processes promote dense, uniform filling of openings. CVD processes are also conformal in nature and provide smooth coverage of underlying, sloped, vertical walled, and adjacent surfaces.
Co-pending U.S. patent application Ser. No. 11/046,114 incorporated by reference hereinabove describes several CVD processes for forming chalcogenide, phase-change, and electrical switching materials. In one example, tris(dimethylamino)antimony (Sb(N(CH3)2)3), diisopropyltellurium (Te(CH(CH3)2)2) and isobutylgermane, (H3Ge(i-C4H9)) were used as precursors for Sb, Te, and Ge, respectively, to form Ge—Sb—Te alloys. The precursors were placed in separate bubblers and delivered in vapor phase form with a carrier gas to a heated substrate in a CVD process. The chemical formulas of the precursors are shown in
To further improve the utility of CVD as a deposition method for forming programmable resistance and electrical switching materials, it is desirable to achieve a degree of control over the microstructure of the deposition product. The deposition product 150 shown in
In this invention, deposition of active materials, including programmable resistance materials and electrical switching materials, is controlled through the use of a seed layer. The seed layer is formed on a deposition surface or within an opening prior to deposition of the active material. The seed layer functions as a template that directs the growth of the active material. By controlling the characteristics of the seed layer (composition, crystal size, crystal structure, coverage etc.), the instant inventors have discovered that the crystal size and/or crystallographic structure of the active material can be influenced. In particular, use of a seed layer permits a reduction in crystal size of the active material and results in a finer crystallinity that facilitates unobstructed formation of the active material within openings over a wider range of deposition conditions. The seed layer may also direct growth away from the sidewalls of an opening to prevent blockage that impedes formation of the active material in the deeper portions of the opening. Use of a seed layer thus promotes growth of the active material from the bottom or recessed portions of an opening and minimizes the occurrence of voids or other defects within the opening. Greater conformality and uniformity of fill can be achieved as a result.
In one embodiment of the instant invention, the seed layer is formed at the bottom of an opening and its presence creates a preferential tendency for subsequent deposition of an active material from a vapor phase growth environment to occur on or near the seed layer toward the bottom of the opening. Preferential formation of the active material in the deeper, recessed portions of an opening promotes complete filling of an opening and diminishes complications that occur when the active material preferential forms on the walls of the opening or at the top of the opening. Preferential formation on the walls or top of an opening impedes access of vapor phase deposition species to the underlying lower portions of the opening and leads to the development of pores, keyholes or gaps within the active material in the opening as described hereinabove.
In another embodiment of the instant invention, the seed layer promotes the formation of the active material with a reduced crystallite size. In this embodiment, the seed layer promotes the formation of active material with a finer grain size and smaller average crystal dimensions than would occur from a given set of growth conditions in the absence of the seed layer. Finer crystallinity facilitates formation of the active material in openings with reduced dimensions and promotes a denser, more continuous filling of openings. The crystallite size of a deposited material depends in part on the relative rates of nucleation and growth. Nucleation refers to the formation of the initial mass of a new phase or material, while growth refers to enlargement of a nucleated phase or material through accumulation of additional mass on the surface of the nucleated phase or material. In the case of CVD deposition of a solid phase material, for example, nucleation corresponds to the initial formation of a solid phase from one or more vapor phase precursors and growth corresponds to the expansion of the initial nucleated solid phase through subsequent deposition of solid phase material on the surface of the initial nucleated solid phase. As a deposition reaction proceeds, the amount of material deposited can increase through addition of material to existing nucleated phases (growth-dominated process) or through the preferential formation of new nucleated phases with slow growth (nucleation-dominated process). If nucleation is energetically disfavored, deposition proceeds primarily through growth and the deposited material tends to have a coarser crystallinity with a larger average crystallite size and a smaller number of crystallites. If nucleation is promoted, in contrast, deposition occurs primarily through the nucleation of a larger number of crystallites, where only limited growth of each crystallite occurs. In one embodiment of the instant invention, finer crystallinity is achieved through enhancement of the rate of nucleation relative to the rate of growth of the active material by the seed layer. Nucleation may be promoted, for example, by the existence of a high concentration of nucleation sites on or within the seed layer. If nucleation sites associated with the seed layer are more numerous and/or more active than nucleation sites associated with the sidewall or bottom surfaces of an opening, the presence of a seed layer can promote smaller grain, more consistent thickness growth on surfaces where the seed layer is located.
In another embodiment of the instant invention, the seed layer regulates the phase or crystallographic structure of the deposited active material. The prevailing use of seed layers or seed crystals in the prior art is to facilitate the growth of a larger quantity of the seed material. In a typical scenario, a particular material may be difficult to grow heterogeneously (e.g. on a foreign material or substrate), but may readily grow homogeneously (e.g. on a seed crystal of the same material). In one embodiment of this application, nucleation of the material is energetically disfavored and growth is favored. As the material grows, it preferentially conforms to the crystal structure and composition of the seed layer. In one embodiment of the instant invention, in contrast, active material deposited on the seed layer has a different composition and/or different crystallographic structure than the seed layer.
The seed layer may be formed by any technique capable of at least partially covering the bottom or lower portion of an opening. The seed layer may be formed, for example, by sputtering, physical vapor deposition (PVD), CVD, electroplating, extrusion, or solution deposition. The active material may be deposited using the same or different technique as the seed layer. In a preferred embodiment, the seed layer is formed of a material or through a process that produces small crystallites of the seed layer to facilitate growth of the seed layer in openings with reduced dimensions.
In one embodiment, the seed layer provides continuous coverage of the underlying surface of a substrate or opening and the active material is deposited with controlled crystallinity directly thereon.
Since it is generally expected that subsequent deposition of the active material will preferentially occur on the initially deposited active material relative to the sidewalls of opening 215, growth of the active material occurs in a generally vertical direction from the bottom of the opening 215 to fill the opening 215. In one embodiment, active material 230 forms as a finely crystalline material with a crystal size that is smaller than would form on either top surface 216 of lower conductive layer 205 or surfaces 212 or 214 of dielectric layer 210.
In another embodiment, the seed layer is formed as discrete regions on the substrate or underlying surface of the opening that provide non-contiguous coverage. In this embodiment, the seed layer provides incomplete coverage of its underlying surface and the active material initially forms preferentially along the surface of the seed layer.
A noteworthy feature of the seed-assisted deposition processes depicted in
The aspect ratio of opening 215 may be defined as the ratio of the normal dimension of the opening to the lateral dimension of the opening. The normal dimension of opening 215 is generally the physical dimension of the opening perpendicular to substrate 202 (e.g. height dimension) and the lateral dimension of opening 215 is generally a cross-sectional dimension of the opening in a direction parallel to substrate 202 (e.g. width dimension). In
In one embodiment of the instant invention, the normal dimension of opening 215 is at least 100 Å. In another embodiment of the instant invention, the normal dimension of opening 215 is at least 500 Å. In yet another embodiment of the instant invention, the normal dimension of opening 215 is at least 1000 Å. In one embodiment of the instant invention, the lateral dimension of opening 215 is less than 1000 Å. In another embodiment of the instant invention, the lateral dimension of opening 215 is less than 500 Å. In yet another embodiment of the instant invention, the lateral dimension of opening 215 is less than 300 Å. In one embodiment of the instant invention, the aspect ratio of opening 215 is at least 0.5:1. In another embodiment of the instant invention, the aspect ratio of opening 215 is at least 1:1. In yet another embodiment of the instant invention, the aspect ratio of opening 215 is at least 2:1. In a further embodiment of the instant invention, the aspect ratio of opening 215 is at least 3:1.
In this example, seed-assisted CVD deposition of a Ge—Sb—Te alloy is demonstrated. The deposition occurred on the SiO2 surface layer of a silicon wafer. The SiO2 surface layer had a thickness of 372.3 nm. A 100 Å thick seed layer of Ge2Sb2Te5 was formed on the SiO2 surface layer using a sputtering process. The wafer was then placed in a CVD deposition chamber for deposition of an active material from vapor phase precursors of Ge, Sb, and Te. Tris(dimethylamino)antimony (Sb(N(CH3)2)3) was used as the antimony (Sb) precursor, diisopropyltellurium (Te(CH(CH3)2)2) was used as the tellurium (Te), and t-butylgermane (H3Ge(C(CH3)3) was used as the germanium (Ge) precursor. The molecular forms of the three precursors are shown in
The Ge-precursor, Sb-precursor and Te-precursor were placed in separate bubblers heated to 30° C. and delivered to the CVD reactor through separate feed lines, heated to 70° C. Nitrogen was bubbled through the Sb-precursor bubbler at a flow rate of 200 sccm to produce a gas stream containing the Sb-precursor in a vapor phase form diluted in nitrogen. No further dilution was used. Nitrogen was bubbled through the Te-precursor bubbler at a flow rate of 100 sccm to produce a gas stream containing the Te-precursor in a vapor phase form diluted in Nitrogen. No further dilution was used. The Ge-precursor was placed in a separate bubbler. 50 sccm of nitrogen was bubbled through the Ge-precursor bubbler to provide a gas stream containing the Ge-precursor in a vapor phase form diluted in He. No further dilution was used.
During the deposition, 1 slm of Hydrogen was delivered into the chamber and 1 slm of nitrogen was delivered from below the substrate through the backfill line. The total pressure in the CVD reactor during deposition was approximately 40 Torr. The substrate was heated to 375° C. during the CVD reaction. The reaction was permitted to run for 1.5 minutes and on conclusion of the reaction, a film having a thickness ranging from about 59 nm to about 67 nm had been prepared on the substrate.
Elemental analysis of active material 320 was completed using energy dispersive spectroscopy (EDS). The EDS results indicated that the ratio of Ge:Sb:Te in active material 320 was 37:30:33, thus indicating a Ge37Sb30Te33 stoichiometric composition. The results indicate that seed layer 315 and active material 320 differ in composition and demonstrate the ability of seed layer 315 to influence the composition of the deposited material. The results also demonstrate the ability to form chalcogenide materials through a seeded deposition process.
In this example, seeded deposition of an active material in an opening of an operable device is demonstrated and performance characteristics of the device are presented.
The results shown in
This example demonstrates that seeded growth of an active material according to the instant invention provides a fully functional active material that exhibits electrical switching and phase-change operation.
Although the foregoing has described the seeded deposition of active materials in openings, analogous principles apply to the seeded deposition of other types of materials in openings. It is frequently desirable, for example, to deposit electrodes in high aspect ratio openings to achieve reduced contact area. (See U.S. patent application Ser. No. 12/113,566, the disclosure of which is incorporated by reference in its entirety herein.) Small electrode contact area is beneficial because it leads to a reduction in the programming current of phase-change materials. In accordance with the instant invention, formation of a seed layer in the recessed portion of an opening facilitates continuous and uniform deposition of an electrode material within the opening.
Those skilled in the art will appreciate that the methods and designs described above have additional applications and that the relevant applications are not limited to those specifically recited above. Also, the present invention may be embodied in other specific forms without departing from the essential characteristics as described herein. The embodiments described above are to be considered in all respects as illustrative only and not restrictive in any manner.