US20090014206A1 - Printed wiring board and electronic apparatus including same - Google Patents
Printed wiring board and electronic apparatus including same Download PDFInfo
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- US20090014206A1 US20090014206A1 US12/170,894 US17089408A US2009014206A1 US 20090014206 A1 US20090014206 A1 US 20090014206A1 US 17089408 A US17089408 A US 17089408A US 2009014206 A1 US2009014206 A1 US 2009014206A1
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- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 claims abstract description 167
- 238000000034 method Methods 0.000 claims description 4
- 239000004020 conductor Substances 0.000 claims description 2
- 230000005540 biological transmission Effects 0.000 description 39
- 230000000694 effects Effects 0.000 description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 5
- 229910052802 copper Inorganic materials 0.000 description 5
- 239000010949 copper Substances 0.000 description 5
- 239000011162 core material Substances 0.000 description 5
- 230000008054 signal transmission Effects 0.000 description 5
- 230000002411 adverse Effects 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 230000015556 catabolic process Effects 0.000 description 3
- 238000006731 degradation reaction Methods 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 239000003365 glass fiber Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
- H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
- H05K1/114—Pad being close to via, but not surrounding the via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
- H05K1/0219—Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09218—Conductive traces
- H05K2201/09236—Parallel layout
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10734—Ball grid array [BGA]; Bump grid array
Definitions
- This patent specification relates to a printed wiring board and an electronic apparatus including the printed wiring board, and more particularly, to a multilayer printed wiring board with a layout of vias that connect layers and pads for mounting electrical components, and an electronic apparatus including the above-described printed wiring board.
- the structure of the PBW may be complex due to increases in density and number of layers of the PWB.
- return current paths each of which extends along corresponding signal traces may not be secured. Therefore, there is a concern that waveforms of the signals may be distorted, which can adversely affect reliability of operation of circuits or electronic components mounted on the PWB.
- a related-art PWB for transmitting high-speed signals includes power patterns for power having rather stable potential and ground patterns for grounding the power, and the power patterns and the ground patterns of the related-art PWB are arranged in proximity to signal trace patterns for high frequency signals. Further, metal shielding plates may also be used to cover the PWB.
- a connector-conversion adapter for CD-ROM device employs a PWB having the above-described construction so that a positioning hole of the PWB may be formed according to a through-hole structure and a metal film that forms the positioning hole may be connected to multiple ground patterns.
- the metal film forming a part of the through-hole structure of the CD-ROM device is connected to three ground patterns, which have been separately connected, so that the metal film of the through-hole structure may be included in the ground patterns.
- multilayer PWBs for carrying high-speed signals include a power layer that holds rather stable potential and a ground layer that is arranged in proximity to a layer having signal traces for high frequency signals so as to secure the return current paths.
- the ground pattern may be provided on a back side of the PWB.
- the ground pattern may be provided on a second, intermediate layer, which is an internal conductive layer.
- waveforms may degrade during signal transmission.
- signals that are transmitted at speeds of Gbps travel over an inappropriate layout of ground of a PWB
- wiring delay and potential difference may be caused due to inductance in a lead wire between a ground pad of an electronic component and a via connecting to an inner layer ground pattern. Consequently, high speed differential signal traces on the PWB may experience increased loss of fidelity to waveforms in signal transmission in the high-frequency band, and therefore the output waveforms may be degraded and not have fidelity in signal transmission.
- the ground can be made stronger but the inductance from the ground pad to the through hole cannot be removed.
- Example aspects of the present invention provide a printed wiring board that can reduce inductance in transmission through a lead wire of an electrical component from a ground pad thereof to an inner layer ground pattern through a via and obtain equilibrium of high-speed differential signals travels on the printed wiring board.
- a printed wiring board includes a pair of signal pads including a first signal pad and a second signal pad formed at a corresponding end of a pair of signal trace patterns on a front side thereof and configured to transmit differential signals, a ground pad formed at a position in proximity to the pair of signal pads, and a via configured to connect the ground pad to a ground pattern formed either on a back side or on an inner layer of the printed wiring board directly or through a lead wire led out from the ground pad.
- the via is substantially equidistant from the first signal pad and the second signal pad.
- the via may be substantially equidistant from the first signal pad, the second signal pad, and the ground pad, and connected to the ground pad through the lead wire.
- Both a first distance between the first signal pad and the via and a second distance between the second signal pad and the via may correspond to (1/ ⁇ 2) times a pitch between the first signal pad and the second signal pad.
- a third distance between the ground pad and the via may correspond to (1/ ⁇ 2) times a pitch between the first signal pad and the second signal pad.
- the ground pad may include multiple ground pads and the lead wire may include multiple lead wires corresponding to the multiple ground pads.
- the via may be substantially equidistant from the first signal pad, the second signal pad, and the multiple ground pads, and connected to each of the ground pads through each of the corresponding lead wires.
- the via may be substantially equidistant from the first signal pad, the second signal pad, and the multiple ground pads, and connected to each of the ground pads through each of the corresponding lead wires.
- the ground pad may include multiple ground pads
- the lead wire may include multiple lead wires
- the via may include multiple vias configured to connect each of the multiple ground pads through each of the corresponding lead wires to the ground pattern formed either on the back side or on the inner layer of the printed wiring board through each of the lead wires led out from the corresponding ground pad.
- the first via of the multiple vias may be located closest to the first signal pad by a first distance and a second via of the multiple vias may be located closest to the second signal pad by a second distance substantially equal to the first distance.
- the first via closest to the first signal pad may be connected to a first ground pad of the multiple ground pads and the second via closest to the second signal pad is connected to a second ground pad of the multiple ground pads.
- the first via may be separated from the first ground pad by a third distance and the second via separated from the second ground pad by a fourth distance substantially equal to the third distance.
- Both the first distance and the second distance may correspond to (1/ ⁇ 2) times a pitch between the first signal pad and the second signal pad.
- Both the third distance and the fourth distance may correspond to (1/ ⁇ 2) times the pitch between the first signal pad and the second signal pad.
- Multiple pads including the first signal pad, the second signal pad, and the ground pad may be arranged in a zigzag line equidistant from each other.
- Multiple pads including the first signal pad, the second signal pad, and the ground pad may be arranged in a square-shaped grid equidistant from each other.
- Multiple pads including the first signal pad, the second signal pad, and the ground pad, may be formed as a pad group for mounting an electronic component with a differential signal terminal.
- the via may be formed as a via hole by a through-hole process.
- the via may be formed as a conductive via including a conductive material.
- the ground pattern may extend immediately below the ground pad.
- an electronic apparatus includes the above-described printing wiring board.
- FIG. 1 is a cross sectional view of an example structure of a four-layer printed wiring board according to at least one exemplary embodiment of this patent application;
- FIG. 2 is a partial cross sectional view of the four-layer printed wiring board of FIG. 1 ;
- FIG. 3 is an example of the printed wiring board of FIG. 1 connected to another printed wiring board in an electronic apparatus;
- FIG. 4 is an example pattern layout of the printed wiring board of FIG. 3 ;
- FIG. 5 is a schematic configuration of a multilayer printed wiring board according to a first exemplary embodiment of this patent specification
- FIG. 6 is a schematic structure of a measuring system for measuring actual values of loss in transmission on signal traces of high-speed differential signals
- FIG. 7 is a graph showing frequency characteristics indicating losses in transmission on signal traces of high-speed differential signals
- FIG. 8 is a graph showing observed relations of characteristics between frequency and loss in transmission on signal traces of high-speed differential signals with different distances between a ground pad and a via;
- FIG. 9 is a schematic configuration of a multilayer printed wiring board according to a second exemplary embodiment of this patent specification.
- FIG. 10 is a schematic configuration of a multilayer printed wiring board according to a third exemplary embodiment of this patent specification.
- FIG. 11 is a schematic configuration of a multilayer printed wiring board according to a fourth exemplary embodiment of this patent specification.
- FIG. 12 is a schematic configuration of a multilayer printed wiring board according to a fifth exemplary embodiment of this patent specification.
- FIG. 13 is a schematic configuration of a multilayer printed wiring board according to a sixth exemplary embodiment of this patent specification.
- FIG. 14 is a schematic configuration of a multilayer printed wiring board according to a seventh exemplary embodiment of this patent specification.
- FIG. 1 illustrates a cross sectional view of an example structure of a four-layer PWB
- FIG. 2 illustrates a partial cross sectional view of the PWB having a differential signal pattern and an example size of a ground pattern or ground plane corresponding to the differential signal pattern.
- a multilayer PWB 10 includes a thin copper plate 1 as a first layer, a conductive pattern 2 as a second layer, a conductive pattern 3 as a third layer, a thin copper plate 4 as a fourth layer, a core material 5 , and a prepreg 6 .
- the core material 5 has a thickness of from approximately 35 ⁇ m to approximately 60 ⁇ m.
- the conductive patterns 2 and 3 are formed respectively on front and back sides of the core material 5 of the multilayer PWB 10 .
- the prepreg 6 corresponds to a partially-cured thermosetting insulator having a thickness of from approximately 35 ⁇ m to approximately 60 ⁇ m.
- the prepreg 6 may include glass fibers or be formed as film.
- the prepreg 6 having the thin copper plate 1 as the first layer thereon is provided on a front side of the core material 5 of the PWB 10 . Further, the prepreg 6 having the thin copper plate 4 as the fourth layer thereon is provided on a back side of the core material 5 of the PWB 10 .
- the thin copper plate 1 forming the first layer of the PWB 10 includes a pair of high differential signal trace patterns 16 .
- Each pattern of the pair of high differential signal trace patterns 16 has a width “W” and allows a high frequency current to flow into the ground pattern 7 included in the second layer that is strongly bonded due to capacity and inductivity, as shown in FIG. 2 .
- the high frequency current flows immediately below the pair of high differential signal trace patterns 16 in the width “W”, where the impedance of the high frequency current is least.
- a current that flows expanding from a region immediately below the pair of high differential signal trace patterns 16 due to complex electrical factors resides in the actual PWB 10 , and therefore current loop may increase to adversely affect the operations of the PWB 10 .
- a ground pattern with respect to a pair of differential signal trace patterns has a width three times greater than a width of a differential signal pattern. It is also preferable to provide a gap of 1 W between the pair of differential signal trace patterns each having a trace width W and to provide the ground pattern having a distance greater than the trace width W on both sides of the trace. It is further preferable for the differential signal trace pattern to secure a gap of 2 W or greater from another signal trace pattern.
- PWBs such as Serial-ATA and PCI-Express, both of which employing a high speed differential signal transmission system, handle high speed signals at Gbps order and further increases their use recently. It is important for such PWB to provide an appropriate pin assignment for sophisticated electronic components to mount thereon.
- electronic components pins or terminals for high-speed differential signals and pins for ground are generally assigned close to each other. For example, in signals used in the PCI-Express standard, data rate corresponds to 2.5 GBps (basic frequency: 1.25 GHzk) and a PWB and electronic components mounted on the PWB are required to perform stable, high speed operations.
- FIG. 3 illustrates an example of the PWB 10 connected to a different PWB 14 .
- the electronic apparatus 30 can be any apparatus or system that employ PWBs such as the PWBs 10 and 14 .
- the PWB 10 of the electronic apparatus 30 includes an electronic component 11 , a slot connector 12 , and the pair of high speed differential signal trace patterns 16
- the PWB 14 includes a card edge connector 13 , an electronic component 15 , and the pair of high speed differential signal trace patterns 16 .
- the slot connector 12 mounted on the PWB 10 and the card edge connector 13 mounted on the PWB 14 are engaged to connect the PWB 10 and the PWB 14 . Accordingly, the PWB 10 , the pair of high speed differential signal trace patterns 16 on the PWB 14 , the slot connector 12 , and the card edge connector 13 are electrically connected between the electronic component 11 mounted on the PWB 10 and the electronic component 15 mounted on the PWB 14 . With the above-described connection of the PWB 10 and the PWB 14 , signals may be transmitted and received through the high speed differential signal transmission system or method.
- FIG. 4 illustrates an example pattern layout of the PWB 10 of FIG. 3 .
- FIG. 4 shows an example pattern layout of pads for an electronic component and signal line patterns formed on the front side of the PWB 10 .
- the pattern layout is formed in proximity to an area on which the electronic component having a BGA (Ball Grid Array) terminal group is mounted. Vias to an inner layer ground pattern and wiring from the vias to the pads are omitted in FIG. 4 .
- the PWB 10 of FIG. 4 includes the pair of high differential signal traces 16 and a pad group 21 for mounting the electronic component 11 .
- the pad group 21 is formed by multiple pads and includes a pair of signal pads 22 for transmission of high-speed differential signals.
- the pair of high differential signal traces 16 and the pair of pads 22 are integrally formed and electrically connected to each other.
- the pads of the pad group 21 on the PWB 10 are respectively assigned to signals corresponding to the pin assignment of the electronic component 11 .
- the pair of signal pads 22 for high-speed differential signals are located adjacent to or in proximity to the pads for ground or ground pads.
- respective lead wires are led out from the ground pads to connect the ground pads to a stable inner layer ground pattern.
- a via is arranged at one end of each lead wire so as to ground power through the via to the inner layer ground pattern.
- Each integrated electronic component or simply referred to as “electronic component” includes a group of BGA terminals such as the pad group 21 of FIG. 4 .
- Each pitch between pads for individual terminals arranged in a grid pattern is set to “d” mm.
- FIG. 5 a schematic structure of a multilayer printed wiring board or PWB 100 according to a first exemplary embodiment of this patent specification is described.
- FIG. 5 illustrates an enlarged view of a layout of a group of pads for mounting electronic components on the PWB 100 , which serves as a target board to be measured by a measuring instrument.
- the PWB 100 includes multiple pads for ground (hereinafter, each referred to as a “ground pad”), multiple pads for high-speed differential signals (hereinafter, each referred to as a “signal pad”), and multiple vias.
- the PWB 100 shown in FIG. 5 includes, on a layout, a pad group 110 , a pair of transmission line patterns or signal trace patterns 112 a and 112 b, ground pads 113 a and 113 b, lead wires 114 a and 114 b, and vias 115 a and 115 b.
- the pad group 110 includes a pair of signal pads for high-speed differential signals, which are a first signal pad 111 a and a second signal pad 111 b, and the ground pads 113 a and 113 b.
- the first signal pad 111 a and the second signal pad 111 b are formed at a corresponding end of the pair of the signal trace patterns 112 a and 112 b, respectively, for transmitting high-speed differential signals and are aligned in an endmost line of the pads of the pad group 110 .
- the first signal pad 111 a for high-speed differential signals is connected to the signal trace pattern 112 a
- the second signal pad 111 b for high-speed differential signals is connected to the signal trace pattern 112 b.
- a distance “d” between adjacent pads is set to 1 mm.
- the pair of signal trace patterns 112 a and 112 b correspond to high speed differential signal paths on the PWB 100 .
- the ground pads 113 a and 113 b are located in proximity to each other and next to the first signal pad 111 a and second signal pad 111 b for high-speed differential signals in the endmost line of the pads of the pad group 110 on the PWB 100 . Specifically, the ground pad 113 a resides next to the first signal pad 111 a for high-speed differential signals and the ground pad 113 b resides next to the second signal pad 111 b for high-speed differential signals in the endmost line.
- the lead wires 114 a and 114 b are led out from the ground pads 113 a and 113 b, respectively.
- One end of the lead wire 114 a is connected to the ground pad 113 a, and the other end of the lead wire 114 a is connected to the via 115 a.
- one end of the lead wire 114 b is connected to the ground pad 113 b, and the other end of the lead wire 114 b is connected to the via 115 b.
- Each of the vias 115 a and 115 b runs across a thickness of the PWB 100 , so that a lower end of each of the vias 115 a and 115 b can be connected to an inner layer ground pattern, not shown.
- inductance of a lead wire of an electronic component from a ground pad thereof to the inner layer ground pattern through a via can be reduced and equilibrium of high-speed differential signals can be obtained.
- the inner layer ground pattern is provided on an inner layer that is located in proximity to a front surface conductive layer. That is, the inner layer ground pattern is provided close to but sufficiently spaced apart from a given area onto which the pair of signal trace patterns 112 a and 112 b, the first signal pad 111 a, the second signal pad 111 b, and the vias 115 a and 115 b are formed to flow high frequency signals. If necessary, the lead wires 114 a and 114 b, and the ground pads 113 a and 113 b are also projected to the given area.
- each pitch between the multiple pads of the pad group 110 is set to “d” mm.
- a distance “a0” between the first signal pad 111 a for high-speed differential signals and the via 115 a and a distance “b0” between the second signal pad 111 b for high-speed differential signals and the via 115 b are designed to be substantially equal to each other.
- a length or distance “X” of the lead wire 114 a led from the ground pad 113 a to the via 115 a and a length or distance “Y” of the lead wire 114 b led from the ground pad 113 b to the via 115 b are also set to be substantially equal to each other.
- the vias 115 a and 115 b are arranged respectively at positions where the distances “a0”, “b0”, “X”, and “Y” satisfy a relation expressed as “d/ ⁇ 2 (mm)”, which corresponds, for example, to (1/ ⁇ 2) times the distance “d” between the first signal pad 111 a and the second signal pad 111 b.
- the return current paths are elements to ensure the equilibrium of the high-speed differential signals.
- the return current of the signal trace pattern 112 a may flow on the inner layer ground pattern disposed immediately below the signal trace pattern 112 a to reach a position immediately below the first signal pad 111 a for high-speed differential signals.
- the return current of the signal trace pattern 112 a may further flow from the first signal pad 111 a for high-speed differential signals through the via 115 a that is connected to the inner layer ground pattern and through the lead wire 114 a to the ground pad 113 a.
- the return current of the signal trace pattern 112 b may flow on the inner layer ground pattern disposed immediately below the signal trace pattern 112 b to reach a position immediately below the second signal pad 111 b for high-speed differential signals.
- the return current of the signal trace pattern 112 b may further flow from the second signal pad 111 b for high-speed differential signals through the via 115 b that is connected to the inner layer ground pattern and through the lead wire 114 b to the ground pad 113 b.
- the distance “a0” between the first signal pad 111 a for high-speed differential signals and the via 115 a and the distance “b0” between the second signal pad 111 b for high-speed differential signals and the via 115 b are set to be substantially equal to each other.
- the distance “X” of the lead wire 114 a between the ground pad 113 a and the via 115 a and the distance “Y” of the lead wire 114 b between the ground pad 113 b and the via 115 b are also set to be substantially equal to each other in the layout on the PWB 100 according to the first exemplary embodiment of this patent specification.
- the inventors of the present invention studied and evaluated effects on output waveforms.
- the inventors used various target boards 60 to evaluate the output waveforms of loss-frequency under the condition of the structure according to the first exemplary embodiment in which the distances or lengths of the lead wires between the ground pads and the vias connected to the inner layer ground pattern are substantially equal to each other and under the condition in which the path lengths of return current are different.
- the target boards 60 used for the tests were a printed wiring board having a pad group similar to that shown in FIG. 5 . That is, each of the target boards 60 had a pad group including multiple pads with the distance “d” of 1 mm as shown in FIG. 5 .
- the target boards 60 had the identical distance “X” of the lead wire between the ground pad and the via connected to the inner layer ground pattern.
- the distance “X” on the target boards 60 was set to 0.7 mm, which corresponds to 1/ ⁇ 2.
- the target boards 60 had the various distances “Y” of the lead wire between the ground pad and the via connected to the inner layer ground pattern.
- the distance “Y” of one of the target boards 60 was set to 0.7 mm, which also corresponds to 1/ ⁇ 2.
- the distances “Y” of the other target boards 60 were set to various values each greater than 0.7 mm.
- FIG. 6 illustrates a measuring instrument or system for measuring actual values of losses in transmission on signal traces of high-speed differential signals.
- a measuring instrument 61 shown in FIG. 6 may be any kind of device or instrument capable of measuring and obtaining actual values of affects on waveforms output from a printed wiring board connected to the measuring instrument 61 , such as a vector network analyzer. Cables 62 of the measuring instrument 61 are connected respectively to the ends of signal trace patterns for high-speed differential signals on one of the target boards 60 . Cables 63 of the measuring instrument 61 are connected respectively to signal pads for high-speed differential signals on the target board 60 . With the above-described structure, the measuring instrument 61 can obtain mixed-mode scattering parameters (S-parameters) of the signal trace patterns of the transmission lines for high-speed differential signals on the target board 60 .
- S-parameters mixed-mode scattering parameters
- FIG. 7 illustrates a graph showing observed frequency characteristics with respect to transmission losses on high speed differential signal traces with the various distances “Y” from the ground pad to the via.
- a frequency characteristic A in a waveform shows the transmission loss of the target board 60 with the distance “X” of 0.7 mm and the distance “Y” of 0.7 mm
- a frequency characteristic B shows the transmission loss of the target board 60 with the distance “X” of 0.7 mm and the distance “Y” of 1.4 mm
- a frequency characteristic C shows the transmission loss of the target board 60 with the distance “X” of 0.7 mm and the distance “Y” of 3 mm
- a frequency characteristic D shows the transmission loss of the target board 60 with the distance “X” of 0.7 mm and the distance “Y” of 10 mm.
- the inventors found that the loss of the target board 60 increased as the distance “Y” of the lead wire became longer.
- the inventors also found that, when the distance or length of one lead wire was extremely long (for example, 10 mm), the loss abruptly increased around 4 GHz to 8 GHz.
- the inventors have confirmed that, when the target board 60 has the layout according to the first exemplary embodiment, sufficient transmission characteristics can be obtained.
- the equilibrium of the high-speed differential signals can be secured.
- the equilibrium of the high-speed differential signals can be secured when the distance “a0” between the first signal pad 111 a for high-speed differential signals and the via 115 a connected to the inner layer ground pattern and the distance “b0” between the second signal pad 111 b for high-speed differential signals and the via 115 b connected to the inner layer ground patterns are set to be substantially equal to each other and the distance “X” of the lead wire 114 a between the ground pad 113 a and the via 115 a and the distance “Y” of the lead wire 114 b between the ground pad 113 b and the via 115 b are also set to be substantially equal to each other. Accordingly, the distances “a0”, “b0”, “X”, and “Y” are set to be substantially equal to each other in the exemplary embodiments.
- the inventors of the present invention also studied and evaluated effects on transmission characteristics according to various path lengths of return current flowing on the pair of signal trace patterns 112 a and 112 b for high-speed differential signals while the lengths of adjacent paths are identical to each other, which is same as those of the first exemplary embodiment.
- the target boards 60 used in the tests substantially corresponded to the structure of the PWB 100 of FIG. 5 . Since the target boards 60 are substantially same as the PWB 100 , the elements and components of the target boards 60 may be denoted by the same reference numerals as those of the PWB 100 and the descriptions thereof are omitted or summarized.
- the tests were conducted to study the effects on transmission characteristics according to various path lengths of return current flowing on the pair of signal trace patterns 112 a and 112 b for high-speed differential signals while the lengths of adjacent paths are identical to each other.
- the pitch “d” of the pads in the pad group 110 of each target board 60 was set to 1 mm
- the distance “a0” between the first signal pad 111 a for high-speed differential signals and the via 115 a connected to the inner layer ground pattern and the distance “b0” between the second signal pad 111 b for high-speed differential signals and the via 115 b connected to the inner layer ground pattern were set to d/ ⁇ 2 mm to be set to be substantially equal to each other
- the distance “X” of the lead wire 114 a between the ground pad 113 a and the via 115 a and the distance “Y” of the lead wire 114 b between the ground pad 113 b and the via 115 b were set to d/ ⁇ 2 mm to be set to be substantially
- FIG. 8 illustrates a graph showing observed frequency characteristics with respect to transmission losses (combined differential-mode and common-mode scattering parameters or mixed-mode S-parameters) on high speed differential signal traces with the various distances “X” and “Y” from the ground pad to the via.
- the frequency characteristic A in a waveform shows the transmission loss of the target board 60 with the distance “X” of 0.7 mm and the distance “Y” of 0.7 mm as set in the previous test in reference to the graph of FIG. 7
- a frequency characteristic E shows the transmission loss of the target board 60 with the distance “X” of 1.4 mm and the distance “Y” of 1.4 mm
- a frequency characteristic F shows the transmission loss of the target board 60 with the distance “X” of 3.0 mm and the distance “Y” of 3.0 mm.
- the inventors found that the transmission losses of the target board 60 increased in a frequency band higher than approximately 6 GHz as the distances “X” and “Y” of the lead wire from the ground pad to the via became longer.
- the inventors also found that that, when the distance or length of one lead wire became shorter, the inductance of the lead wire was reduced. Accordingly, the inventors have confirmed that, when the target board 60 has the layout according to the first exemplary embodiment, sufficient frequency characteristics of the high speed differential signal traces can be obtained.
- a preferable position of a via may be at a position where the distance or length of a lead wire between a ground pad and a via connected to an inner layer ground pattern may be shorter and path lengths of return current that flows on each signal trace pattern for high-speed differential signals may be substantially equal to each other.
- the path lengths of return current that flows on the pair of signal trace patterns 112 a and 112 b for high-speed differential signals are set to be identical so as to obtain or maintain the equilibrium of the high-speed differential signals.
- the layout of a PWB is not limited to the layout of the PWB 100 according to the first exemplary embodiment. That is, by setting a distance between a first signal pad for high-speed differential signals and a first via connected to a inner layer ground pattern and a distance between a second signal pad for high-speed differential signals and a second via connected to the inner layer ground pattern to be substantially equal to each other, the path lengths of return current that flows on each signal trace pattern for high-speed differential signals may be substantially equal to each other. By so doing, the equilibrium of the high-speed differential signals can be secured. Accordingly, different layouts can achieve a same effect as the layout of the PWB 100 .
- the pad group 110 provided for mounting electronic components is square-shaped and arranged in a grid pattern.
- the arrangement of the multiple pads of the pad group 110 is not limited to.
- the present patent specification can be applied to a pad group with multiple pads arranged in a zigzag manner in two dimensions.
- FIG. 9 a schematic structure of a multilayer PWB 100 A according to a second exemplary embodiment of this patent specification is described.
- FIG. 9 illustrates a partially enlarged view of a layout of a group of pads for mounting electronic components on the PWB 100 A.
- the structure of the PWB 100 A is basically same as the structure of the PWB 100 , except that vias on the PWB 100 A are arranged in zigzag lines or staggered lines sandwiching a line of pads. Therefore, some descriptions of elements and components of the PWB 100 A may be omitted or summarized.
- the PWB 100 A includes a pad group 150 , a pair of transmission line patterns or signal trace patterns 152 a and 152 b, ground pads 153 a through 153 d, lead wires 154 a through 154 d, and vias 155 a through 155 c.
- the pad group 150 includes a pair of signal pads for high-speed differential signals, which are a first signal pad 151 a and a second signal pad 151 b, and the ground pads 153 a through 153 d.
- the first signal pad 151 a and the second signal pad 151 b are formed at a corresponding end of each of the pair of signal trace patterns 152 a and 152 b, respectively, for transmitting high-speed differential signals and are aligned in an endmost line of the pads of the pad group 150 .
- the first signal pad 151 a for high-speed differential signals is connected to the signal trace pattern 152 a
- the second signal pad 151 b for high-speed differential signals is connected to the signal trace pattern 152 b.
- the pair of signal trace patterns 152 a and 152 b correspond to high speed differential signal paths on the PWB 100 A.
- the ground pads 153 a and 153 d are located in proximity to each other and next to the first signal pad 151 a and second signal pad 151 b for high-speed differential signals in the endmost line of the pads of the pad group 150 on the PWB 100 A. Specifically, the ground pad 153 a resides next to the first signal pad 151 a for high-speed differential signals and the ground pad 153 d resides next to the second signal pad 151 b for high-speed differential signals in the endmost line.
- the ground pads 153 b and 153 c are located in proximity to each other in a line next to the endmost line of the pads of the pad group 150 , and arranged next to the first signal pad 151 a and second signal pad 151 b for high-speed differential signals, respectively.
- the lead wires 154 a through 154 d are led out from the ground pads 153 a through 153 d, respectively.
- One end of the lead wire 154 a is connected to the ground pad 153 a, and the other end of the lead wire 154 a is connected to the via 155 a.
- one end of the lead wire 154 b is connected to the ground pad 153 b, and the other end of the lead wire 154 b is connected to the via 155 b.
- One end of the lead wire 154 c is connected to the ground pad 153 c, and the other end of the lead wire 154 c is connected to the via 155 b.
- One end of the lead wire 154 d is connected to the ground pad 153 d, and the other end of the lead wire 154 d is connected to the via 155 c.
- Each of the vias 155 a through 155 c runs across a thickness of the PWB 100 A, so that a lower end of each of the vias 155 a through 155 c can be connected to the inner layer ground pattern.
- each pitch between adjacent pads of the multiple pads of the pad group 150 is set to “d” mm. Further, a distance “a1” between the first signal pad 151 a for high-speed differential signals and the via 155 a and between the first signal pad 151 a for high-speed differential signals and the via 155 b and a distance “b1” between the second signal pad 151 b for high-speed differential signals and the via 155 b and between the second signal pad 151 b for high-speed differential signals and the via 155 c are substantially equal to each other.
- the vias 155 a through 155 c may be arranged respectively at positions where the distances “a1” and “b1” satisfy a relation expressed as “ ⁇ 2.5*d (mm)”, which corresponds, for example, to ⁇ 2.5 times the distance “d” between the first signal pad 151 a and the second signal pad 151 b.
- the lengths of return current paths with respect to the pair of signal trace patterns 152 a and 152 b for high-speed differential signals are substantially equal to each other so that the equilibrium of the high-speed differential signals can be obtained.
- FIG. 10 a schematic structure of a multilayer PWB 100 B according to a third exemplary embodiment of this patent specification is described.
- FIG. 10 illustrates a partially enlarged view of a layout of a group of pads for mounting electronic components on the PWB 100 B.
- the structure of the PWB 100 B is basically same as the structure of the PWB 100 A of FIG. 9 , except that the vias on the PWB 100 A are arranged in a grid pattern with straight lines and that the lengths of return current paths on which each signal trace pattern for high-speed differential signals flows are shorter than those in the PWB 100 A. Therefore, some descriptions of elements and components of the PWB 100 B may be omitted or summarized.
- the PWB 100 B includes the pad group 150 , the pair of transmission line patterns or signal trace patterns 152 a and 152 b, the ground pads 153 a through 153 d, the lead wires 154 a through 154 d, and vias 165 a through 165 c.
- the PWB 100 B includes the vias 165 a through 165 c.
- One end of the lead wire 154 a is connected to the ground pad 153 a, and the other end of the lead wire 154 a is connected to the via 165 a.
- One end of the lead wire 154 b is connected to the ground pad 153 b, and the other end of the lead wire 154 b is connected to the via 165 b.
- One end of the lead wire 154 c is connected to the ground pad 153 c, and the other end of the lead wire 154 c is connected to the via 165 b.
- One end of the lead wire 154 d is connected to the ground pad 153 d, and the other end of the lead wire 154 d is connected to the via 165 c.
- Each of the vias 165 a through 165 c runs across a thickness of the PWB 100 B, so that a lower end of each of the vias 165 a through 165 c can be connected to the inner layer ground pattern.
- each pitch between adjacent pads of the multiple pads of the pad group 150 is set to “d” mm. Further, a distance “a2” between the first signal pad 151 a for high-speed differential signals and the via 165 a and between the first signal pad 151 a for high-speed differential signals and the via 165 b and a distance “b2” between the second signal pad 151 b for high-speed differential signals and the via 165 b and between the second signal pad 151 b for high-speed differential signals and the via 165 c are substantially equal to each other.
- the vias 165 a through 165 c may be arranged respectively at positions where the distances “a2” and “b2” satisfy a relation expressed as “d/ ⁇ 2 (mm)”, which corresponds, for example, to 1/ ⁇ 2 times the distance “d” between the first signal pad 151 a and the second signal pad 151 b.
- the lengths of the lead wires 154 a through 154 d may be sufficiently short from a practical viewpoint, thereby reducing inductance in the lead wires 154 a through 154 d.
- the lengths of return current paths with respect to the pair of signal trace patterns 152 a and 152 b for high-speed differential signals can have the same lengths of return current paths, and therefore the equilibrium of the high-speed differential signals can be secured. Accordingly, degradation of transmission characteristics of a PWB can be prevented.
- the above-described layout is not limited to but the present patent specification can apply to a different layout.
- the present patent specification can apply to a layout in which a lead wire connects the via 165 a and the ground pad 153 b and another lead wire connects the via 165 c and the ground pad 153 c. This layout satisfies the above-described condition so as to achieve the above-described effect.
- FIG. 11 a schematic structure of a multilayer PWB 100 C according to a fourth exemplary embodiment of this patent specification is described.
- FIG. 11 illustrates a partially enlarged view of a layout of a group of pads for mounting electronic components on the PWB 100 C.
- the structure of the PWB 100 C is basically same as the structure of the PWB 100 A. Therefore, some descriptions of elements and components of the PWB 100 C may be omitted or summarized.
- a distance between a first signal pad for high-speed differential signals and a via and a distance between a second signal pad and a via are set to be substantially equal to each other.
- the PWB 100 C includes a pad group 170 , a pair of transmission line patterns or signal trace patterns 172 a and 172 b, ground pads 173 a and 173 b, lead wires 174 a and 174 b, and vias including a via 175 .
- the pad group 170 includes a pair of signal pads for high-speed differential signals, which are a first signal pad 171 a and a second signal pad 171 b, and the ground pads 173 a and 173 b.
- the first signal pad 171 a and the second signal pad 171 b are formed at a corresponding end of each of the pair of signal trace patterns 172 a and 172 b, respectively, for transmitting high-speed differential signals and are aligned in an endmost line of the pads of the pad group 170 .
- the first signal pad 171 a for high-speed differential signals is connected to the signal trace pattern 172 a
- the second signal pad 171 b for high-speed differential signals is connected to the signal trace pattern 172 b.
- the pair of signal trace patterns 172 a and 172 b correspond to high speed differential signal paths on the PWB 100 C.
- the ground pads 173 a and 173 b are located in proximity to each other in a line next to the endmost line of the pads of the pad group 170 , and arranged next to the first signal pad 171 a and second signal pad 171 b for high-speed differential signals, respectively.
- the lead wires 174 a and 174 b are led out from the ground pads 173 a and 173 b, respectively.
- One end of the lead wire 174 a is connected to the ground pad 173 a, and the other end of the lead wire 174 a is connected to the via 175 .
- one end of the lead wire 174 b is connected to the ground pad 173 b, and the other end of the lead wire 174 b is connected to the via 175 .
- the via 175 runs across a thickness of the PWB 100 C, so that a lower end of each of the via 175 can be connected to the inner layer ground pattern.
- each pitch between adjacent pads of the multiple pads of the pad group 170 is shown as “d” mm on FIG. 11 .
- each pitch between adjacent pads of the pad group 170 is set to 1 mm.
- a distance between the first signal pad 171 a for high-speed differential signals and the via 175 is set as a distance “a3” and a distance between the second signal pad 171 b for high-speed differential signals and the via 175 is set as a distance “b3.”
- the via 175 may be arranged at a position where the distances “a3” and “b3” satisfy a relation expressed as “ ⁇ 2.5*d (mm)”, which corresponds, for example, to ⁇ 2.5 times the distance “d” between the first signal pad 171 a and the second signal pad 171 b.
- the distance “a3” between the first signal pad 171 a for high-speed differential signals and the via 175 connected to the inner layer ground pattern and the distance “b3” between the second signal pad 171 b for high-speed differential signals and the via 175 connected to the inner layer ground pattern are set to be substantially equal to each other, and are equidistant from the via 175 .
- the lengths of return current paths with respect to the pair of signal trace patterns 172 a and 172 b for high-speed differential signals may be substantially equal to each other so that the equilibrium of the high-speed differential signals can be obtained.
- the inductance in the lead wires 174 a and 174 b can be sufficiently reduced from a practical viewpoint.
- FIG. 12 a schematic structure of a multilayer PWB 100 D according to a fifth exemplary embodiment of this patent specification is described.
- FIG. 12 illustrates a partially enlarged view of a layout of a group of pads for mounting electronic components on the PWB 100 D.
- the structure of the PWB 100 D is basically same as the structure of the PWB 100 C of FIG. 11 , except that vias on the PWB 100 D are arranged in a grid pattern with straight lines and that the lengths of return current paths on which each signal trace pattern for high-speed differential signals flows are shorter than those in the PWB 100 C. Therefore, some descriptions of elements and components of the PWB 100 D may be omitted or summarized.
- the PWB 100 D includes the pad group 170 , the pair of transmission line patterns or signal trace patterns 172 a and 172 b, the ground pads 173 a and 173 b, the lead wires 174 a and 174 b, and a vias 185 .
- the PWB 100 D includes the via 185 .
- One end of the lead wire 174 a is connected to the ground pad 173 a, and the other end of the lead wire 174 a is connected to the via 185 .
- one end of the lead wire 174 b is connected to the ground pad 173 b, and the other end of the lead wire 174 b is connected to the via 185 .
- the via 185 runs across a thickness of the PWB 100 D, so that a lower end of each of the via 185 can be connected to the inner layer ground pattern.
- each pitch between adjacent pads of the multiple pads of the pad group 170 is set to “d” mm. Further, a distance between the first signal pad 171 a for high-speed differential signals and the via 185 is set as a distance “a4” and a distance between the second signal pad 171 b for high-speed differential signals and the via 185 is set as a distance “b4.”
- the distance “a4”, the distance “b4”, and the lengths of the lead wires 174 a and 174 b are set to be substantially equal to each other, and are equidistant from the via 185 .
- the via 185 is arranged at a position where the distances “a4” and “b4” and the lengths of the lead wires 174 a and 174 b satisfy a relation expressed as “d/ ⁇ 2 (mm)”, which corresponds, for example, to 1/ ⁇ 2 times the distance “d” between the first signal pad 171 a and the second signal pad 171 b.
- the lengths of the lead wires 174 a and 174 b may be sufficiently short, thereby reducing inductance in the lead wires 174 a and 174 b.
- the lengths of return current paths with respect to the pair of signal trace patterns 172 a and 172 b for high-speed differential signals can have the same lengths of return current paths, and therefore the equilibrium of the high-speed differential signals can be secured.
- FIG. 13 a schematic structure of a multilayer PWB 100 E according to a sixth exemplary embodiment of this patent specification is described.
- FIG. 13 illustrates a partially enlarged view of a layout of a group of pads for mounting electronic components on the PWB 100 E.
- the structure of the PWB 100 E is basically same as the structure of the PWB 100 C, except that one via is connected to a ground pad with a lead wire. Therefore, some descriptions of elements and components of the PWB 100 E may be omitted or summarized.
- a distance between a first signal pad for high-speed differential signals and a via and a distance between a second signal pad and a via are set to be substantially equal to each other.
- the PWB 100 E includes a pad group 190 , a pair of transmission line patterns or signal trace patterns 192 a and 192 b, a ground pad 193 , a lead wire 194 , and a via 195 A.
- the pad group 190 includes a pair of signal pads for high-speed differential signals, which are a first signal pad 191 a and a second signal pad 191 b, and the ground pad 193 .
- the first signal pad 191 a and the second signal pad 191 b are formed at a corresponding end of each of the pair of signal trace patterns 192 a and 192 b, respectively, for transmitting high-speed differential signals and are aligned in an endmost line of the pads of the pad group 190 .
- the first signal pad 191 a for high-speed differential signals is connected to the signal trace pattern 192 a
- the second signal pad 191 b for high-speed differential signals is connected to the signal trace pattern 192 b.
- the pair of signal trace patterns 192 a and 192 b correspond to high speed differential signal paths on the PWB 100 E.
- the ground pad 193 is located in a line next to the endmost line of the pads of the pad group 190 , and arranged next to the second signal pad 191 b for high-speed differential signals in FIG. 13 .
- the lead wire 194 are led out from the ground pad 193 .
- One end of the lead wire 194 is connected to the ground pad 193 , and the other end of the lead wire 194 is connected to the via 195 A.
- the via 195 A runs across a thickness of the PWB 100 E, so that a lower end of each of the via 195 A can be connected to the inner layer ground pattern.
- each pitch between adjacent pads of the multiple pads of the pad group 190 is shown as “d” mm in FIG. 13 .
- each pitch between adjacent pads of the pad group 190 is set to 1 mm.
- a distance between the first signal pad 191 a for high-speed differential signals and the via 195 A is set as a distance “a5” and a distance between the second signal pad 191 b for high-speed differential signals and the via 195 A is set as a distance “b5.”
- the via 195 A is arranged at a position where the distances “a5” and “b5” satisfy a relation expressed as “ ⁇ 2.5*d (mm)”, which corresponds, for example, to ⁇ 2.5 times the distance “d” between the first signal pad 191 a and the second signal pad 191 b.
- the lengths of return current paths with respect to the pair of signal trace patterns 192 a and 192 b for high-speed differential signals can have the same lengths of return current paths, and therefore the equilibrium of the high-speed differential signals can be secured.
- FIG. 14 a schematic structure of a multilayer PWB 100 F according to a seventh exemplary embodiment of this patent specification is described.
- FIG. 14 illustrates a partially enlarged view of a layout of a group of pads for mounting electronic components on the PWB 100 F.
- the structure of the PWB 100 F is basically same as the structure of the PWB 100 E, except that vias on the PWB 100 F are arranged in a straight line closer to the pads aligned in an endmost line, and that a length of a lead wire or a distance between a via and a ground pad is same as a distance between the via and a pad for high-speed differential signals. Therefore, some descriptions of elements and components of the PWB 100 F may be omitted or summarized.
- the PWB 100 F includes the pad group 190 , the pair of transmission line patterns or signal trace patterns 192 a and 192 b, the ground pad 193 , the lead wire 194 , and a vias 195 B.
- the PWB 100 F includes the via 195 B.
- One end of the lead wire 194 is connected to the ground pad 193 , and the other end of the lead wire 194 is connected to the via 195 B.
- the via 195 B runs across a thickness of the PWB 100 F, so that a lower end of each of the via 195 B can be connected to the inner layer ground pattern.
- each pitch between adjacent pads of the multiple pads of the pad group 190 is set to “d” mm. Further, a distance between the first signal pad 191 a for high-speed differential signals and the via 195 B that is led out from the ground pad 193 is set as a distance “a6” and a distance between the second signal pad 191 b for high-speed differential signals and the via 195 B is set as a distance “b6.”
- the via 195 B is arranged at a position where the distance or length of the lead wire 194 between the ground pad 193 and the via 195 B, the distances “a6” and “b6” satisfy a relation expressed as “d/ ⁇ 2 (mm)”, which corresponds, for example, to d/ ⁇ 2 times the distance “d” between the first signal pad 191 a and the second signal pad 191 b.
- the distance “a6” between the first signal pad 191 a for high-speed differential signals and the via 195 B connected to the inner layer ground pattern, the distance “b6” between the second signal pad 191 b for high-speed differential signals and the via 195 B connected to the inner layer ground pattern, and the lengths of the lead wire 194 may be set to be substantially equal to each other.
- the lengths of return current paths with respect to the pair of signal trace patterns 192 a and 192 b for high-speed differential signals may be substantially equal to each other so that the equilibrium of the high-speed differential signals can be obtained.
- the lengths of the lead wire 194 may be sufficiently short from a practical viewpoint, thereby reducing the inductance in the lead wire 194 .
- the loss of transmission in the high-frequency band of the high speed differential signal traces on the PWB due to the inductance can be reduced, thereby obtaining high quality in fidelity to output waveforms traveled through transmission lines or signal paths.
- the equilibrium of the high-speed differential signals can be obtained. Accordingly, high quality in fidelity to output waveforms traveled through transmission lines or signal paths can be obtained.
- the above-described exemplary embodiments include the pad group with multiple pads arranged to be square-shaped in a grid pattern.
- the arrangement of the multiple pads of the pad group is not limited to the square-shaped grid pattern.
- the multiple pads can be arranged in a zigzag or staggered pattern extending two-dimensionally.
- the pads on the printed wiring patterns according to the above-described exemplary embodiments are for BGA terminals.
- the type of the pads is not limited to the BGA terminal.
- the type of the pads can be for PGA (pin grid array) terminals.
- the pads for PGA terminals can be arranged to be square-shaped in the grid pattern, the zigzag pattern, etc.
- the via when the distance from the first signal pad for high-speed differential signals to the via that is connected to the inner layer ground pattern is set as a distance “a” and the distance from the second signal pad for high-speed differential signals to the via that is connected to the inner layer ground pattern is set as a distance “b”, the via may be located at a position in which the distances “a” and “b” may be rather short and substantially equal to each other and the distance or length of the lead wire from the via to the ground pad may also be rather short. Accordingly, high quality in fidelity to output waveforms traveled through transmission lines or signal traces can be obtained.
Abstract
Description
- This patent specification relates to a printed wiring board and an electronic apparatus including the printed wiring board, and more particularly, to a multilayer printed wiring board with a layout of vias that connect layers and pads for mounting electrical components, and an electronic apparatus including the above-described printed wiring board.
- Recently, signals that travel on a printed wiring board, or PWB, have been transmitted with smaller amplitude in a higher frequency band.
- When a PWB includes two or more layers or is otherwise multilayered, the structure of the PBW may be complex due to increases in density and number of layers of the PWB. In such PWB with a complex structure, return current paths each of which extends along corresponding signal traces may not be secured. Therefore, there is a concern that waveforms of the signals may be distorted, which can adversely affect reliability of operation of circuits or electronic components mounted on the PWB.
- A related-art PWB for transmitting high-speed signals includes power patterns for power having rather stable potential and ground patterns for grounding the power, and the power patterns and the ground patterns of the related-art PWB are arranged in proximity to signal trace patterns for high frequency signals. Further, metal shielding plates may also be used to cover the PWB.
- To prevent degradation of transmission quality of high-speed digital signals, a connector-conversion adapter for CD-ROM device employs a PWB having the above-described construction so that a positioning hole of the PWB may be formed according to a through-hole structure and a metal film that forms the positioning hole may be connected to multiple ground patterns. Specifically, the metal film forming a part of the through-hole structure of the CD-ROM device is connected to three ground patterns, which have been separately connected, so that the metal film of the through-hole structure may be included in the ground patterns. By so doing, a ground potential is enhanced to prevent high-speed digital signals from being degraded while being transmitted through the connector-conversion adapter.
- It is required that signals traveling over the PWB further increase their transmission speed. To meet such demand, recent PWBs intend to employ a transmission method for high-speed differential signals, such as Serial-ATA and PCI-Express. As noted above, for multilayer PWBS, the structure thereof has become more complex due to increases in the density and number of layers, and therefore it has been difficult to secure return current paths extending along respective signal traces, which can adversely affect the operating reliability of the circuits or electronic components mounted on the PWB.
- To eliminate the above-described drawbacks, multilayer PWBs for carrying high-speed signals include a power layer that holds rather stable potential and a ground layer that is arranged in proximity to a layer having signal traces for high frequency signals so as to secure the return current paths. When the PWB includes a double-sided structure, the ground pattern may be provided on a back side of the PWB. When the PWB is multilayered, the ground pattern may be provided on a second, intermediate layer, which is an internal conductive layer.
- With the above-described structure of the PWB, when the length of a lead pattern is long, waveforms may degrade during signal transmission. For example, when signals that are transmitted at speeds of Gbps travel over an inappropriate layout of ground of a PWB, wiring delay and potential difference may be caused due to inductance in a lead wire between a ground pad of an electronic component and a via connecting to an inner layer ground pattern. Consequently, high speed differential signal traces on the PWB may experience increased loss of fidelity to waveforms in signal transmission in the high-frequency band, and therefore the output waveforms may be degraded and not have fidelity in signal transmission.
- Further, regarding a distance from a lead or via to a trace pattern, when an extended end portion (including the lead wire or via) of a return current path with respect to a signal trace for high-speed differential signals is laid out carelessly, the equilibrium of high-speed differential signals may be lost, and therefore the quality or fidelity of the waveform may deteriorate.
- With the construction previously described, the ground can be made stronger but the inductance from the ground pad to the through hole cannot be removed.
- Example aspects of the present invention have been made in view of the above-described circumstances.
- Example aspects of the present invention provide a printed wiring board that can reduce inductance in transmission through a lead wire of an electrical component from a ground pad thereof to an inner layer ground pattern through a via and obtain equilibrium of high-speed differential signals travels on the printed wiring board.
- Other example aspects of the present invention provide an electronic apparatus that includes the above-described printed wiring board.
- In one example embodiment, a printed wiring board includes a pair of signal pads including a first signal pad and a second signal pad formed at a corresponding end of a pair of signal trace patterns on a front side thereof and configured to transmit differential signals, a ground pad formed at a position in proximity to the pair of signal pads, and a via configured to connect the ground pad to a ground pattern formed either on a back side or on an inner layer of the printed wiring board directly or through a lead wire led out from the ground pad. The via is substantially equidistant from the first signal pad and the second signal pad.
- The via may be substantially equidistant from the first signal pad, the second signal pad, and the ground pad, and connected to the ground pad through the lead wire.
- Both a first distance between the first signal pad and the via and a second distance between the second signal pad and the via may correspond to (1/√2) times a pitch between the first signal pad and the second signal pad.
- A third distance between the ground pad and the via may correspond to (1/√2) times a pitch between the first signal pad and the second signal pad.
- The ground pad may include multiple ground pads and the lead wire may include multiple lead wires corresponding to the multiple ground pads. The via may be substantially equidistant from the first signal pad, the second signal pad, and the multiple ground pads, and connected to each of the ground pads through each of the corresponding lead wires.
- The via may be substantially equidistant from the first signal pad, the second signal pad, and the multiple ground pads, and connected to each of the ground pads through each of the corresponding lead wires.
- The ground pad may include multiple ground pads, the lead wire may include multiple lead wires, and the via may include multiple vias configured to connect each of the multiple ground pads through each of the corresponding lead wires to the ground pattern formed either on the back side or on the inner layer of the printed wiring board through each of the lead wires led out from the corresponding ground pad. The first via of the multiple vias may be located closest to the first signal pad by a first distance and a second via of the multiple vias may be located closest to the second signal pad by a second distance substantially equal to the first distance.
- The first via closest to the first signal pad may be connected to a first ground pad of the multiple ground pads and the second via closest to the second signal pad is connected to a second ground pad of the multiple ground pads. The first via may be separated from the first ground pad by a third distance and the second via separated from the second ground pad by a fourth distance substantially equal to the third distance.
- Both the first distance and the second distance may correspond to (1/√2) times a pitch between the first signal pad and the second signal pad.
- Both the third distance and the fourth distance may correspond to (1/√2) times the pitch between the first signal pad and the second signal pad.
- Multiple pads including the first signal pad, the second signal pad, and the ground pad may be arranged in a zigzag line equidistant from each other.
- Multiple pads including the first signal pad, the second signal pad, and the ground pad may be arranged in a square-shaped grid equidistant from each other.
- Multiple pads, including the first signal pad, the second signal pad, and the ground pad, may be formed as a pad group for mounting an electronic component with a differential signal terminal.
- The via may be formed as a via hole by a through-hole process.
- The via may be formed as a conductive via including a conductive material.
- The ground pattern may extend immediately below the ground pad.
- Further, in one example embodiment, an electronic apparatus includes the above-described printing wiring board.
- A more complete appreciation of the disclosure and many of the attendant advantages thereof will be readily obtained as the same becomes better understood by reference to the following detailed description when considered in connection with the accompanying drawings, wherein:
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FIG. 1 is a cross sectional view of an example structure of a four-layer printed wiring board according to at least one exemplary embodiment of this patent application; -
FIG. 2 is a partial cross sectional view of the four-layer printed wiring board ofFIG. 1 ; -
FIG. 3 is an example of the printed wiring board ofFIG. 1 connected to another printed wiring board in an electronic apparatus; -
FIG. 4 is an example pattern layout of the printed wiring board ofFIG. 3 ; -
FIG. 5 is a schematic configuration of a multilayer printed wiring board according to a first exemplary embodiment of this patent specification; -
FIG. 6 is a schematic structure of a measuring system for measuring actual values of loss in transmission on signal traces of high-speed differential signals; -
FIG. 7 is a graph showing frequency characteristics indicating losses in transmission on signal traces of high-speed differential signals; -
FIG. 8 is a graph showing observed relations of characteristics between frequency and loss in transmission on signal traces of high-speed differential signals with different distances between a ground pad and a via; -
FIG. 9 is a schematic configuration of a multilayer printed wiring board according to a second exemplary embodiment of this patent specification; -
FIG. 10 is a schematic configuration of a multilayer printed wiring board according to a third exemplary embodiment of this patent specification; -
FIG. 11 is a schematic configuration of a multilayer printed wiring board according to a fourth exemplary embodiment of this patent specification; -
FIG. 12 is a schematic configuration of a multilayer printed wiring board according to a fifth exemplary embodiment of this patent specification; -
FIG. 13 is a schematic configuration of a multilayer printed wiring board according to a sixth exemplary embodiment of this patent specification; and -
FIG. 14 is a schematic configuration of a multilayer printed wiring board according to a seventh exemplary embodiment of this patent specification. - In describing example embodiments illustrated in the drawings, specific terminology is employed for the sake of clarity. However, the disclosure of this patent specification is not intended to be limited to the specific terminology so selected and it is to be understood that each specific element includes all technical equivalents that operate in a similar manner.
- Referring now to the drawings, wherein like reference numerals designate identical or corresponding parts throughout the several views, preferred embodiments of the present invention are described.
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FIG. 1 illustrates a cross sectional view of an example structure of a four-layer PWB, andFIG. 2 illustrates a partial cross sectional view of the PWB having a differential signal pattern and an example size of a ground pattern or ground plane corresponding to the differential signal pattern. - As shown in
FIG. 1 , amultilayer PWB 10 includes a thin copper plate 1 as a first layer, aconductive pattern 2 as a second layer, aconductive pattern 3 as a third layer, athin copper plate 4 as a fourth layer, acore material 5, and aprepreg 6. - The
core material 5 has a thickness of from approximately 35 μm to approximately 60 μm. Theconductive patterns core material 5 of themultilayer PWB 10. - The
prepreg 6 corresponds to a partially-cured thermosetting insulator having a thickness of from approximately 35 μm to approximately 60 μm. Alternatively, theprepreg 6 may include glass fibers or be formed as film. - The
prepreg 6 having the thin copper plate 1 as the first layer thereon is provided on a front side of thecore material 5 of thePWB 10. Further, theprepreg 6 having thethin copper plate 4 as the fourth layer thereon is provided on a back side of thecore material 5 of thePWB 10. - As shown in
FIGS. 1 and 2 , the thin copper plate 1 forming the first layer of thePWB 10 includes a pair of high differentialsignal trace patterns 16. Each pattern of the pair of high differentialsignal trace patterns 16 has a width “W” and allows a high frequency current to flow into theground pattern 7 included in the second layer that is strongly bonded due to capacity and inductivity, as shown inFIG. 2 . At this time, it is ideal that the high frequency current flows immediately below the pair of high differentialsignal trace patterns 16 in the width “W”, where the impedance of the high frequency current is least. However, a current that flows expanding from a region immediately below the pair of high differentialsignal trace patterns 16 due to complex electrical factors resides in theactual PWB 10, and therefore current loop may increase to adversely affect the operations of thePWB 10. - Therefore, it is generally preferable that a ground pattern with respect to a pair of differential signal trace patterns has a width three times greater than a width of a differential signal pattern. It is also preferable to provide a gap of 1 W between the pair of differential signal trace patterns each having a trace width W and to provide the ground pattern having a distance greater than the trace width W on both sides of the trace. It is further preferable for the differential signal trace pattern to secure a gap of 2 W or greater from another signal trace pattern.
- Beside the wiring of the signal trace patterns, a PWB itself needs some considerations. PWBs such as Serial-ATA and PCI-Express, both of which employing a high speed differential signal transmission system, handle high speed signals at Gbps order and further increases their use recently. It is important for such PWB to provide an appropriate pin assignment for sophisticated electronic components to mount thereon. Regarding electronic components, pins or terminals for high-speed differential signals and pins for ground are generally assigned close to each other. For example, in signals used in the PCI-Express standard, data rate corresponds to 2.5 GBps (basic frequency: 1.25 GHzk) and a PWB and electronic components mounted on the PWB are required to perform stable, high speed operations.
-
FIG. 3 illustrates an example of thePWB 10 connected to adifferent PWB 14. - In
FIG. 3 , electronic components are mounted on both of thePWBs electronic apparatus 30. Theelectronic apparatus 30 can be any apparatus or system that employ PWBs such as thePWBs - As shown in
FIG. 3 , thePWB 10 of theelectronic apparatus 30 includes anelectronic component 11, aslot connector 12, and the pair of high speed differentialsignal trace patterns 16, and thePWB 14 includes acard edge connector 13, anelectronic component 15, and the pair of high speed differentialsignal trace patterns 16. - The
slot connector 12 mounted on thePWB 10 and thecard edge connector 13 mounted on thePWB 14 are engaged to connect thePWB 10 and thePWB 14. Accordingly, thePWB 10, the pair of high speed differentialsignal trace patterns 16 on thePWB 14, theslot connector 12, and thecard edge connector 13 are electrically connected between theelectronic component 11 mounted on thePWB 10 and theelectronic component 15 mounted on thePWB 14. With the above-described connection of thePWB 10 and thePWB 14, signals may be transmitted and received through the high speed differential signal transmission system or method. -
FIG. 4 illustrates an example pattern layout of thePWB 10 ofFIG. 3 . Specifically,FIG. 4 shows an example pattern layout of pads for an electronic component and signal line patterns formed on the front side of thePWB 10. The pattern layout is formed in proximity to an area on which the electronic component having a BGA (Ball Grid Array) terminal group is mounted. Vias to an inner layer ground pattern and wiring from the vias to the pads are omitted inFIG. 4 . - The
PWB 10 ofFIG. 4 includes the pair of high differential signal traces 16 and apad group 21 for mounting theelectronic component 11. Thepad group 21 is formed by multiple pads and includes a pair ofsignal pads 22 for transmission of high-speed differential signals. The pair of high differential signal traces 16 and the pair ofpads 22 are integrally formed and electrically connected to each other. The pads of thepad group 21 on thePWB 10 are respectively assigned to signals corresponding to the pin assignment of theelectronic component 11. The pair ofsignal pads 22 for high-speed differential signals are located adjacent to or in proximity to the pads for ground or ground pads. - For grounding the
pad group 21 on thePWB 10, respective lead wires, not shown, are led out from the ground pads to connect the ground pads to a stable inner layer ground pattern. A via is arranged at one end of each lead wire so as to ground power through the via to the inner layer ground pattern. - As described above, when mounting high integration electronic components, it is general to draw or extend a small length of pattern from a pad (or a land for pin terminal) for the front side of the PWB to form a via so as to install wiring for grounding the power by the inner layer ground pattern.
- In the following exemplary embodiments of this patent specification, descriptions are given of integrated electronic components, each having high speed differential circuits. Each integrated electronic component or simply referred to as “electronic component” includes a group of BGA terminals such as the
pad group 21 ofFIG. 4 . Each pitch between pads for individual terminals arranged in a grid pattern is set to “d” mm. - Referring to
FIG. 5 , a schematic structure of a multilayer printed wiring board orPWB 100 according to a first exemplary embodiment of this patent specification is described. -
FIG. 5 illustrates an enlarged view of a layout of a group of pads for mounting electronic components on thePWB 100, which serves as a target board to be measured by a measuring instrument. - In
FIG. 5 , thePWB 100 includes multiple pads for ground (hereinafter, each referred to as a “ground pad”), multiple pads for high-speed differential signals (hereinafter, each referred to as a “signal pad”), and multiple vias. Specifically, thePWB 100 shown inFIG. 5 includes, on a layout, apad group 110, a pair of transmission line patterns or signaltrace patterns ground pads lead wires - The
pad group 110 includes a pair of signal pads for high-speed differential signals, which are afirst signal pad 111 a and asecond signal pad 111 b, and theground pads first signal pad 111 a and thesecond signal pad 111 b are formed at a corresponding end of the pair of thesignal trace patterns pad group 110. Thefirst signal pad 111 a for high-speed differential signals is connected to thesignal trace pattern 112 a, and thesecond signal pad 111 b for high-speed differential signals is connected to thesignal trace pattern 112 b. - In the
pad group 110 according to the first exemplary embodiment, a distance “d” between adjacent pads is set to 1 mm. - The pair of
signal trace patterns PWB 100. - The
ground pads first signal pad 111 a andsecond signal pad 111 b for high-speed differential signals in the endmost line of the pads of thepad group 110 on thePWB 100. Specifically, theground pad 113 a resides next to thefirst signal pad 111 a for high-speed differential signals and theground pad 113 b resides next to thesecond signal pad 111 b for high-speed differential signals in the endmost line. - The
lead wires ground pads lead wire 114 a is connected to theground pad 113 a, and the other end of thelead wire 114 a is connected to the via 115 a. Similarly, one end of thelead wire 114 b is connected to theground pad 113 b, and the other end of thelead wire 114 b is connected to the via 115 b. - Each of the
vias PWB 100, so that a lower end of each of thevias - With the above-described structure, inductance of a lead wire of an electronic component from a ground pad thereof to the inner layer ground pattern through a via can be reduced and equilibrium of high-speed differential signals can be obtained.
- Though not shown in
FIG. 5 , the inner layer ground pattern is provided on an inner layer that is located in proximity to a front surface conductive layer. That is, the inner layer ground pattern is provided close to but sufficiently spaced apart from a given area onto which the pair ofsignal trace patterns first signal pad 111 a, thesecond signal pad 111 b, and thevias lead wires ground pads - In the first exemplary embodiment of this patent specification, each pitch between the multiple pads of the
pad group 110 is set to “d” mm. Further, a distance “a0” between thefirst signal pad 111 a for high-speed differential signals and the via 115 a and a distance “b0” between thesecond signal pad 111 b for high-speed differential signals and the via 115 b are designed to be substantially equal to each other. Furthermore, a length or distance “X” of thelead wire 114 a led from theground pad 113 a to the via 115 a and a length or distance “Y” of thelead wire 114 b led from theground pad 113 b to the via 115 b are also set to be substantially equal to each other. - Specifically, when the pitch of adjacent pads of the
pad group 110 is “d” mm, thevias first signal pad 111 a and thesecond signal pad 111 b. - Next, a description is given of return current paths of the pair of
signal trace patterns signal trace pattern 112 a may flow on the inner layer ground pattern disposed immediately below thesignal trace pattern 112 a to reach a position immediately below thefirst signal pad 111 a for high-speed differential signals. The return current of thesignal trace pattern 112 a may further flow from thefirst signal pad 111 a for high-speed differential signals through the via 115 a that is connected to the inner layer ground pattern and through thelead wire 114 a to theground pad 113 a. - Similarly, the return current of the
signal trace pattern 112 b may flow on the inner layer ground pattern disposed immediately below thesignal trace pattern 112 b to reach a position immediately below thesecond signal pad 111 b for high-speed differential signals. The return current of thesignal trace pattern 112 b may further flow from thesecond signal pad 111 b for high-speed differential signals through the via 115 b that is connected to the inner layer ground pattern and through thelead wire 114 b to theground pad 113 b. - To reduce an adverse affect that may be caused by different lengths of the return current paths flowing on the pair of
signal trace patterns first signal pad 111 a for high-speed differential signals and the via 115 a and the distance “b0” between thesecond signal pad 111 b for high-speed differential signals and the via 115 b are set to be substantially equal to each other. In addition, the distance “X” of thelead wire 114 a between theground pad 113 a and the via 115 a and the distance “Y” of thelead wire 114 b between theground pad 113 b and the via 115 b are also set to be substantially equal to each other in the layout on thePWB 100 according to the first exemplary embodiment of this patent specification. - The inventors of the present invention studied and evaluated effects on output waveforms. The inventors used
various target boards 60 to evaluate the output waveforms of loss-frequency under the condition of the structure according to the first exemplary embodiment in which the distances or lengths of the lead wires between the ground pads and the vias connected to the inner layer ground pattern are substantially equal to each other and under the condition in which the path lengths of return current are different. - The
target boards 60 used for the tests were a printed wiring board having a pad group similar to that shown inFIG. 5 . That is, each of thetarget boards 60 had a pad group including multiple pads with the distance “d” of 1 mm as shown inFIG. 5 . Thetarget boards 60 had the identical distance “X” of the lead wire between the ground pad and the via connected to the inner layer ground pattern. The distance “X” on thetarget boards 60 was set to 0.7 mm, which corresponds to 1/√2. At the same time, thetarget boards 60 had the various distances “Y” of the lead wire between the ground pad and the via connected to the inner layer ground pattern. The distance “Y” of one of thetarget boards 60 was set to 0.7 mm, which also corresponds to 1/√2. The distances “Y” of theother target boards 60 were set to various values each greater than 0.7 mm. -
FIG. 6 illustrates a measuring instrument or system for measuring actual values of losses in transmission on signal traces of high-speed differential signals. - A measuring
instrument 61 shown inFIG. 6 may be any kind of device or instrument capable of measuring and obtaining actual values of affects on waveforms output from a printed wiring board connected to the measuringinstrument 61, such as a vector network analyzer.Cables 62 of the measuringinstrument 61 are connected respectively to the ends of signal trace patterns for high-speed differential signals on one of thetarget boards 60.Cables 63 of the measuringinstrument 61 are connected respectively to signal pads for high-speed differential signals on thetarget board 60. With the above-described structure, the measuringinstrument 61 can obtain mixed-mode scattering parameters (S-parameters) of the signal trace patterns of the transmission lines for high-speed differential signals on thetarget board 60. -
FIG. 7 illustrates a graph showing observed frequency characteristics with respect to transmission losses on high speed differential signal traces with the various distances “Y” from the ground pad to the via. - In the graph of
FIG. 7 , a frequency characteristic A in a waveform shows the transmission loss of thetarget board 60 with the distance “X” of 0.7 mm and the distance “Y” of 0.7 mm, a frequency characteristic B shows the transmission loss of thetarget board 60 with the distance “X” of 0.7 mm and the distance “Y” of 1.4 mm, a frequency characteristic C shows the transmission loss of thetarget board 60 with the distance “X” of 0.7 mm and the distance “Y” of 3 mm, and a frequency characteristic D shows the transmission loss of thetarget board 60 with the distance “X” of 0.7 mm and the distance “Y” of 10 mm. - According to the results of the above-described tests with the
target boards 60 having various distances “Y”, the inventors found that the loss of thetarget board 60 increased as the distance “Y” of the lead wire became longer. The inventors also found that, when the distance or length of one lead wire was extremely long (for example, 10 mm), the loss abruptly increased around 4 GHz to 8 GHz. - As described above, as the distance or length of the lead wire from the ground pad to the via increases, the transmission loss in high frequency band of the board increases due to effects of inductance components. Therefore, the lengths of return current paths of each signal trace pattern for transmitting high-speed differential signals become different. Therefore, the balance or equilibrium of differential signals may become low, which can increase the transmission loss. Accordingly, the inventors have confirmed that, when the
target board 60 has the layout according to the first exemplary embodiment, sufficient transmission characteristics can be obtained. - According to the layout of the printed
wiring board 100 as shown inFIG. 5 , when the lengths of return current paths of the pair ofsignal trace patterns first signal pad 111 a for high-speed differential signals and the via 115 a connected to the inner layer ground pattern and the distance “b0” between thesecond signal pad 111 b for high-speed differential signals and the via 115 b connected to the inner layer ground patterns are set to be substantially equal to each other and the distance “X” of thelead wire 114 a between theground pad 113 a and the via 115 a and the distance “Y” of thelead wire 114 b between theground pad 113 b and the via 115 b are also set to be substantially equal to each other. Accordingly, the distances “a0”, “b0”, “X”, and “Y” are set to be substantially equal to each other in the exemplary embodiments. - Next, the inventors of the present invention also studied and evaluated effects on transmission characteristics according to various path lengths of return current flowing on the pair of
signal trace patterns target boards 60 used in the tests substantially corresponded to the structure of thePWB 100 ofFIG. 5 . Since thetarget boards 60 are substantially same as thePWB 100, the elements and components of thetarget boards 60 may be denoted by the same reference numerals as those of thePWB 100 and the descriptions thereof are omitted or summarized. - As described above, the tests were conducted to study the effects on transmission characteristics according to various path lengths of return current flowing on the pair of
signal trace patterns pad group 110 of eachtarget board 60 was set to 1 mm, the distance “a0” between thefirst signal pad 111 a for high-speed differential signals and the via 115 a connected to the inner layer ground pattern and the distance “b0” between thesecond signal pad 111 b for high-speed differential signals and the via 115 b connected to the inner layer ground pattern were set to d/√2 mm to be set to be substantially equal to each other, and the distance “X” of thelead wire 114 a between theground pad 113 a and the via 115 a and the distance “Y” of thelead wire 114 b between theground pad 113 b and the via 115 b were set to d/√2 mm to be set to be substantially equal to each other. In the tests, both the distance “X” and the distance “Y” were equally varied to be greater than d/√2 mm. -
FIG. 8 illustrates a graph showing observed frequency characteristics with respect to transmission losses (combined differential-mode and common-mode scattering parameters or mixed-mode S-parameters) on high speed differential signal traces with the various distances “X” and “Y” from the ground pad to the via. - In the graph of
FIG. 8 , the frequency characteristic A in a waveform shows the transmission loss of thetarget board 60 with the distance “X” of 0.7 mm and the distance “Y” of 0.7 mm as set in the previous test in reference to the graph ofFIG. 7 , a frequency characteristic E shows the transmission loss of thetarget board 60 with the distance “X” of 1.4 mm and the distance “Y” of 1.4 mm, and a frequency characteristic F shows the transmission loss of thetarget board 60 with the distance “X” of 3.0 mm and the distance “Y” of 3.0 mm. - According to the results of the above-described tests with the
target boards 60 having various distances “X” and “Y”, the inventors found that the transmission losses of thetarget board 60 increased in a frequency band higher than approximately 6 GHz as the distances “X” and “Y” of the lead wire from the ground pad to the via became longer. The inventors also found that that, when the distance or length of one lead wire became shorter, the inductance of the lead wire was reduced. Accordingly, the inventors have confirmed that, when thetarget board 60 has the layout according to the first exemplary embodiment, sufficient frequency characteristics of the high speed differential signal traces can be obtained. - According to the results described above, it has been found that a preferable position of a via may be at a position where the distance or length of a lead wire between a ground pad and a via connected to an inner layer ground pattern may be shorter and path lengths of return current that flows on each signal trace pattern for high-speed differential signals may be substantially equal to each other.
- In the first exemplary embodiment, the path lengths of return current that flows on the pair of
signal trace patterns first signal pad 111 a and the via 115 a and between thesecond signal pad 111 b and the via 115 b, respectively, and the distances “X” and “Y” representing the distances or lengths of thelead wire 114 a between theground pad 113 a and the via 115 a and of thelead wire 114 b between theground pad 113 b and the via 115 b, respectively, are sufficiently short from a practical viewpoint. Therefore, the transmission losses in the high frequency band of the high speed differential signal traces on thePWB 100 caused by the inductance components can be reduced, thereby obtaining fidelity in output waveforms. - The layout of a PWB is not limited to the layout of the
PWB 100 according to the first exemplary embodiment. That is, by setting a distance between a first signal pad for high-speed differential signals and a first via connected to a inner layer ground pattern and a distance between a second signal pad for high-speed differential signals and a second via connected to the inner layer ground pattern to be substantially equal to each other, the path lengths of return current that flows on each signal trace pattern for high-speed differential signals may be substantially equal to each other. By so doing, the equilibrium of the high-speed differential signals can be secured. Accordingly, different layouts can achieve a same effect as the layout of thePWB 100. - Further, by laying out the length of a return current path to be short as possible, degradation of transmission characteristics of a PWB can be prevented.
- In the first exemplary embodiment, the
pad group 110 provided for mounting electronic components is square-shaped and arranged in a grid pattern. However, the arrangement of the multiple pads of thepad group 110 is not limited to. For example, the present patent specification can be applied to a pad group with multiple pads arranged in a zigzag manner in two dimensions. - Referring to
FIG. 9 , a schematic structure of amultilayer PWB 100A according to a second exemplary embodiment of this patent specification is described. -
FIG. 9 illustrates a partially enlarged view of a layout of a group of pads for mounting electronic components on thePWB 100A. The structure of thePWB 100A is basically same as the structure of thePWB 100, except that vias on thePWB 100A are arranged in zigzag lines or staggered lines sandwiching a line of pads. Therefore, some descriptions of elements and components of thePWB 100A may be omitted or summarized. - In
FIG. 9 , thePWB 100A includes apad group 150, a pair of transmission line patterns or signaltrace patterns ground pads 153 a through 153 d,lead wires 154 a through 154 d, and vias 155 a through 155 c. - The
pad group 150 includes a pair of signal pads for high-speed differential signals, which are afirst signal pad 151 a and asecond signal pad 151 b, and theground pads 153 a through 153 d. - The
first signal pad 151 a and thesecond signal pad 151 b are formed at a corresponding end of each of the pair ofsignal trace patterns pad group 150. In other words, thefirst signal pad 151 a for high-speed differential signals is connected to thesignal trace pattern 152 a, and thesecond signal pad 151 b for high-speed differential signals is connected to thesignal trace pattern 152 b. - The pair of
signal trace patterns PWB 100A. - The
ground pads first signal pad 151 a andsecond signal pad 151 b for high-speed differential signals in the endmost line of the pads of thepad group 150 on thePWB 100A. Specifically, theground pad 153 a resides next to thefirst signal pad 151 a for high-speed differential signals and theground pad 153 d resides next to thesecond signal pad 151 b for high-speed differential signals in the endmost line. - The
ground pads pad group 150, and arranged next to thefirst signal pad 151 a andsecond signal pad 151 b for high-speed differential signals, respectively. - The
lead wires 154 a through 154 d are led out from theground pads 153 a through 153 d, respectively. One end of thelead wire 154 a is connected to theground pad 153 a, and the other end of thelead wire 154 a is connected to the via 155 a. Similarly, one end of thelead wire 154 b is connected to theground pad 153 b, and the other end of thelead wire 154 b is connected to the via 155 b. One end of thelead wire 154 c is connected to theground pad 153 c, and the other end of thelead wire 154 c is connected to the via 155 b. One end of thelead wire 154 d is connected to theground pad 153 d, and the other end of thelead wire 154 d is connected to the via 155 c. - Each of the
vias 155 a through 155 c runs across a thickness of thePWB 100A, so that a lower end of each of thevias 155 a through 155 c can be connected to the inner layer ground pattern. - In the second exemplary embodiment of this patent specification, each pitch between adjacent pads of the multiple pads of the
pad group 150 is set to “d” mm. Further, a distance “a1” between thefirst signal pad 151 a for high-speed differential signals and the via 155 a and between thefirst signal pad 151 a for high-speed differential signals and the via 155 b and a distance “b1” between thesecond signal pad 151 b for high-speed differential signals and the via 155 b and between thesecond signal pad 151 b for high-speed differential signals and the via 155 c are substantially equal to each other. - Specifically, when the pitch of adjacent pads of the
pad group 150 is “d” mm, thevias 155 a through 155 c may be arranged respectively at positions where the distances “a1” and “b1” satisfy a relation expressed as “√2.5*d (mm)”, which corresponds, for example, to √2.5 times the distance “d” between thefirst signal pad 151 a and thesecond signal pad 151 b. - In the layout of the
PWB 100A according to the second exemplary embodiment, the lengths of return current paths with respect to the pair ofsignal trace patterns - Referring to
FIG. 10 , a schematic structure of amultilayer PWB 100B according to a third exemplary embodiment of this patent specification is described. -
FIG. 10 illustrates a partially enlarged view of a layout of a group of pads for mounting electronic components on thePWB 100B. The structure of thePWB 100B is basically same as the structure of thePWB 100A ofFIG. 9 , except that the vias on thePWB 100A are arranged in a grid pattern with straight lines and that the lengths of return current paths on which each signal trace pattern for high-speed differential signals flows are shorter than those in thePWB 100A. Therefore, some descriptions of elements and components of thePWB 100B may be omitted or summarized. - In
FIG. 10 , thePWB 100B includes thepad group 150, the pair of transmission line patterns or signaltrace patterns ground pads 153 a through 153 d, thelead wires 154 a through 154 d, and vias 165 a through 165 c. - Instead of the
vias 155 a through 155 c of thePWB 100A ofFIG. 9 , thePWB 100B includes thevias 165 a through 165 c. One end of thelead wire 154 a is connected to theground pad 153 a, and the other end of thelead wire 154 a is connected to the via 165 a. One end of thelead wire 154 b is connected to theground pad 153 b, and the other end of thelead wire 154 b is connected to the via 165 b. One end of thelead wire 154 c is connected to theground pad 153 c, and the other end of thelead wire 154 c is connected to the via 165 b. One end of thelead wire 154 d is connected to theground pad 153 d, and the other end of thelead wire 154 d is connected to the via 165 c. - Each of the
vias 165 a through 165 c runs across a thickness of thePWB 100B, so that a lower end of each of thevias 165 a through 165 c can be connected to the inner layer ground pattern. - In the third exemplary embodiment of this patent specification, each pitch between adjacent pads of the multiple pads of the
pad group 150 is set to “d” mm. Further, a distance “a2” between thefirst signal pad 151 a for high-speed differential signals and the via 165 a and between thefirst signal pad 151 a for high-speed differential signals and the via 165 b and a distance “b2” between thesecond signal pad 151 b for high-speed differential signals and the via 165 b and between thesecond signal pad 151 b for high-speed differential signals and the via 165 c are substantially equal to each other. - Specifically, when the pitch of adjacent pads of the
pad group 150 is “d” mm, thevias 165 a through 165 c may be arranged respectively at positions where the distances “a2” and “b2” satisfy a relation expressed as “d/√2 (mm)”, which corresponds, for example, to 1/√2 times the distance “d” between thefirst signal pad 151 a and thesecond signal pad 151 b. - In the layout of the
PWB 100B as shown inFIG. 10 according to the third exemplary embodiment, the distance “a2” between thefirst signal pad 151 a for high-speed differential signals and the via 165 a connected to the inner layer ground pattern and between thefirst signal pad 151 a for high-speed differential signals and the via 165 b connected to the inner layer ground pattern, the distance “b2” between thesecond signal pad 151 b for high-speed differential signals and the via 165 b connected to the inner layer ground pattern and between thesecond signal pad 151 b for high-speed differential signals and the via 165 c connected to the inner layer ground pattern, and the lengths of thelead wires 154 a through 154 d are substantially equal to each other. By so doing, the lengths of thelead wires 154 a through 154 d may be sufficiently short from a practical viewpoint, thereby reducing inductance in thelead wires 154 a through 154 d. Further, the lengths of return current paths with respect to the pair ofsignal trace patterns - The above-described layout is not limited to but the present patent specification can apply to a different layout. For example, the present patent specification can apply to a layout in which a lead wire connects the via 165 a and the
ground pad 153 b and another lead wire connects the via 165 c and theground pad 153 c. This layout satisfies the above-described condition so as to achieve the above-described effect. - Referring to
FIG. 11 , a schematic structure of amultilayer PWB 100C according to a fourth exemplary embodiment of this patent specification is described. -
FIG. 11 illustrates a partially enlarged view of a layout of a group of pads for mounting electronic components on thePWB 100C. The structure of thePWB 100C is basically same as the structure of thePWB 100A. Therefore, some descriptions of elements and components of thePWB 100C may be omitted or summarized. - Only to cause the lengths of return current paths with respect to signal trace patterns for high-speed differential signals to be equal to each other, it is preferable that a distance between a first signal pad for high-speed differential signals and a via and a distance between a second signal pad and a via are set to be substantially equal to each other.
- In
FIG. 11 , thePWB 100C includes apad group 170, a pair of transmission line patterns or signaltrace patterns ground pads lead wires - The
pad group 170 includes a pair of signal pads for high-speed differential signals, which are afirst signal pad 171 a and asecond signal pad 171 b, and theground pads - The
first signal pad 171 a and thesecond signal pad 171 b are formed at a corresponding end of each of the pair ofsignal trace patterns pad group 170. In other words, thefirst signal pad 171 a for high-speed differential signals is connected to thesignal trace pattern 172 a, and thesecond signal pad 171 b for high-speed differential signals is connected to thesignal trace pattern 172 b. - The pair of
signal trace patterns PWB 100C. - The
ground pads pad group 170, and arranged next to thefirst signal pad 171 a andsecond signal pad 171 b for high-speed differential signals, respectively. - The
lead wires ground pads lead wire 174 a is connected to theground pad 173 a, and the other end of thelead wire 174 a is connected to thevia 175. Similarly, one end of thelead wire 174 b is connected to theground pad 173 b, and the other end of thelead wire 174 b is connected to thevia 175. - The via 175 runs across a thickness of the
PWB 100C, so that a lower end of each of the via 175 can be connected to the inner layer ground pattern. - Each pitch between adjacent pads of the multiple pads of the
pad group 170 is shown as “d” mm onFIG. 11 . Actually, in the fourth exemplary embodiment of this patent specification, each pitch between adjacent pads of thepad group 170 is set to 1 mm. Further, a distance between thefirst signal pad 171 a for high-speed differential signals and the via 175 is set as a distance “a3” and a distance between thesecond signal pad 171 b for high-speed differential signals and the via 175 is set as a distance “b3.” - Specifically, when the pitch of adjacent pads of the
pad group 170 is “d” mm, the via 175 may be arranged at a position where the distances “a3” and “b3” satisfy a relation expressed as “√2.5*d (mm)”, which corresponds, for example, to √2.5 times the distance “d” between thefirst signal pad 171 a and thesecond signal pad 171 b. - In the layout of the
PWB 100C as shown inFIG. 11 according to the fourth exemplary embodiment, the distance “a3” between thefirst signal pad 171 a for high-speed differential signals and the via 175 connected to the inner layer ground pattern and the distance “b3” between thesecond signal pad 171 b for high-speed differential signals and the via 175 connected to the inner layer ground pattern are set to be substantially equal to each other, and are equidistant from thevia 175. By so doing, the lengths of return current paths with respect to the pair ofsignal trace patterns lead wires - Referring to
FIG. 12 , a schematic structure of amultilayer PWB 100D according to a fifth exemplary embodiment of this patent specification is described. -
FIG. 12 illustrates a partially enlarged view of a layout of a group of pads for mounting electronic components on thePWB 100D. The structure of thePWB 100D is basically same as the structure of thePWB 100C ofFIG. 11 , except that vias on thePWB 100D are arranged in a grid pattern with straight lines and that the lengths of return current paths on which each signal trace pattern for high-speed differential signals flows are shorter than those in thePWB 100C. Therefore, some descriptions of elements and components of thePWB 100D may be omitted or summarized. - In
FIG. 12 , thePWB 100D includes thepad group 170, the pair of transmission line patterns or signaltrace patterns ground pads lead wires vias 185. - Instead of the via 175 of the
PWB 100C ofFIG. 11 , thePWB 100D includes the via 185. One end of thelead wire 174 a is connected to theground pad 173 a, and the other end of thelead wire 174 a is connected to thevia 185. Similarly, one end of thelead wire 174 b is connected to theground pad 173 b, and the other end of thelead wire 174 b is connected to thevia 185. - The via 185 runs across a thickness of the
PWB 100D, so that a lower end of each of the via 185 can be connected to the inner layer ground pattern. - In the fifth exemplary embodiment of this patent specification, each pitch between adjacent pads of the multiple pads of the
pad group 170 is set to “d” mm. Further, a distance between thefirst signal pad 171 a for high-speed differential signals and the via 185 is set as a distance “a4” and a distance between thesecond signal pad 171 b for high-speed differential signals and the via 185 is set as a distance “b4.” - In the layout of the
PWB 100D as shown inFIG. 12 according to the fifth exemplary embodiment, the distance “a4”, the distance “b4”, and the lengths of thelead wires via 185. Specifically, when the pitch of adjacent pads of thepad group 170 is “d” mm, the via 185 is arranged at a position where the distances “a4” and “b4” and the lengths of thelead wires first signal pad 171 a and thesecond signal pad 171 b. By so doing, the lengths of thelead wires lead wires signal trace patterns - Referring to
FIG. 13 , a schematic structure of amultilayer PWB 100E according to a sixth exemplary embodiment of this patent specification is described. -
FIG. 13 illustrates a partially enlarged view of a layout of a group of pads for mounting electronic components on thePWB 100E. The structure of thePWB 100E is basically same as the structure of thePWB 100C, except that one via is connected to a ground pad with a lead wire. Therefore, some descriptions of elements and components of thePWB 100E may be omitted or summarized. - Only to cause the lengths of return current paths with respect to signal trace patterns for high-speed differential signals to be equal to each other, it is preferable that a distance between a first signal pad for high-speed differential signals and a via and a distance between a second signal pad and a via are set to be substantially equal to each other.
- In
FIG. 13 , thePWB 100E includes apad group 190, a pair of transmission line patterns or signaltrace patterns ground pad 193, alead wire 194, and a via 195A. - The
pad group 190 includes a pair of signal pads for high-speed differential signals, which are afirst signal pad 191 a and asecond signal pad 191 b, and theground pad 193. - The
first signal pad 191 a and thesecond signal pad 191 b are formed at a corresponding end of each of the pair ofsignal trace patterns pad group 190. In other words, thefirst signal pad 191 a for high-speed differential signals is connected to thesignal trace pattern 192 a, and thesecond signal pad 191 b for high-speed differential signals is connected to thesignal trace pattern 192 b. - The pair of
signal trace patterns PWB 100E. - The
ground pad 193 is located in a line next to the endmost line of the pads of thepad group 190, and arranged next to thesecond signal pad 191 b for high-speed differential signals inFIG. 13 . - The
lead wire 194 are led out from theground pad 193. One end of thelead wire 194 is connected to theground pad 193, and the other end of thelead wire 194 is connected to the via 195A. - The via 195A runs across a thickness of the
PWB 100E, so that a lower end of each of the via 195A can be connected to the inner layer ground pattern. - Each pitch between adjacent pads of the multiple pads of the
pad group 190 is shown as “d” mm inFIG. 13 . Actually, in the sixth exemplary embodiment of this patent specification, each pitch between adjacent pads of thepad group 190 is set to 1 mm. Further, a distance between thefirst signal pad 191 a for high-speed differential signals and the via 195A is set as a distance “a5” and a distance between thesecond signal pad 191 b for high-speed differential signals and the via 195A is set as a distance “b5.” - Specifically, when the pitch of adjacent pads of the
pad group 190 is “d” mm, the via 195A is arranged at a position where the distances “a5” and “b5” satisfy a relation expressed as “√2.5*d (mm)”, which corresponds, for example, to √2.5 times the distance “d” between thefirst signal pad 191 a and thesecond signal pad 191 b. - In the layout of the
PWB 100E as shown inFIG. 13 according to the sixth exemplary embodiment, the lengths of return current paths with respect to the pair ofsignal trace patterns - Referring to
FIG. 14 , a schematic structure of amultilayer PWB 100F according to a seventh exemplary embodiment of this patent specification is described. -
FIG. 14 illustrates a partially enlarged view of a layout of a group of pads for mounting electronic components on thePWB 100F. The structure of thePWB 100F is basically same as the structure of thePWB 100E, except that vias on thePWB 100F are arranged in a straight line closer to the pads aligned in an endmost line, and that a length of a lead wire or a distance between a via and a ground pad is same as a distance between the via and a pad for high-speed differential signals. Therefore, some descriptions of elements and components of thePWB 100F may be omitted or summarized. - In
FIG. 14 , thePWB 100F includes thepad group 190, the pair of transmission line patterns or signaltrace patterns ground pad 193, thelead wire 194, and avias 195B. - Instead of the via 195A of the
PWB 100E ofFIG. 13 , thePWB 100F includes the via 195B. One end of thelead wire 194 is connected to theground pad 193, and the other end of thelead wire 194 is connected to the via 195B. - The via 195B runs across a thickness of the
PWB 100F, so that a lower end of each of the via 195B can be connected to the inner layer ground pattern. - In the seventh exemplary embodiment of this patent specification, each pitch between adjacent pads of the multiple pads of the
pad group 190 is set to “d” mm. Further, a distance between thefirst signal pad 191 a for high-speed differential signals and the via 195B that is led out from theground pad 193 is set as a distance “a6” and a distance between thesecond signal pad 191 b for high-speed differential signals and thevia 195B is set as a distance “b6.” - Specifically, when the pitch of adjacent pads of the
pad group 190 is “d” mm, the via 195B is arranged at a position where the distance or length of thelead wire 194 between theground pad 193 and the via 195B, the distances “a6” and “b6” satisfy a relation expressed as “d/√2 (mm)”, which corresponds, for example, to d/√2 times the distance “d” between thefirst signal pad 191 a and thesecond signal pad 191 b. - In the layout of the
PWB 100F as shown inFIG. 14 , the distance “a6” between thefirst signal pad 191 a for high-speed differential signals and thevia 195B connected to the inner layer ground pattern, the distance “b6” between thesecond signal pad 191 b for high-speed differential signals and thevia 195B connected to the inner layer ground pattern, and the lengths of thelead wire 194 may be set to be substantially equal to each other. By so doing, the lengths of return current paths with respect to the pair ofsignal trace patterns lead wire 194 may be sufficiently short from a practical viewpoint, thereby reducing the inductance in thelead wire 194. - As described above, by reducing a distance or length from a ground pad for an electronic component mounted on a PWB, the loss of transmission in the high-frequency band of the high speed differential signal traces on the PWB due to the inductance can be reduced, thereby obtaining high quality in fidelity to output waveforms traveled through transmission lines or signal paths.
- Further, by arranging a via or vias so that the lengths of return current paths on which each signal trace pattern for high-speed differential signals flows to be equal to each other, the equilibrium of the high-speed differential signals can be obtained. Accordingly, high quality in fidelity to output waveforms traveled through transmission lines or signal paths can be obtained.
- The above-described exemplary embodiments include the pad group with multiple pads arranged to be square-shaped in a grid pattern. However, the arrangement of the multiple pads of the pad group is not limited to the square-shaped grid pattern. For example, the multiple pads can be arranged in a zigzag or staggered pattern extending two-dimensionally.
- Further, the pads on the printed wiring patterns according to the above-described exemplary embodiments are for BGA terminals. However, the type of the pads is not limited to the BGA terminal. For example, the type of the pads can be for PGA (pin grid array) terminals. The pads for PGA terminals can be arranged to be square-shaped in the grid pattern, the zigzag pattern, etc.
- According to the present patent specification, when the distance from the first signal pad for high-speed differential signals to the via that is connected to the inner layer ground pattern is set as a distance “a” and the distance from the second signal pad for high-speed differential signals to the via that is connected to the inner layer ground pattern is set as a distance “b”, the via may be located at a position in which the distances “a” and “b” may be rather short and substantially equal to each other and the distance or length of the lead wire from the via to the ground pad may also be rather short. Accordingly, high quality in fidelity to output waveforms traveled through transmission lines or signal traces can be obtained.
- The above-described example embodiments are illustrative, and numerous additional modifications and variations are possible in light of the above teachings. For example, elements and/or features of different illustrative and example embodiments herein may be combined with each other and/or substituted for each other within the scope of this disclosure and appended claims. It is therefore to be understood that within the scope of the appended claims, the disclosure of this patent specification may be practiced otherwise than as specifically described herein.
- Obviously, numerous modifications and variations of the present invention are possible in light of the above teachings. It is therefore to be understood that within the scope of the appended claims, the invention may be practiced otherwise than as specifically described herein.
- This application claims priority from Japanese patent application No. 2007-184637 filed on Jul. 13, 2007 in the Japan Patent Office, the entire contents of which is hereby incorporated by reference herein.
Claims (19)
Applications Claiming Priority (2)
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JP2007-184637 | 2007-07-13 | ||
JP2007184637A JP5034095B2 (en) | 2007-07-13 | 2007-07-13 | Printed wiring board and electronic device |
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US20090014206A1 true US20090014206A1 (en) | 2009-01-15 |
US8030580B2 US8030580B2 (en) | 2011-10-04 |
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US12/170,894 Expired - Fee Related US8030580B2 (en) | 2007-07-13 | 2008-07-10 | Printed wiring board and electronic apparatus including same |
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Publication number | Priority date | Publication date | Assignee | Title |
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US20080179083A1 (en) * | 2007-01-30 | 2008-07-31 | Mcdata Corporation | Electrical terminal footprints for a printed circuit board |
US20110203840A1 (en) * | 2010-02-23 | 2011-08-25 | Flextronics Ap, Llc | Test point design for a high speed bus |
US20110222247A1 (en) * | 2010-03-12 | 2011-09-15 | Ricoh Company, Limited. | Printed wiring board |
US20130083505A1 (en) * | 2011-10-04 | 2013-04-04 | Sony Corporation | Wiring board, connector and electronic apparatus |
US20140182891A1 (en) * | 2012-12-28 | 2014-07-03 | Madhumitha Rengarajan | Geometrics for improving performance of connector footprints |
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Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030123236A1 (en) * | 2001-10-10 | 2003-07-03 | Mcgrath James L. | High speed differential signal edge card connector and circuit board layouts therefor |
US20040150970A1 (en) * | 2003-01-31 | 2004-08-05 | Brocade Communications Systems, Inc. | Impedance matching of differential pair signal traces on printed wiring boards |
US20050202722A1 (en) * | 2004-02-13 | 2005-09-15 | Regnier Kent E. | Preferential via exit structures with triad configuration for printed circuit boards |
US20060091545A1 (en) * | 2004-10-29 | 2006-05-04 | Casher Patrick R | Printed circuit board for high-speed electrical connectors |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05206678A (en) * | 1992-01-28 | 1993-08-13 | Nec Corp | Multilayer interconnection board |
JP3635873B2 (en) * | 1997-06-26 | 2005-04-06 | 三菱電機株式会社 | Strip line feeder |
JP2000349192A (en) * | 1999-06-07 | 2000-12-15 | Canon Inc | Semiconductor integrated circuit and printed wiring board |
TW200408091A (en) * | 2001-11-13 | 2004-05-16 | Koninkl Philips Electronics Nv | Device for shielding transmission lines from ground or power supply |
JP2003204209A (en) * | 2002-01-07 | 2003-07-18 | Kyocera Corp | Wiring board for high frequency |
JP2004071431A (en) | 2002-08-08 | 2004-03-04 | Mitsumi Electric Co Ltd | Connector conversion adapter |
JP4373752B2 (en) * | 2003-09-26 | 2009-11-25 | 京セラ株式会社 | Wiring board |
JP2005243864A (en) * | 2004-02-26 | 2005-09-08 | Kyocera Corp | Wiring board |
JP4601369B2 (en) * | 2004-09-22 | 2010-12-22 | 京セラ株式会社 | Wiring board |
JP2006156512A (en) | 2004-11-26 | 2006-06-15 | Ricoh Co Ltd | Printed wiring board |
JP4751709B2 (en) | 2004-12-10 | 2011-08-17 | パナソニック株式会社 | Radiation noise suppression circuit for differential transmission line |
-
2007
- 2007-07-13 JP JP2007184637A patent/JP5034095B2/en not_active Expired - Fee Related
-
2008
- 2008-07-10 US US12/170,894 patent/US8030580B2/en not_active Expired - Fee Related
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030123236A1 (en) * | 2001-10-10 | 2003-07-03 | Mcgrath James L. | High speed differential signal edge card connector and circuit board layouts therefor |
US20040150970A1 (en) * | 2003-01-31 | 2004-08-05 | Brocade Communications Systems, Inc. | Impedance matching of differential pair signal traces on printed wiring boards |
US20050202722A1 (en) * | 2004-02-13 | 2005-09-15 | Regnier Kent E. | Preferential via exit structures with triad configuration for printed circuit boards |
US20060091545A1 (en) * | 2004-10-29 | 2006-05-04 | Casher Patrick R | Printed circuit board for high-speed electrical connectors |
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US8586873B2 (en) * | 2010-02-23 | 2013-11-19 | Flextronics Ap, Llc | Test point design for a high speed bus |
US20110222247A1 (en) * | 2010-03-12 | 2011-09-15 | Ricoh Company, Limited. | Printed wiring board |
US8605448B2 (en) | 2010-03-12 | 2013-12-10 | Ricoh Company, Limited | Printed wiring board |
US20130083505A1 (en) * | 2011-10-04 | 2013-04-04 | Sony Corporation | Wiring board, connector and electronic apparatus |
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US9836429B2 (en) * | 2013-11-06 | 2017-12-05 | Hitachi, Ltd. | Signal transmission circuit and printed circuit board |
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US8030580B2 (en) | 2011-10-04 |
JP5034095B2 (en) | 2012-09-26 |
JP2009021511A (en) | 2009-01-29 |
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