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Publication numberUS20090057826 A1
Publication typeApplication
Application numberUS 11/849,539
Publication dateMar 5, 2009
Filing dateSep 4, 2007
Priority dateSep 4, 2007
Also published asUS8817451, US20130301187
Publication number11849539, 849539, US 2009/0057826 A1, US 2009/057826 A1, US 20090057826 A1, US 20090057826A1, US 2009057826 A1, US 2009057826A1, US-A1-20090057826, US-A1-2009057826, US2009/0057826A1, US2009/057826A1, US20090057826 A1, US20090057826A1, US2009057826 A1, US2009057826A1
InventorsSun-OO Kim, Yoon-hae Kim
Original AssigneeKim Sun-Oo, Kim Yoon-Hae
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Semiconductor Devices and Methods of Manufacture Thereof
US 20090057826 A1
Abstract
Semiconductor devices and methods of manufacture thereof are disclosed. In a preferred embodiment, a capacitor plate includes a first propeller-shaped portion and a second propeller-shaped portion. A via portion is disposed between the first propeller-shaped portion and the second propeller-shaped portion.
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Claims(26)
1. A capacitor plate, comprising:
a first propeller-shaped portion;
a second propeller-shaped portion; and
a via portion disposed between the first propeller-shaped portion and the second propeller-shaped portion.
2. The capacitor plate according to claim 1, wherein the first propeller-shaped portion comprises a first member and a second member, the second member being substantially orthogonal to and coupled to the first member, the first member and the second member intersecting proximate a substantially central region of the first member and the second member, and wherein the second propeller-shaped portion comprises a third member and a fourth member, the fourth member being substantially orthogonal to and coupled to the third member, the third member and the fourth member intersecting proximate a substantially central region of the third member and the fourth member.
3. The capacitor plate according to claim 1, wherein the first propeller-shaped portion is disposed within a first insulating material of a semiconductor device, wherein the via portion is disposed within a second insulating material of the semiconductor device, the second insulating material being adjacent the first insulating material, and wherein the second propeller-shaped portion is disposed within a third insulating material of the semiconductor device, the third insulating material being adjacent the second insulating material.
4. The capacitor plate according to claim 3, wherein the via portion comprises a first via portion, further comprising a second via portion disposed within a fourth insulating material of the semiconductor device, the fourth insulating material being adjacent the third insulating material, further comprising a third propeller-shaped portion disposed in a fifth insulating material of the semiconductor device, the fifth insulating material being adjacent the fourth insulating material, and wherein the second via portion is disposed between the second propeller-shaped portion and the third propeller-shaped portion.
5. The capacitor plate according to claim 4, wherein the second via portion comprises a first end and a second end opposite the first end, wherein the first end of the second via portion is coupled to the second propeller-shaped portion, and wherein the second end of the second via portion is coupled to the third propeller-shaped portion.
6. The capacitor plate according to claim 1, wherein the via portion comprises a first end and a second end opposite the first end, wherein the first end of the via portion is coupled to the first propeller-shaped portion, and wherein the second end of the via portion is coupled to the second propeller-shaped portion.
7. A capacitor, comprising:
a first plate;
a second plate; and
an insulating material disposed between the first plate and the second plate, wherein the first plate and/or the second plate comprises a first propeller-shaped portion, a second propeller-shaped portion, and a via portion disposed between the first propeller-shaped portion and the second propeller-shaped portion.
8. The capacitor according to claim 7, wherein the first propeller-shaped portion, the via portion, or the second propeller-shaped portion comprises a metal or a semiconductor material.
9. The capacitor according to claim 7, wherein the first propeller-shaped portion or the second propeller-shaped portion comprises three or more blades.
10. The capacitor according to claim 7, wherein the first propeller-shaped portion or the second propeller-shaped portion comprises a shape of a cross, the letter “X,” or the letter “T.”
11. The capacitor according to claim 7, wherein the first propeller-shaped portion or the second propeller-shaped portion comprises a first member and a second member, the second member being substantially orthogonal to and coupled to the first member, wherein the first member and the second member intersect, wherein the first member comprises a first length, and wherein the second member comprises a second length, the second length being substantially the same as the first length.
12. The capacitor according to claim 7, wherein the first propeller-shaped portion or the second propeller-shaped portion comprises a first member and a second member, the second member being substantially orthogonal to and coupled to the first member, wherein the first member and the second member intersect, wherein the first member comprises a first length, and wherein the second member comprises a second length, the second length being different than the first length.
13. A semiconductor device, comprising:
a workpiece;
a first conductive material layer disposed over the workpiece, the first conductive material layer including a first insulating material and at least one first propeller-shaped portion of a capacitor plate disposed within the first insulating material;
a second conductive material layer disposed over the first conductive material layer, the second conductive material layer including a second insulating material and at least one via portion of the capacitor plate disposed within the second insulating material, the at least one via portion of the capacitor plate being coupled to the at least one first propeller-shaped portion of the capacitor plate; and
a third conductive material layer disposed over the second conductive material layer, the third conductive material layer including a third insulating material and at least one second propeller-shaped portion of the capacitor plate disposed within the third insulating material, the at least one second propeller-shaped portion of the capacitor plate being coupled to the at least one via portion of the capacitor plate, wherein the at least one first propeller-shaped portion, the at least one via portion, and the at least one second propeller-shaped portion comprise at least one capacitor plate.
14. The semiconductor device according to claim 13, further comprising at least two capacitor plates comprising the at least one first propeller-shaped portion, the at least one via portion, and the at least one second propeller-shaped portion, wherein the at least two capacitor plates comprise a first capacitor plate and a second capacitor plate of a capacitor, and wherein portions of the first insulating material, the second insulating material, and the third insulating material comprise a capacitor dielectric of the capacitor.
15. The semiconductor device according to claim 14, wherein the first capacitor plate or the second capacitor plate comprises two or more capacitor plates comprising the at least one first propeller-shaped portion, the at least one via portion, and the at least one second propeller-shaped portion, and wherein the two or more capacitor plates are coupled together.
16. The semiconductor device according to claim 15, wherein the two or more capacitor plates are coupled together by a conductive line in a conductive material layer adjacent the first conductive material layer or the third conductive material layer.
17. The semiconductor device according to claim 15, wherein the two or more capacitor plates are coupled together at ends of adjacent at least one first propeller-shaped portions or at least one second propeller-shaped portions.
18. The semiconductor device according to claim 13, wherein the semiconductor device comprises a minimum feature size, wherein the at least one first propeller-shaped portion or the at least one second propeller-shaped portion comprises a width comprising substantially the minimum feature size, or wherein the at least one first propeller-shaped portion and the at least one second propeller-shaped portion are spaced apart by a distance comprising substantially the minimum feature size.
19. The semiconductor device according to claim 18, further comprising at least two capacitor plates comprising the at least one first propeller-shaped portion, the at least one via portion, and the at least one second propeller-shaped portion, wherein the at least two capacitor plates comprise a first capacitor plate and a second capacitor plate of a capacitor, wherein the at least one first propeller-shaped portion or the at least one second propeller-shaped portion of the first capacitor plate comprises an inner corner, wherein the at least one first propeller-shaped portion or the at least one second propeller-shaped portion of the second capacitor plate comprises an outer corner, and wherein the inner corner of the at least one first propeller-shaped portion or the at least one second propeller-shaped portion of the first capacitor plate is spaced apart from the at least one first propeller-shaped portion or the at least one second propeller-shaped portion of the second capacitor plate by a distance of about 1.4 times the minimum feature size of the semiconductor device.
20. A method of manufacturing a capacitor, the method comprising:
providing a workpiece;
forming a first conductive material layer over the workpiece, the first conductive material layer including a first insulating material and at least one first propeller-shaped portion of a capacitor plate disposed within the first insulating material;
forming a second conductive material layer over the first conductive material layer, the second conductive material layer including a second insulating material and at least one via portion of the capacitor plate disposed within the second insulating material, the at least one via portion of the capacitor plate being coupled to the at least one first propeller-shaped portion of the capacitor plate; and
forming a third conductive material layer over the second conductive material layer, the third conductive material layer including a third insulating material and at least one second propeller-shaped portion of the capacitor plate disposed within the third insulating material, the at least one second propeller-shaped portion of the capacitor plate being coupled to the at least one via portion of the capacitor plate, wherein the at least one first propeller-shaped portion, the at least one via portion, and the at least one second propeller-shaped portion comprise at least one capacitor plate.
21. The method according to claim 20, wherein forming the first conductive material layer, forming the second conductive material layer, and/or forming the third conductive material layer comprises a single damascene process or a dual damascene process.
22. The method according to claim 20, wherein forming the first conductive material layer, forming the second conductive material layer, and/or forming the third conductive material layer comprises a subtractive etch process.
23. The method according to claim 20, wherein forming the first conductive material layer, forming the second conductive material layer, and forming the third conductive material layer comprise forming a first capacitor plate and a second capacitor plate, wherein a first propeller-shaped portion or a second propeller-shaped portion of the first capacitor plate comprises at least one elongated first blade, wherein a first propeller-shaped portion or a second propeller-shaped portion of the second capacitor plate comprises at least one elongated second blade, further comprising interweaving the at least one elongated second blade with the at least one elongated first blade.
24. The method according to claim 20, wherein forming the first conductive material layer, forming the second conductive material layer, and forming the third conductive material layer comprise forming the at least one first propeller-shaped portion, the at least one via portion, and the at least one second propeller-shaped portion of the at least one capacitor plate in a dedicated region of the workpiece.
25. The method according to claim 20, wherein forming the first conductive material layer, forming the second conductive material layer, and forming the third conductive material layer comprise forming the at least one first propeller-shaped portion, the at least one via portion, and the at least one second propeller-shaped portion of the at least one capacitor plate in an unused region of the workpiece.
26. The method according to claim 20, wherein forming the first conductive material layer comprises forming a first metallization layer, wherein forming the second conductive material layer comprises forming a second metallization layer, and wherein forming the third conductive material layer comprises forming a third metallization layer.
Description
    TECHNICAL FIELD
  • [0001]
    The present invention relates generally to the fabrication of semiconductor devices, and more particularly to the fabrication of capacitors in integrated circuits.
  • BACKGROUND
  • [0002]
    Semiconductor devices are used in a variety of electronic applications, such as personal computers, cell phones, digital cameras, and other electronic equipment, as examples. Semiconductor devices are typically fabricated by sequentially depositing insulating or dielectric layers, conductive layers, and semiconductive layers of material over a semiconductor substrate, and patterning the various layers using lithography to form circuit components and elements thereon.
  • [0003]
    Capacitors are elements that are used extensively in semiconductor devices for storing an electrical charge. Capacitors essentially comprise two conductive plates separated by an insulating material. When an electric current is applied to a capacitor, electric charges of equal magnitude yet opposite polarity build up on the capacitor plates. The capacitance, or the amount of charge held by the capacitor per applied voltage, depends on a number of parameters, such as the area of the plates, the distance between the plates, and the dielectric constant value of the insulating material between the plates, as examples. Capacitors are used in applications such as electronic filters, analog-to-digital converters, memory devices, control applications, and many other types of semiconductor device applications.
  • [0004]
    What are needed in the art are improved methods of fabricating capacitors in semiconductor devices and structures thereof.
  • SUMMARY OF THE INVENTION
  • [0005]
    Technical advantages are generally achieved by preferred embodiments of the present invention, which provide novel methods of manufacturing capacitor plates, capacitors, semiconductor devices, and structures thereof.
  • [0006]
    In accordance with a preferred embodiment of the present invention, a capacitor plate includes a first propeller-shaped portion, a second propeller-shaped portion, and a via portion disposed between the first propeller-shaped portion and the second propeller-shaped portion.
  • [0007]
    The foregoing has outlined rather broadly the features and technical advantages of embodiments of the present invention in order that the detailed description of the invention that follows may be better understood. Additional features and advantages of embodiments of the invention will be described hereinafter, which form the subject of the claims of the invention. It should be appreciated by those skilled in the art that the conception and specific embodiments disclosed may be readily utilized as a basis for modifying or designing other structures or processes for carrying out the same purposes of the present invention. It should also be realized by those skilled in the art that such equivalent constructions do not depart from the spirit and scope of the invention as set forth in the appended claims.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • [0008]
    For a more complete understanding of the present invention, and the advantages thereof, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which:
  • [0009]
    FIG. 1 shows a cross-sectional view of a semiconductor device in accordance with a preferred embodiment of the present invention, wherein a capacitor plate including propeller-shaped portions is formed in a plurality of conductive material layers of the semiconductor device;
  • [0010]
    FIG. 2 shows a top view of a capacitor including two capacitor plates comprising propeller-shaped portions in accordance with a preferred embodiment of the present invention;
  • [0011]
    FIG. 3 shows a top view of a plurality of capacitor plates in accordance with a preferred embodiment of the present invention;
  • [0012]
    FIG. 4 shows a perspective view of capacitor plates in accordance with embodiments of the present invention;
  • [0013]
    FIG. 5 shows a top view of another preferred embodiment of the present invention, wherein two or more capacitor plates are electrically coupled together using a conductive material layer of the semiconductor device disposed above or below the capacitor plates;
  • [0014]
    FIG. 6 shows another embodiment of the present invention, wherein one blade of a propeller-shaped portion of a capacitor plate is elongated and extends proximate an elongated blade of a propeller-shaped portion of an adjacent capacitor plate;
  • [0015]
    FIG. 7 shows yet another embodiment of the present invention, wherein two blades of the propeller-shaped portion of the capacitor plate are elongated, and wherein the blades of two adjacent capacitor plates are coupled together; and
  • [0016]
    FIGS. 8 and 9 show top views of a semiconductor device in accordance with a preferred embodiment, wherein the novel capacitor plates described herein are formed in unused or dedicated regions of a semiconductor device.
  • [0017]
    Corresponding numerals and symbols in the different figures generally refer to corresponding parts unless otherwise indicated. The figures are drawn to clearly illustrate the relevant aspects of the preferred embodiments and are not necessarily drawn to scale.
  • DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS
  • [0018]
    The making and using of the presently preferred embodiments are discussed in detail below. It should be appreciated, however, that the present invention provides many applicable inventive concepts that can be embodied in a wide variety of specific contexts. The specific embodiments discussed are merely illustrative of specific ways to make and use the invention, and do not limit the scope of the invention.
  • [0019]
    The present invention will be described with respect to preferred embodiments in specific contexts, namely implemented in CMOS device applications. Embodiments of the invention may also be implemented in other semiconductor applications such as memory devices, logic devices, power devices, and other applications that utilize capacitors, for example.
  • [0020]
    Some properties of capacitors are a function of size. A larger amount of energy or voltage may be stored by a capacitor the larger the capacitor plates are, for example. In some semiconductor device applications, it is desirable to increase the capacitance of capacitors, but the real estate of the chip is limited. Thus, what are needed in the art are improved methods of manufacturing capacitors and structures thereof that make efficient use of area of the integrated circuit.
  • [0021]
    These and other problems are generally solved or circumvented, and technical advantages are generally achieved, by preferred embodiments of the present invention, which comprise novel capacitor structures that are formed in multiple conductive layers of semiconductor devices. The capacitor plates of the capacitors have a novel shape, comprising a plurality of propeller-shaped portions that are connected together by via portions, to be described further herein.
  • [0022]
    FIG. 1 shows a cross-sectional view of a semiconductor device 100 in accordance with a preferred embodiment of the present invention, wherein a capacitor plate 114 (and also capacitor plate 116, shown in FIG. 2) of a capacitor 130 is formed in a plurality of conductive layers Mx, Vx, and M(x+1) of the semiconductor device 100. To manufacture the semiconductor device 100, first, a workpiece 102 is provided. The workpiece 102 may include a semiconductor substrate comprising silicon or other semiconductor materials and may be covered by an insulating layer, for example. The workpiece 102 may also include other active components or circuits formed within and/or over the workpiece 102, not shown. The workpiece 102 may comprise silicon oxide over single-crystal silicon, for example. The workpiece 102 may include other conductive layers or other semiconductor elements, e.g., transistors, diodes, etc., not shown. Compound semiconductors, GaAs, InP, Si/Ge, or SiC, as examples, may be used in place of silicon. The workpiece 102 may comprise a silicon-on-insulator (SOI) or a SiGe-on-insulator substrate, as examples.
  • [0023]
    An insulating material 104 a comprising a dielectric material is deposited over the workpiece 102. The insulating material 104 a is also referred to herein as a first insulating material 104 a, for example. The first insulating material 104 a preferably comprises about 1,000 to 4,000 Angstroms, or about 5,000 Angstroms or less, of an oxide such as SiO2, a nitride such as Si3N4, a high-k dielectric material having a dielectric constant greater than about 3.9, a low-k dielectric material having a dielectric constant less than about 3.9, a capping layer, a hybrid inter-level dielectric (ILD), or combinations and multiple layers thereof, as examples. Alternatively, the first insulating material 104 a may comprise other dimensions and materials, for example. The first insulating material 104 a may be formed using chemical vapor deposition (CVD), atomic layer deposition (ALD), metal organic chemical vapor deposition (MOCVD), physical vapor deposition (PVD), a spin-on process, or jet vapor deposition (JVD), as examples, although alternatively, other methods may also be used.
  • [0024]
    The first insulating material 104 a is patterned with a pattern for a propeller-shaped portion 106a, and then a conductive material is formed over the insulating material 104 a to fill the pattern and form the propeller-shaped portion 106 a. The propeller-shaped portion 106 a is also referred to herein as a first propeller-shaped portion 106 a, for example. The first propeller-shaped portion 106 a may be formed using a single damascene process, for example, wherein the insulating material 106 a is patterned using lithography and then portions of the insulating material 106 a are then etched away. The conductive material is formed over the first insulating material 106, and excess conductive material is removed from over the top surface of the first insulating material 106 a using an etch process and/or a chemical-mechanical polish (CMP) process, for example.
  • [0025]
    Alternatively, the first propeller-shaped portion 106 a may be formed using a subtractive etch process, wherein the conductive material 106 a is deposited or formed over the workpiece 102, and the conductive material 106 a is patterned using lithography in the shape of the first propeller-shaped portion 106 a. The first insulating material 104 a is then formed around the first propeller-shaped portion 106 a by depositing the first insulating material 104 a over the first propeller-shaped portion 106 a and removing any excess first insulating material 104 a from over the top surface of the first propeller-shaped portion 106 a, if necessary, for example.
  • [0026]
    The first insulating material 104 a and the first propeller-shaped portion 106 a are preferably formed in a metallization layer Mx of the semiconductor device 100. The metallization layer Mx is also referred to herein as a first metallization layer or a first conductive material layer, for example. Conductive lines, not shown, may be formed elsewhere on the semiconductor device 100 within the metallization layer Mx, for example. The conductive lines may be formed simultaneously with the formation of the first propeller-shaped portions 106 a, for example. Thus, additional etch processes and lithography processes may not be required to manufacture the novel first propeller-shaped portion 106 a in accordance with embodiments of the present invention. For example, the pattern for the first propeller-shaped portions 106 a may be included in an existing mask level for the first metallization layer Mx.
  • [0027]
    Only one first propeller-shaped portion 106 a is shown in FIG. 1; however, in accordance with embodiments of the present invention, a plurality of first propeller-shaped portions 106 a are preferably formed, e.g., simultaneously, in the metallization layer Mx (not shown; see FIG. 2).
  • [0028]
    The conductive material used to form the first propeller-shaped portion 106 a preferably comprises a metal and/or a semiconductive material, for example. The conductive material preferably comprises copper, aluminum, alloys thereof, polysilicon, amorphous silicon, or combinations or multiple layers thereof, as examples. Alternatively, the conductive material used to form the first propeller-shaped portion 106 a may comprise other materials.
  • [0029]
    A via portion 106 b is formed in a second metallization layer Vx over the first metallization layer Mx within a second insulating material 104 b, as shown in FIG. 1. The via portion 106 b is also referred to herein as a first via portion, for example. The metallization layer Vx is also referred to herein as a second metallization layer or a second conductive material layer, for example. The via portion 106 b may be formed using a damascene process or using a subtractive etch process, for example, as described for the formation of the first propeller-shaped portions 106 a in the first metallization layer Mx.
  • [0030]
    The via portion 106 b is disposed over and is coupled to the first propeller-shaped portion 106 a, as shown. The via portion 106 b may comprise a first end 112 a and a second end 112 c, wherein the first end 112 a of the via portion 106 b is coupled to the first propeller-shaped portion 106 a, as shown. The via portion 106 b may be coupled to the first propeller-shaped portion 106 a in a substantially central region of the propeller-shaped portion 106 a, as shown.
  • [0031]
    The second insulating material 104 b may comprise similar materials and dimensions as described herein for the first insulating material 104 a, for example. The second insulating material 104 b is preferably adjacent the first insulating material 104 a, as shown. The via portion 106 b may comprise similar materials as described herein for the first propeller-shaped portion 106 a, for example. Alternatively, the second insulating material 104 b and the via portion 106 b may comprise other materials or dimensions.
  • [0032]
    Conductive vias may be formed elsewhere on the semiconductor device 100 within the metallization layer Vx, for example, not shown. The conductive vias may be formed simultaneously with the formation of the via portion 106 b, for example. Thus, additional etch processes and lithography processes may not be required to manufacture the novel via portions 106 b in accordance with embodiments of the present invention. The pattern for the via portion 106 b may be included in an existing mask level for the second metallization layer Vx, for example.
  • [0033]
    Only one via portion 106 b is shown in FIG. 1; however, in accordance with embodiments of the present invention, a plurality of via portions 106 b are preferably formed, e.g., simultaneously, in the metallization layer Vx (not shown; see FIG. 2).
  • [0034]
    A second propeller-shaped portion 106c is formed in a third metallization layer M(x+1) over the second metallization layer Vx within a third insulating material 104 c, as shown in FIG. 1. The metallization layer M(x+1) is also referred to herein as a third metallization layer or a third conductive material layer, for example. The second propeller-shaped portion 106 c may be formed using a damascene process or using a subtractive etch process, for example, as described for the first metallization layer Mx.
  • [0035]
    The second propeller-shaped portion 106 c is disposed over and is coupled to the via portion 106 b, as shown. The second propeller-shaped portion 106 c may be coupled to the second end 112 c of the via portion 106 b, for example. The second propeller-shaped portion 106 c may be coupled to the via portion 106 b in a substantially central region of the second propeller-shaped portion 106 c, as shown.
  • [0036]
    The third insulating material 104 c may comprise similar materials and dimensions as described for the first insulating material 104 a, for example. The third insulating material 104 c is preferably adjacent the second insulating material 104 b, as shown. The second propeller-shaped portion 106 c may comprise similar materials as described for the first propeller-shaped portion 106 a, for example. Alternatively, the third insulating material 104 c and the second propeller-shaped portion 106 c may comprise other materials or dimensions.
  • [0037]
    Conductive lines may be formed elsewhere on the semiconductor device 100 within the metallization layer M(x+1), for example, not shown. The conductive lines may be formed simultaneously with the formation of the second propeller-shaped portions 106 c, for example. Thus, additional etch processes and lithography processes may not be required to manufacture the novel second propeller-shaped portion 106 c in accordance with embodiments of the present invention; rather, the second propeller-shaped portion 106 c pattern may be included in an existing mask level for the metallization layer M(x+1), for example.
  • [0038]
    Only one second propeller-shaped portion 106 c is shown in FIG. 1; however, in accordance with embodiments of the present invention, a plurality of second propeller-shaped portions 106 c are preferably formed, e.g., simultaneously, in the metallization layer M(x+1) (not shown; see FIG. 2).
  • [0039]
    In a preferred embodiment, the second propeller-shaped portion 106 c and the via portion 106 b are simultaneously formed using a dual damascene process. For example, the second insulating material 104 b and the third insulating material 104 c may be deposited over the first metallization layer Mx, and two lithography masks and etch processes are used to form patterns in the second insulating material 104 b and the third insulating material 104 c for the via portion 106 b and the second propeller-shaped portion 106 c, respectively, for example. The patterns for the via portion 106 b and the second propeller-shaped portion 106 c are then simultaneously filled with a conductive material using one deposition step, and excess conductive material is removed using an etch process and/or CMP process, leaving the via portion 106 b and the second propeller-shaped portion 106 c formed within the second insulating material 104 b and the third insulating material 104 c, respectively.
  • [0040]
    The metallization or conductive material layers Mx, Vx, and/or M(x+1) may comprise conductive material layers disposed at various locations of a semiconductor device 100. For example, layer Mx may comprise a first metallization layer, e.g., the first layer formed in a back-end-of the line (BEOL) process. Or, layer Mx may comprise a second or greater metallization layer, disposed above and over previously formed metallization layers. Alternatively, layers Mx, Vx, and/or M(x+1) may comprise conductive material layers formed in a front-end-of the line (FEOL) process, for example.
  • [0041]
    The first propeller-shaped portion 106 a, the via portion 106 b, and the second propeller-shaped portion 106 c form a capacitor plate (e.g., plates 114 and 116 shown in a top view in FIG. 2) of a capacitor 130 in accordance with embodiments of the present invention. Two capacitor plates 114 and 116 may be formed proximate one another within the insulating materials 104 a, 104 b, and 104 c, forming a capacitor 130, in accordance with embodiments of the present invention. Portions of the insulating materials 104 a, 104 b, and 104 c function as a capacitor dielectric in these embodiments. Two or more capacitor plates 114 and/or 116 may be coupled together to form a single capacitor plate, to be described further herein.
  • [0042]
    FIG. 2 shows a top view of a capacitor 130 including two capacitor plates 114 and 116 comprising propeller-shaped portions 106 c (and also 106 a, not shown) in accordance with a preferred embodiment of the present invention. The second propeller-shaped portions 106 c are shown in the top view of FIG. 2; however, the first propeller-shaped portions are not shown in FIG. 2 (refer again to FIG. 1), for example. The via portions 106 b are shown in phantom in FIG. 2.
  • [0043]
    In accordance with a preferred embodiment of the present invention, the second propeller-shaped portions 106 c of the capacitor plates 114 and 116 (and also the first propeller-shaped portions 106 a) preferably comprise members 108 c and 110 c having widths that substantially comprise a minimum feature size of the semiconductor device 100, for example. The second propeller-shaped portions 106 c (and also the first propeller-shaped portions 106 c) of the capacitor plates 114 and 116 are also preferably spaced apart by a dimension d1 that is substantially equal to the minimum feature size of the semiconductor device 100, for example. The via portions 106 b, shown in phantom, may also comprise a minimum feature size of the semiconductor device 100, for example. The members 108 c and 110 c are also referred to herein as blades, for example.
  • [0044]
    The capacitor plates 114 and 116 may comprise a first capacitor plate 116 and a second capacitor plate 114 of a capacitor 130. The first propeller-shaped portion 106 a or the second propeller-shaped portion 106 c of the first capacitor plate 116 may comprise an inner corner, e.g., where the vertical and horizontal members 108 c and 110 c intersect. The first propeller-shaped portion 106 a or the second propeller-shaped portion 106 c of the second capacitor plate 114 may comprise an outer corner, e.g., at an outer corner of an edge of a blade or member 108 c or 110 c. The inner corner of the first propeller-shaped portion 106 a or the second propeller-shaped portion 106 c of the first capacitor plate 116 is preferably spaced apart from the first propeller-shaped portion 106 a or the second propeller-shaped portion 106 c of the second capacitor plate 114 by a dimension d2 of about 1.4 times the minimum feature size of the semiconductor device 100 in some embodiments, for example. Dimension d2 represents the space between a via portion 106 b and an adjacent first or second propeller-shaped portion 106 a or 106 c, for example.
  • [0045]
    The propeller-shaped portions 106 a and 106 c of capacitor plates 114 and 116 in accordance with embodiments of the present invention preferably comprise a horizontally-extending member and a vertically-extending member, the vertically-extending member being substantially orthogonal to and coupled to the horizontally-extending member. The horizontally-extending member and the vertically-extending member intersect, as shown. The first propeller-shaped portion 106 a (see FIG. 1) may comprise a first member that is horizontally oriented in a top view, and a second member that is vertically oriented in a top view, wherein the first member is substantially orthogonal to and coupled to the second member, not shown. The first member and the second member may intersect proximate a substantially central region of the first member and the second member. Likewise, the second propeller-shaped portion 106 c may comprise a third member and a fourth member that is orthogonal to the third member.
  • [0046]
    For example, in the top view shown FIG. 2, the second propeller-shaped portion 106 c comprises a third member 108 c and a fourth member 110 c, the fourth member 110 c being substantially orthogonal to and coupled to the third member 108c. The third member 108 c and the fourth member 110 c intersect proximate a substantially central region of the third member 108 c and the fourth member 110 c. The via portion 106 b is preferably coupled to the second propeller-shaped portion 106 c at the second end 112 c of the via portion 106 b, as shown in phantom.
  • [0047]
    The members 108 c and 110 c preferably comprise the same length in accordance with some embodiments of the present invention. For example, member 108 c may comprise a first length, and member 110 c may comprise a second length, the second length being substantially the same as the first length.
  • [0048]
    In other embodiments, the members 108 c and 110 c comprise different lengths, to be described further herein with respect to the embodiments shown in FIGS. 6 and 7. For example, the second length of member 110 c may be different than the first length of member 108 a.
  • [0049]
    The first propeller-shaped portion 106 a or the second propeller-shaped portion 106 c preferably comprises a plurality of blades. In a preferred embodiment, the first propeller-shaped portion 106 a or the second propeller-shaped portion 106 c preferably comprises three or more blades. In other embodiments, the first propeller-shaped portion 106 a or the second propeller-shaped portion 106 c preferably comprises exactly four blades, as shown in the top view of FIG. 2, for example. Each member 108 c and 110 c may comprise two blades, for example. In yet other embodiments, the first propeller-shaped portion 106 a or the second propeller-shaped portion 106 c preferably comprises the shape of a cross, the letter “X,” or the letter “T,” as examples, although alternatively, other shapes may also be used. The first propeller-shaped portion 106 a or the second propeller-shaped portion 106 c may also comprise five, six, or more blades, as examples.
  • [0050]
    Preferably, in some embodiments, the first propeller-shaped portion 106 a or the second propeller-shaped portion 106 c preferably comprises a shape that improves a CMP process for the conductive material layer Mx or M(x+1) that the propeller-shaped portions 106 a or 106 c are formed in, for example. The first propeller-shaped portion 106 a or the second propeller-shaped portion 106 c preferably comprise similar sizes and dimensions as other conductive features formed in the same conductive material layer, for example, in these embodiments.
  • [0051]
    The first propeller-shaped portion 106 a and the second propeller-shaped portion 106 c may comprise the same shape and dimension for a single capacitor plate 114 or 116, for example. Alternatively, the first propeller-shaped portion 106 a and the second propeller-shaped portion 106 c may comprise different shapes and dimensions for a single capacitor plate 114 or 116, for example. The first propeller-shaped portion 106 a and the second propeller-shaped portion 106 c may comprise the same or different shapes and dimensions for various capacitor plates 114 or 116 of a single capacitor 130 or across the surface of a semiconductor device 100, for example.
  • [0052]
    FIG. 3 shows a top view of a plurality of capacitor plates 114 and 116 of capacitors 130 in accordance with a preferred embodiment of the present invention. In some embodiments, an array of capacitor plates 114 and 116 comprising the second propeller-shaped portions 106 c, via portions 106 b, and also the first propeller-shaped portions 106 a, not shown, are preferably formed across a portion of a semiconductor workpiece 102, for example. The second propeller-shaped portions 106 c may be staggered and the blades interwoven and spaced apart to achieve a desired capacitance and to achieve a more efficient use of space, for example. The arrangement of the second propeller-shaped portions 106 c shown is merely shown as an example; the second propeller-shaped portions 106 c may be arranged in other shapes and patterns, for example.
  • [0053]
    FIG. 4 shows a perspective view of capacitor plates of capacitors 130 in accordance with embodiments of the present invention. The capacitors 130 may include three or more propeller-shaped portions 106 a, 106 c, and 106 e, as shown in phantom. For example, a second via portion 106 d may be coupled to the first propeller-shaped portion 106 a, and a third propeller-shaped portion 106 e may be coupled to the second via portion 106 d. The second via portion 106 d may be formed in a conductive material layer V(x−1), and the propeller-shaped portion 106 e may be formed in a conductive material layer M(x−1), for example. Additional via portions and propeller-shaped portions may be coupled to and disposed above and/or below propeller-shaped portions 106 c and 106 e, not shown.
  • [0054]
    For example, the via portion 106 b comprises a first via portion 106 b, and the capacitor plates further comprise a second via portion 106 d disposed within a fourth insulating material of the semiconductor device 100, the fourth insulating material being adjacent the insulating material that the first propeller-shaped portions 106 a are formed in. The third propeller-shaped portion 106 e is disposed in a fifth insulating material of the semiconductor device 100, the fifth insulating material being adjacent the fourth insulating material. The second via portion 106 d is disposed between the first propeller-shaped portion 106 a and the third propeller-shaped portion 106 e, as shown. Additional via portions and propeller-shaped portions may be disposed above the second propeller shaped portions 106 c, for example, in additional insulating material layers, not shown.
  • [0055]
    Thus, capacitor plates of capacitors 130 may comprise a plurality of propeller-shaped portions 106 a, 106 c, and 106 e coupled together by a plurality of via portions 106 b and 106 c in accordance with embodiments of the present invention, for example. The propeller-shaped portions 106 a, 106 c, and 106 e and the via portions 106 b and 106 c may be formed in multiple conductive material layers, or in every conductive material layer of a semiconductor device 100, for example.
  • [0056]
    FIG. 5 shows a top view of another preferred embodiment of the present invention, wherein two or more capacitor plates 114 or 116 are electrically coupled together using a conductive material layer of the semiconductor device disposed above or below the capacitor plates 114 and 116. Conductive lines 120 a, 120 b, 120 c, and 120 d may be formed in the conductive material layer, as shown in phantom. Two or more capacitor plates 114 or 116 may be coupled together by a conductive line 120 a, 120 b, 120 c, and 120 d in a conductive material layer adjacent the first conductive material layer Mx or the third conductive material layer M(x+1) shown in FIG. 1, for example. The conductive lines 120 a, 120 b, 120 c, and 120 d may be coupled to the second propeller-shaped portions 106 c (or to the first propeller-shaped portions 106 a disposed below the propeller-shaped portions 106 c, not shown in FIG. 5) using vias, also not shown. The vias may be coupled proximate via portions 106 b, for example, or the vias connecting the conductive lines 120 a, 120 b, 120 c, and 120 d may be coupled along the members 108 c and/or 110 c, as another example, not shown.
  • [0057]
    FIG. 6 shows another embodiment of the present invention, wherein one blade of a propeller of a capacitor plate 214 is elongated and extends proximate an elongated blade of a propeller of an adjacent capacitor plate 216. Like numerals are used for the various elements in FIG. 6 that were used to describe FIGS. 1 through 5. To avoid repetition, each reference number shown in FIG. 6 is not described again in detail herein. Rather, similar materials x06, x08, x10, etc. . . . are preferably used to describe the various material layers shown as were used to describe FIGS. 1 through 5, where x=1 in FIGS. 1 through 5 and x=2 in FIG. 6. As an example, the preferred and alternative materials and dimensions described for the second propeller-shaped portions 106 c in the description for FIGS. 1 through 5 are preferably also used for the second propeller-shaped portions 206 c shown in FIG. 6.
  • [0058]
    In the embodiment shown in FIG. 6, each second propeller-shaped portion 206 c has one blade that is longer than the other blades. Each second propeller-shaped portion 206 c comprises two blades extending in a vertical direction having a dimension d4. Each second propeller-shaped portion 206 c comprises two blades extending in a horizontal direction having dimensions d3 and d5, wherein dimension d5 is preferably greater than dimension d3 and d4. Dimensions d3 and d4 may be substantially the same, for example. Dimension d5 is preferably about three times or more greater than dimension d3 and d4, for example.
  • [0059]
    The longer blades having dimension d5 are preferably interwoven for adjacent second propeller-shaped portions 206 c, as shown, for example. The second propeller-shaped portions 206 c may also be staggered, as shown. Adjacent second propeller-shaped portions 206 c are preferably interwoven in a comb-like fashion to achieve a particular desired capacitance, for example. The dimensions of the blades and type of dielectric material (e.g., of insulating materials 104 a, 104 b, and 104 c shown in FIG. 1) are preferably also selected to achieve a desired capacitance for the capacitor 230, for example. Multiple capacitor plates 214 and 216 may be coupled together using conductive lines 220 a, 220 b, 220 c, and 220 d in a conductive material layer proximate the second propeller-shaped portions 206 c (or proximate first propeller-shaped portions disposed beneath the second propeller-shaped portions 206d, not shown).
  • [0060]
    FIG. 7 shows yet another preferred embodiment of the present invention, wherein two blades of the propeller-shaped portions 306 c of the capacitor plates 314 and 316 are elongated, and wherein the blades of two adjacent capacitor plates 314 or 316 are coupled together, e.g., at the ends 332. Again, like numerals are used for the various elements that were used to describe the previous figures, and to avoid repetition, each reference number shown in FIG. 7 is not described again in detail herein.
  • [0061]
    The capacitor plates 314 and 316 are preferably cross-shaped in this embodiment. The cross-shape structure may be symmetric as shown, or asymmetric.
  • [0062]
    The ends 332 of blades of adjacent propeller-shaped portions 306 c in this embodiment are preferably coupled together or attached, providing electrical connection between adjacent propeller-shaped portions 306 c, for example. This embodiment is advantageous because an additional conductive material layer is not required to be used to couple together the capacitor plates 314 or 316; e.g., conductive lines 120 a, 120 b, 120 c, 120 d and 220 a, 220 b, 220 c, and 220 d shown in phantom in FIGS. 5 and 6, respectively, are not required. Longer blades of the propeller-shaped portions 306 c may have a dimension d6, and shorter blades have a dimension d7, wherein the longer blades are preferably about three times or greater longer than the shorter blades, for example. The longer blades of the propeller-shaped portions 306 c may be spaced apart by a dimension d8, wherein dimension d8, is about equal to twice the dimension d7, for example.
  • [0063]
    Connecting the ends 332 of the blades together may be advantageous in some embodiments, because the plates 314 and 316 may be connected to form a single electrical potential, maximizing the efficiency of the available surface area, as well as providing an excellent dummy filler for global planarization processes, for example.
  • [0064]
    FIGS. 8 and 9 show top views of a semiconductor device 400 in accordance with a preferred embodiment of the present invention. Again, like numerals are used for the various elements that were used to describe the previous figures, and to avoid repetition, each reference number shown in FIGS. 8 and 9 are not described again in detail herein.
  • [0065]
    A top view of a material layer is shown in FIG. 8 that includes conductive lines 440 and a plurality of features 442 and 444 comprising various sizes, wherein an unused region 446 of the semiconductor device 400 is absent conductive lines 440 and features 442 and 444. The novel capacitors 430 described herein may be formed in the unused region 446 of the semiconductor device, as shown in FIG. 9. Thus, in accordance with some embodiments of the present invention, capacitor plates comprising propeller-shaped portions may be formed in unused regions of a semiconductor device 400, to efficiently use the surface area of the semiconductor device 400.
  • [0066]
    Alternatively, the capacitor plates described herein may be formed in a dedicated region of the semiconductor device 400, wherein the region the capacitor plates are formed in is dedicated particularly for the formation of the capacitors 130, 230, 330, and 430 described herein, for example.
  • [0067]
    After the top-most material layer comprising propeller-shaped portions 106 c, 206 c, 306 c, and 406 c of the capacitors 130, 230, 330, and 430 is fabricated, the manufacturing process for the semiconductor devices 100, 200, 300, and 400 is then continued to complete the fabrication of the semiconductor devices. For example, additional insulating material layers and conductive material layers may be formed over the novel capacitors 130, 230, 330, and 430 and may be used to interconnect the various components of the semiconductor devices 100, 200, 300, and 400.
  • [0068]
    In the drawings, the ends of the propeller-shaped portions 106 a, 106 c, 206 c, 306 c, and 406 c are shown as being substantially square; alternatively, due to the lithography processes used to pattern the propeller-shaped portions 106 a, 106 c, 206 c, 306 c, and 406 c, the ends of the propeller-shaped portions 106 a, 106 c, 206 c, 306 c, and 406 c may also be rounded, for example, not shown.
  • [0069]
    Embodiments of the present invention include semiconductor devices 100, 200, 300, and 400 and capacitors 130, 230, 330, and 430 having propeller-shaped portions 106 a, 106 c, 206 c, 306 c, and 406 c as capacitor plates 114, 116, 214, 216, 314, and 316. Embodiments of the present invention also include methods of fabricating the semiconductor devices 100, 200, 300, and 400 and capacitor plates 114, 116, 214, 216, 314, and 316, and capacitors 130, 230, 330, and 430 described herein, for example.
  • [0070]
    The novel capacitor plates 114, 116, 214, 216, 314, and 316 comprise three-dimensional structures that are formed in multiple conductive material layers Mx, Vx, and M(x+1) of a semiconductor device 100, 200, 300, and 400. The propeller-shaped portions 106 a, 106 c, 206 c, 306 c, and 406 c coupled together by via portions 106 b and 206 b provide a novel capacitor plate 114, 116, 214, 216, 314, and 316 shape that provides flexibility in the placement and shaping of capacitors 130, 230, 330, and 430 of semiconductor devices 100, 200, 300, and 400. In some embodiments, the propeller-shaped portions 106 a, 106 c, 206 c, 306 c, and 406 c are preferably ground-rule based, comprising a width of a minimum feature size of a semiconductor device 100, 200, 300, and 400, achieving a higher capacitance value, for example.
  • [0071]
    The capacitor plates 114, 116, 214, 216, 314, and 316 described herein may be placed in series or in parallel. For example, placing the capacitor plates 114, 116, 214, 216, 314, and 316 in series reduces the overall capacitance of the capacitors 130, 230, 330, and 430 comprised of the capacitor plates 114, 116, 214, 216, 314, and 316. Placing the capacitor plates 114, 116, 214, 216, 314, and 316 in parallel increases the overall capacitance of the capacitors 130, 230, 330, and 430 comprised of the capacitor plates 114, 116, 214, 216, 314, and 316.
  • [0072]
    Advantages of embodiments of the present invention include providing improved methods of utilizing space in semiconductor devices 100, 200, 300, and 400 by fabricating capacitors 130, 230, 330, and 430 in electrically unused areas of metallization layers. A plurality of the capacitors 130, 230, 330, and 430 may be arranged in an array and may be accessed using addressing, for example. The capacitors 130, 230, 330, and 430 may be electrically connected to functional regions of the semiconductor device 100, 200, 300, or 400 or may be used as spare capacitors 130, 230, 330, and 430, providing redundancy in an integrated circuit.
  • [0073]
    In some embodiments, the propeller-shaped portions 106 a, 106 c, 206 c, 306 c, and 406 c of the capacitors 130, 230, 330, and 430 have substantially the same or similar dimensions as other interconnect features or devices such as conductive lines 440 and devices 442 and 444, so that the capacitors 130, 230, 330, and 430 are easily integratable into existing semiconductor device structures and manufacturing process flows. The capacitors 130, 230, 330, and 430 may be used as dummy or functional fill structures to improve CMP processes used to planarize a conductive material layer, for example. The novel capacitors 130, 230, 330, and 430 are small, fast, and low in complexity and cost. The properties of the capacitors 130, 230, 330, and 430 may be tuned by adjusting the capacitor 130, 230, 330, and 430 dielectric thickness and materials, and by array arrangement, as examples.
  • [0074]
    The novel capacitors 130, 230, 330, and 430 may function as spare capacitors 130, 230, 330, and 430 in an integrated circuit design, providing redundancy in the design.
  • [0075]
    Although embodiments of the present invention and their advantages have been described in detail, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims. For example, it will be readily understood by those skilled in the art that many of the features, functions, processes, and materials described herein may be varied while remaining within the scope of the present invention. Moreover, the scope of the present application is not intended to be limited to the particular embodiments of the process, machine, manufacture, composition of matter, means, methods and steps described in the specification. As one of ordinary skill in the art will readily appreciate from the disclosure of the present invention, processes, machines, manufacture, compositions of matter, means, methods, or steps, presently existing or later to be developed, that perform substantially the same function or achieve substantially the same result as the corresponding embodiments described herein may be utilized according to the present invention. Accordingly, the appended claims are intended to include within their scope such processes, machines, manufacture, compositions of matter, means, methods, or steps.
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Citing PatentFiling datePublication dateApplicantTitle
US7944732Nov 21, 2008May 17, 2011Xilinx, Inc.Integrated capacitor with alternating layered segments
US7956438Nov 21, 2008Jun 7, 2011Xilinx, Inc.Integrated capacitor with interlinked lateral fins
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US7994610Nov 21, 2008Aug 9, 2011Xilinx, Inc.Integrated capacitor with tartan cross section
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US8362589Jan 29, 2013Xilinx, Inc.Integrated capacitor with cabled plates
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US20100127349 *Nov 21, 2008May 27, 2010Xilinx, Inc.Integrated capacitor with array of crosses
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Classifications
U.S. Classification257/532, 257/E29.001, 361/303, 438/396, 257/E21.008
International ClassificationH01L21/02, H01L29/00, H01G4/00
Cooperative ClassificationY10T29/43, H01L2924/0002, H01L27/0203, H01L23/5223, H01G4/005, H01L28/87
European ClassificationH01L28/87, H01L23/522C4
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