US20090174376A1

US20090174376A1 - DC-DC converter

Info

Publication number: US20090174376A1
Application number: US12/291,993
Authority: US
Inventors: Fred O. Barthold
Original assignee: Individual
Current assignee: Individual
Priority date: 2007-12-04
Filing date: 2008-11-14
Publication date: 2009-07-09
Also published as: US7777458B2; JP2011505790A; US20090174375A1; US7812577B2; JP5542061B2; WO2009073078A1; JP5764695B2; CN101952786A; CN101952786B; EP2227724A1; JP2014180206A

Abstract

A Single Ended Primary Inductance Converter (SEPIC) fed BUCK converter includes: a first switch configured to open or close according to a first signal; a SEPIC portion coupled to the first switch and coupled to an energy source, the SEPIC portion comprising a first set of one or more passive components; a BUCK converter portion coupled to the first switch, the BUCK converter portion comprising a second set of one or more passive components. While the first switch is closed, the SEPIC portion is configured to store energy from an energy source in at least some of the first set of passive components and deliver energy to the BUCK portion, and the BUCK converter portion is configured to deliver energy to a load and to store energy in at least some of the second set of passive components. While the first switch is open, the SEPIC portion is configured to deliver at least some of its stored energy to the load, and the BUCK converter portion is configured to deliver at least some of its stored energy to the load.

Description

CROSS REFERENCE TO OTHER APPLICATIONS

This application claims priority to U.S. Provisional Patent Application No. 60/992,194 entitled METHOD AND APPARATUS FOR POWER CONVERSION filed Dec. 4, 2007 which is incorporated herein by reference for all purposes; and claims priority to U.S. Provisional Patent Application No. 61/013,187 entitled METHOD AND APPARATUS FOR POWER CONVERSION filed Dec. 12, 2007 which is incorporated herein by reference for all purposes.

BACKGROUND OF THE INVENTION

Modern electronic devices often require power conversion. For example, battery operated devices such as notebook computers and mobile phones often include microprocessors that require the batteries to supply low voltages and high currents. BUCK converter is a type of step-down converter often used in DC-DC power conversion applications. FIG. 1 is a schematic diagram illustrating a conventional BUCK converter. BUCK converter 100 is sometimes referred to as a synchronized BUCK converter because switches S_1Band S_2Bare synchronized to alternately turn on or off.
Conversion efficiency and transient response are important parameters of step-down converters. Conversion efficiency determines how much power is lost during power conversion; transient response determines how quickly the converter can respond to load current or source voltage changes. In the conventional topology shown in FIG. 1, it is often difficult to both increase conversion efficiency and improve transient response since switch and parasitic losses are directly proportional to the switch mode frequency, while the value of the integrating inductor L_BUCKdetermines the first order transient response and is inversely proportional.

BRIEF DESCRIPTION OF THE DRAWINGS

Various embodiments of the invention are disclosed in the following detailed description and the accompanying drawings.

FIG. 1 is a schematic diagram illustrating a conventional BUCK converter.

FIG. 2A is a schematic diagram illustrating an embodiment of a SEPIC FED BUCK converter.

FIG. 2B is a diagram illustrating the magnetic structure of device 200 of FIG. 2A, with attendant voltage, current, and SEPIC FED BUCK coupling identities.

FIG. 2C is a set of graphs illustrating the timing, voltage, and current identities of device 200 of FIG. 2A, with attendant timing, voltage, and current summation expressions.

FIG. 2D is a schematic diagram illustrating an embodiment of an SFB converter that is configured to perform a Gate Charge Extraction (GCE) process when the S_1SBswitch is turned off.

FIG. 2E is a schematic diagram illustrating an embodiment of a commutation matrix included in SFB converter 200 of FIG. 2A.

FIG. 3 is a graph illustrating the turn-on or turn-off loss ratios (K) associated with a SIB switch of a conventional BUCK converter and a S_1SBswitch of a comparatively identical SFB converter embodiment.

FIG. 4A is a graph illustrating the first order approximation of turn-on and turn-off losses associated with switch SIB of BUCK converter 100.

FIG. 4B is a graph illustrating the first order approximation of turn-on and turn-off losses associated with switch S_1SBof SFB converter 250, as well as attendant switch voltage, switch current, and switch power loss identities and expressions in terms of the duty cycle of the switch (D).

FIG. 5A is a schematic diagram illustrating an embodiment of a single magnetic, magnetically coupled SEPIC FED BUCK converter with attendant voltage, current, and transfer function (M) identities.

FIG. 5B illustrates the magnetic structure of converter 500 of FIG. 5A, with attendant voltage, current, and SEPIC FED BUCK coupling identities.

FIG. 5C is a set of graphs illustrating the timing, voltage, and current identities of device 500 of FIG. 5A, with attendant timing, voltage, and current summation expressions.

FIG. 5D is a schematic diagram illustrating an SFB converter during a GCE process.

FIG. 5E is a schematic diagram illustrating a commutation matrix included in SFB converter 500 of FIG. 5A.

FIG. 6A is a schematic diagram illustrating an embodiment of a multi-phase magnetically coupled, single magnetic SFB converter with attendant voltage, current, and transfer function (M) identities.

FIG. 6B is a diagram illustrating the magnetic structure of converter 600 of FIG. 6A, with attendant voltage, current, and SEPIC FED BUCK coupling identities.

FIG. 6C is a set of graphs illustrating the timing, voltage, and current identities of device 600 of FIG. 6A, with attendant timing, voltage, and current summation expressions.

FIG. 7A is a schematic diagram illustrating another embodiment of a SFB converter.

FIG. 7B is a diagram illustrating the magnetic structure of SFB converter 700 of FIG. 7A, with attendant voltage, current, and SEPIC FED BUCK coupling identities.

FIG. 7C is a set of graphs illustrating the timing, voltage, and current identities of SFB converter 700 of FIG. 7A, with attendant timing, voltage, and current summation expressions.

FIGS. 8A-8D illustrate the inductive windings in a conventional BUCK converter and in several SFB converters, with attendant current identities and dimensional expressions.

FIG. 8E is a graph illustrating the conductive loss ratios of a conventional BUCK converter and SFB converters.

FIG. 9 is a graph illustrating the inductor set/reset ratios of a SFB converter (e.g.,

SFB

200, 500, 600 or 700) and a canonical BUCK converter.

DETAILED DESCRIPTION

The invention can be implemented in numerous ways, including as a process; an apparatus; a system; and/or a composition of matter. In this specification, these implementations, or any other form that the invention may take, may be referred to as techniques. In general, the order of the steps of disclosed processes may be altered within the scope of the invention. Unless stated otherwise, a component such as a processor or a memory described as being configured to perform a task may be implemented as a general component that is temporarily configured to perform the task at a given time or a specific component that is manufactured to perform the task. As used herein, the term ‘processor’ refers to one or more devices, circuits, and/or processing cores configured to process data, such as computer program instructions.
A detailed description of one or more embodiments of the invention is provided below along with accompanying figures that illustrate the principles of the invention. The invention is described in connection with such embodiments, but the invention is not limited to any embodiment. The scope of the invention is limited only by the claims and the invention encompasses numerous alternatives, modifications and equivalents. Numerous specific details are set forth in the following description in order to provide a thorough understanding of the invention. These details are provided for the purpose of example and the invention may be practiced according to the claims without some or all of these specific details. For the purpose of clarity, technical material that is known in the technical fields related to the invention has not been described in detail so that the invention is not unnecessarily obscured.
Embodiments of a Single Ended Primary Inductance Converter (SEPIC) fed BUCK (SFB) converter are disclosed. The converter includes a SEPIC portion that is galvanically or magnetically coupled to a BUCK converter portion. The SEPIC portion and the BUCK converter portion share a switch. While the switch is closed, the SEPIC portion is configured to store energy from an energy source and to deliver energy to the BUCK converter portion, and the BUCK converter portion is configured to deliver energy it receives from the SEPIC portion to the load and to store energy. While the switch is open, the SEPIC portion is configured to deliver at least some of its stored energy to the load, and the BUCK converter portion is configured to deliver at least some of its stored energy to the load.
FIG. 2A is a schematic diagram illustrating an embodiment of a SEPIC FED BUCK converter. An ideal circuit without parasitic effects is shown for purposes of clarity. In this example, device 200 includes a SEPIC portion coupled to a BUCK converter portion. Switch S_1SBis coupled to both the SEPIC portion and the BUCK converter portion. As will be described in greater detail below, the SEPIC portion and the BUCK converter portion are galvanically coupled. The SEPIC portion includes switch S_2S(also referred to as the SEPIC portion associated switch) and a set of passive components including coupled inductors T_1Aand T_1B, capacitor C₂, as well as optional input capacitor C₁. An energy source E_in(such as a battery) is coupled to the inductors at input nodes A and E. The negative terminal of the energy source is sometimes referred to as the ground terminal. The BUCK converter portion includes switch S_2B(also referred to as the BUCK converter portion associated switch) and a set of passive components. In this case the passive components include inductor T_1C. A load R is optionally coupled between a terminal of inductor T_1Cand the negative terminal of the input source. Switch S_1SBis configured to open or close according to a first switching signal. Switches S_2Band S_2Sare configured to open or close according to a second switching signal. In the embodiment shown, the switching signals are provided by a controller 206, which is optionally included in the SFB converter in some embodiments. In various embodiments, the controller may be a discrete component separately coupled to the SFB converter circuitry, or an integrated component of the circuitry. The first and second switching signals are synchronized to be opposite of each other. In other words, when S_1SBis open, S_2Band S_2Sare closed, and vice versa. For purposes of clarity in the following discussions it is assumed that in the converter circuit, the inductors have the same inductance. Different inductance values may be used in other embodiments. The transfer function of the converter (i.e., the ratio of the output voltage E_outto the input voltage E_in) is expressed as:
M=D/(2−D),
where D is the duty cycle of the switching signal associated with S_1SB, and where D={1−[(E_in−E_out)/(E_in+E_out)]}.
In the embodiment shown, an input capacitor C₁, an intermediate capacitor C₂, an output capacitor C₃are included to provide integrating functions. S_2Band S_2Sare implemented using transistors that include gate terminals. An optional drive inductor T_1Dis included in the circuit to provide common mode drive to the gate terminal of S_2Sto turn the transistor of S_2Soff or on, thereby opening or closing the switch. T_1D, however, does not substantially perform power conversion function in this example. In some embodiments, drive inductor T_1Dis replaced with a solid state driver or any other appropriate driver.
FIG. 2B is a diagram illustrating the magnetic structure of device 200 of FIG. 2A, with attendant voltage, current, and SEPIC FED BUCK coupling identities. In this example, inductive windings T_1A, T_1B, T_1C, and T_1Dshare the same magnetic core.
FIG. 2C is a set of graphs illustrating the timing, voltage, and current identities of device 200 of FIG. 2A, with attendant timing, voltage, and current summation expressions. In the examples shown, T represents a period of the switching signal, t_ONrepresents the time period during which switch S_1SBis closed (in other words, the transistor used to implement the switch is turned on), and t_OFFrepresents the time period during which switch S_1SBis open (the transistor is turned off). The duty cycle of the switching signal is represented as D.
Referring to FIGS. 2A and 2C, during t_ON, S_1SBis closed while S_2Band S_2Sare open. DC currents I₁and I₃flow through inductors T_1Aand T_1B, respectively. Thus, energy from the source is stored in the inductors in the SEPIC portion. During this time, the SEPIC portion does not directly deliver energy to the load, but delivers energy from the source to the BUCK converter portion. At the same time, current I₆flows through T_1C. Energy is therefore stored in the inductor in the BUCK converter portion. According to FIG. 2C, I₂(graph J) is the current through capacitor C₂, and I₉(graph P) is the current through capacitor C₃. During t_ON, C₂and C₃discharge (set), and current I_outis delivered to the load. Thus, the BUCK converter portion delivers energy to the load during t_ON.
Again referring to FIGS. 2A and 2C, during t_OFF, S_1SBis open while S_2Band S_2Sare closed. Inductors T_1Aand T_1Bmaintain DC current flow. The SEPIC portion delivers at least some of its stored energy through switch S_2Sto the load without substantially storing energy in its inductors. Because the closed switch S_2Sforms an electrical path between the SEPIC portion and the load and because the electrical path has DC continuity, the energy transfer process does not require transformer action. Thus, the circuit is said to be galvanically coupled. The BUCK converter portion also delivers at least some of the energy that was stored in its inductor during t_OFF. The BUCK converter portion, however, does not substantially store energy during t_OFF. C₂and C₃charge (resest) during this period. The ON/OFF cycle is then repeated.
In some embodiments, the SFB converter is configured to implement a gate extraction process to reduce turn-off power loss and improve turn-off speed. FIG. 2D is a schematic diagram illustrating an embodiment of an SFB converter that is configured to perform a Gate Charge Extraction (GCE) process when the S_1SBswitch is turned off. In this example, device 250 is similar to device 200 shown in FIG. 2A. Switches S_1SB, S_2Band S_2Sare implemented using metal-oxide field-effect transistors (MOSFETs). Outputs of drivers DR1 and DR2 are coupled to the gates of the MOSFETs, providing switching signals that turn the transistors off and on. Driver return terminals 262 and 264 are coupled to the sources of their respective MOSFETs. During t_OFF, the voltage applied to the gate terminal of MOSFET S_1SBdrops to turn the device off. Inductor T_1A, however, will maintain its current flow, thus causing a current 268 to flow from the gate to the driver, thereby extracting charges accumulated in the gate-source capacitance of the MOSFET. Current 268 is therefore referred to as the GCE current. Since inductor T_1Bis coupled to T_1A, a current 270 is induced in T_1B. Current 270, referred to as the GCE induced current, flows in a loop in the opposite direction as current 268. Currents 268 and 270 combine to form a turn-off current. The GCE process allows SFB converter 250 to have fast turn off time and low turn off loss.
In some embodiments, the SFB converter includes a commutation matrix to improve the converter's turn-on characteristics by using a capacitance set/reset process to contain parasitic energy. FIG. 2E is a schematic diagram illustrating an embodiment of a commutation matrix included in SFB converter 200 of FIG. 2A. In the example shown, commutation matrix 280 includes a set of diodes and capacitors. Nodes B, C, E, and F of the commutation matrix are coupled to nodes B, C, E, and F of SFB converter 200. Voltage identities associated with the capacitors C_com1, C_com2, and C_com3are expressed as:
E _Ccom1 =E _Ccom2=(E _in +E _out)/2; and
E _Ccom3=(E _in −E _out)/2.
FIG. 3 is a graph illustrating the turn-on or turn-off loss ratios (K) associated with a S_1Bswitch of a conventional BUCK converter and a S_1SBswitch of a comparatively identical SFB converter embodiment. In this example, turn-on or turn-off loss of switch S_1SBof SFB converter 250 is compared with that of switch S_1Bof conventional BUCK converter 100. In this example, converters 100 and 250 are said to be comparatively identical since they are assumed to have switches with identical characteristics, and the same E_inand I_out. The switches are assumed to turn on and off at the same rate. When the switch is turned on (i.e., the switch is closed), the voltage across the switch does not drop to zero instantaneously, therefore causes turn-on loss. When the switch is turned off (i.e., the switch is open), the current through the switch also does not drop to zero instantaneously and also causes turn-off loss. The turn-on and turn-off loss of the conventional BUCK converter 100 is assumed to be 1, shown as line 300.
A first order approximation of the ratio of the turn-on loss of the SFB converter 250 to the turn-on loss of the BUCK converter 100 is expressed as:
K _SFBon=1/(2−D)³,
where D is the duty cycle of the switching signal. The loss curve as a function of D corresponds to curve 302 in the figure.
A first order approximation of the ratio of turn-off loss of the SFB converter to turn-off loss of the BUCK converter is expressed as:
K _SFBoff =a ²/[2E _in ²(2−D)],
where a corresponds to a device transconductance characteristic and E_incorresponds to an input voltage of the converter. The loss curve corresponds to curve 304.
A first order approximation of the ratio of the total (turn-on plus turn-off) loss of the SFB converter to the total loss of the BUCK converter is expressed as:
K _SFBTotal=0.5(K _SFBon +K _SFBoff).
The loss curve corresponds to curve 306.
FIG. 4A is a graph illustrating the first order approximation of turn-on and turn-off losses associated with switch S_1Bof BUCK converter 100. The attendant switch voltage, switch current, and switch power identities and expressions in terms of the duty cycle of the switch (D) are also illustrated.
FIG. 4B is a graph illustrating the first order approximation of turn-on and turn-off losses associated with switch S_1SBof SFB converter 250, as well as attendant switch voltage, switch current, and switch power loss identities and expressions in terms of the duty cycle of the switch (D). Since the operating current I_Dassociated with switch S_1SBof SFB converter 250 is significantly less than the operating current I_Dassociated with switch S_1Bof BUCK converter 100, the turn-on loss is significantly reduced. A first order approximation of turn-on power loss associated with turning on S_1SBis:
P _LossSFBon=[0.25(E _in +E _out)·I _out(2−D)]·T _turn-on ·f,
wherein E_incorresponds to the input voltage of the converter, I_outcorresponds to the output current of the converter, D corresponds to the duty cycle of the switching signal, T_turn-oncorresponds to the amount of time required to turn on the switch, and f corresponds to the frequency of the switching signal.
A first order approximation of turn-off power loss associated with turning off S_1SBis:
P _LossSFBoff=0.5a·[I _out/(2−D)]·T _turn-off ·f,
wherein a corresponds to a device transconductance characteristic (which equals 2 volts in this example), I_outcorresponds to an output current of the converter, D corresponds to the duty cycle of the switching signal, T_turn-offcorresponds to the turn-off time of the switch, and f corresponds to the frequency of the switching signal.
Several other SEPIC FED BUCK converter topologies exist. FIG. 5A is a schematic diagram illustrating an embodiment of a single magnetic, magnetically coupled SEPIC FED BUCK converter with attendant voltage, current, and transfer function (M) identities. Converter 500 shown in this example includes a SEPIC portion and a BUCK converter portion that are magnetically coupled. The portions are said to be magnetically coupled because there is no galvanic path for transferring energy from the SEPIC portion to the load when S_1SBis turned off; instead, inductors T_1Cand T_1Dact as transformers to transfer energy stored in SEPIC windings T_1Aand T_1Bto the load. FIG. 5B illustrates the magnetic structure of converter 500 of FIG. 5A, with attendant voltage, current, and SEPIC FED BUCK coupling identities.
FIG. 5C is a set of graphs illustrating the timing, voltage, and current identities of device 500 of FIG. 5A, with attendant timing, voltage, and current summation expressions.
FIG. 5D is a schematic diagram illustrating an SFB converter during a GCE process. SFB converter 550 shown in this example is similar to converter 500 of FIG. 5A. SFB converter 550 is magnetically coupled. As shown in this diagram, when S_1SBswitches off, GCE current 568 flows in the opposite direction as GCE induced current 570, and charges in the gate-source capacitance of switch S_1SBare quickly removed.
FIG. 5E is a schematic diagram illustrating a commutation matrix included in SFB converter 500 of FIG. 5A. Nodes B, C, and E of the commutation matrix are coupled to nodes B, C, E of SFB converter 500. Voltage identities associated with capacitors C_com1and C_com2are expressed as:
E _Ccom1 =E _Ccom2=(E _in +E _out)/2.
In some embodiments, the SFB is configured as a multi-phase converter. FIG. 6A is a schematic diagram illustrating an embodiment of a multi-phase magnetically coupled, single magnetic SFB converter with attendant voltage, current, and transfer function (M) identities. In this example, converter 600 includes a first SEPIC portion comprising inductors T_1Aand T_1Band switch S_1S, and a second SEPIC portion comprising inductors T_1Eand T_1Fand switch S_2S. The inductors SEPIC portions are magnetically coupled. The input and output are isolated by a transformer comprising the inductive windings. The converter further includes a first BUCK converter portion comprising inductors T_1Cand T_1Gand switch S_1B, and a second BUCK converter portion comprising inductors T_1Dand T_1Hand switch S_2B. The inductors in the BUCK converter portions are also magnetically coupled. Switch S_1SBcouples the first SEPIC portion to the first BUCK converter portion, and switch S_2SBcouples the second SEPIC portion to the second BUCK converter portion. A commutation matrix similar to what was shown in FIG. 5E is included in the converter.
FIG. 6B is a diagram illustrating the magnetic structure of converter 600 of FIG. 6A, with attendant voltage, current, and SEPIC FED BUCK coupling identities.
FIG. 6C is a set of graphs illustrating the timing, voltage, and current identities of device 600 of FIG. 6A, with attendant timing, voltage, and current summation expressions. The switching signals for switches S_1SBand S_2SBhave a phase offset. The switching signals for switches S_1Band S_1SBare opposite of each other, and the switching signals for switches S_2Band S_2SBare opposite. A first switching signal controlling switches S_1SB, S_1Sand S_1Bhave a phase offset relative to a second switching signal controlling switches S_2SB, S_2Sand S_2B. The first switching signal causes switches S_1SB, S_1Sand S_1Bto operate in concert such that when S_1SBis closed, the first SEPIC portion stores energy, and the first BUCK converter portion delivers energy to the load and stores energy; when S_1SBis open, the first SEPIC portion and the first BUCK converter portion both deliver energy to the load. The second switching signal causes switches S_2SB, S_2Sand S_2Bto similarly affect the operations of the second SEPIC portion and the second BUCK converter portion.
Although the above example shows a 2 phase isolated SFB converter, some converter embodiments are configured to include additional SEPIC and BUCK converter portions coupled in a similar manner to produce an N-phase SFB converter.
FIG. 7A is a schematic diagram illustrating another embodiment of a SFB converter. In this example, SFB converter 700 is magnetically coupled. In various embodiments, T_1Cand T_1Dmay be combined into a single conductor or separated as multiple conductors. FIG. 7B is a diagram illustrating the magnetic structure of SFB converter 700 of FIG. 7A, with attendant voltage, current, and SEPIC FED BUCK coupling identities. A commutation matrix similar to FIG. 5E is optionally coupled to the converter at nodes B, C, and E. FIG. 7C is a set of graphs illustrating the timing, voltage, and current identities of SFB converter 700 of FIG. 7A, with attendant timing, voltage, and current summation expressions. As shown in current I₂(graph J), one of the SEPIC inductors T_1Bprincipally conducts current during the GCE process. Thus, SFB converter 700 experiences turn-off energy loss that is even smaller than SFB converter embodiments 200 and 500.
Compared to conventional BUCK converters, SFB converters have reduced conductive loss because of the way the inductive windings are deployed in SFB converters. FIGS. 8A-8D illustrate the inductive windings in a conventional BUCK converter and in several SFB converters, with attendant current identities and dimensional expressions. In FIG. 8A, four inductive windings T_1A, T_1B, T_1C, and T_1Dof BUCK converter 100 are shown. The inductive windings share the same magnetic core. The same magnetic windings are also present in FIG. 8B, FIG. 8C, and FIG. 8D, which correspond to SFB converter 200, 500, and 700, respectively. The windings of the BUCK converter and the SFB converters are dimensionally identical since they have the same magnetic core area, window area, and number of turns. Different converter topologies, however, result in different amounts of current through individual windings. Assuming that the converters have the same output power and include windings that have the same resistance, the amounts of energy dissipated in the windings are different since the current values are different.
FIG. 8E is a graph illustrating the conductive loss ratios of a conventional BUCK converter and SFB converters. The graph compares the loss ratios of the conventional BUCK converter 100 and the SFB converters 200, 500, and 700. It is assumed that the converters have discrete components of the same values and have the same E_inand I_out. The switches are assumed to turn on and off at the same rate. The conductive loss ratio (K) is expressed in terms of duty cycle (D). The conductive loss ratio of BUCK converter 100 is assumed to be 1, shown as line 800.
The conductive loss ratio of SFB 200 is shown as curve 802 and is expressed as:
K=2(1−D+D ²)/(2−D)²
The conductive loss ratios of SFB 500 and 700 are the same. The ratio as a function of D is shown as curve 804, and is expressed as:
K=(2−0.5D)/(2−D)².
The SFB converters also have faster transient response attributes. In comparison with a comparative identical conventional BUCK converter, the transient EMF (set) volt second (Et) of the integrating inductor and the MMF (reset) volt second (Et) of the integrating inductor in the SFB converter are both lower. FIG. 9 is a graph illustrating the inductor set/reset ratios of a SFB converter (e.g., SFB 200, 500, 600 or 700) and a canonical BUCK converter. The ratio K is expressed in terms of transfer function M. Assuming that the set ratio and the reset ratio of the conventional BUCK converter 100 are both 1, which is shown as line 900. The reset ratio of a SFB converter with the same passive component values, output, and switching duty cycle is shown as line 902 and is expressed as:
K _SFBreset=[(1+M)/2]²,
where M=D/(2−D).
The set ratio of the SFB converter is shown as line 904 and is expressed as:
K _SFBSet=(1+M)/2.
Although the foregoing embodiments have been described in some detail for purposes of clarity of understanding, the invention is not limited to the details provided. There are many alternative ways of implementing the invention. The disclosed embodiments are illustrative and not restrictive.

Claims

1. A DC-DC converter comprising:

a switch S_1SB, a switch S_2B, a switch S_2S, a capacitor C₂, an inductor T_1A, an inductor T_1B, and an inductor T_1C; wherein:

a first terminal of inductor T_1Ais coupled to a first terminal of an energy source;

a first terminal of capacitor C₂, a second terminal of inductor T_1A, and a first terminal of switch S_1SBare coupled;

a first terminal of inductor T_1C, a second terminal of S_1SB, and a first terminal of S_2Bare coupled;

a second terminal of inductor T_1Cand a first terminal of S_2Sare coupled;

a first terminal of inductor T_1Band a second terminal of S_2Bare configured for coupling with a second terminal of the energy source; and

a second terminal of capacitor C₂, a second terminal of inductor T_1B, and a second terminal of S_2Sare coupled.

2. The DC-DC converter of claim 1, further comprising a capacitor C1 and a capacitor C3; wherein:

a first terminal of capacitor C₁is coupled to the first terminal of inductor T_1Aand a second terminal of capacitor C1 is coupled to the first terminal of inductor T_1B; and

a first terminal of capacitor C₃is coupled to the second terminal of inductor T_1Cand a second terminal of capacitor C₃is coupled to the first terminal of inductor T_1B.

3. The DC-DC converter of claim 1, wherein inductors T_1A, T_1B, and T_1Care inductively coupled.

4. The DC-DC converter of claim 1, wherein the second terminal of inductor T_1Cis coupled to a load.

5. The DC-DC converter of claim 1, further comprising a commutation matrix coupled to the second terminal of inductor T_1A, the first terminal of inductor T_1C, and the first terminal of T_1B, and the second terminal of inductor T_1B.

6. The DC-DC converter of claim 1, further comprising an inductor T_1D, wherein the first terminal of inductor T_1Dis coupled to a gate terminal of switch S_2Band a second terminal of inductor T_1Dis coupled to a gate terminal of switch S_2S.

7. The DC-DC converter of claim 1, further comprising a controller configured to provide a signal to switch S_1SB.

8. A DC-DC converter comprising:

a switch S_1SB, a switch S_2B, a switch S_2S, a capacitor C₂, an inductor T_1A, an inductor T_1B, an inductor T_1C, an inductor T_1D, and wherein:

a second terminal of inductor T_1A, the first terminal of inductor T_1Band a first terminal of switch S_1SBare coupled;

the first terminal of inductor T_1C, a first terminal of inductor T_1D, a second terminal of switch S_1SB, a first terminal of switch S_2B, and a first terminal of switch S_2Sare coupled;

a second terminal of inductor T_1Cand a second terminal of inductor T_1Dare coupled; and

a second terminal of capacitor C₂, a second terminal of switch S_2B, and a second terminal of switch S_2Sare coupled.

9. The DC-DC converter of claim 8, further comprising a capacitor C₁and a capacitor C₃; wherein:

a first terminal of capacitor C₁is coupled to the first terminal of inductor T_1Aand a second terminal of capacitor C₁is coupled to the second terminal of capacitor C₂; and

a first terminal of capacitor C₃is coupled the second terminal of inductor T_1Cand a second terminal of capacitor C₃is coupled to the second terminal of capacitor C₂.

10. The DC-DC converter of claim 8, wherein inductors T_1A, T_1B, T_1C, and T_1Dare inductively coupled.

11. The DC-DC converter of claim 8, wherein the second terminal of inductor T_1Cand the second terminal of T_1Dare coupled to a load.

12. The DC-DC converter of claim 8, further comprising a commutation matrix coupled to the second terminal of inductor T_1B, the first terminal of inductor T_1C, and the second terminal of capacitor C₂.

13. The DC-DC converter of claim 8, further comprising a controller configured to provide a signal to switch S_1SB.

14. A DC-DC converter comprising:

an inductor T_1A, an inductor T_1B, an inductor T_1C, an inductor T_1D, an inductor T_1E, an inductor T_1F, an inductor T_1G, an inductor T_1H, a capacitor C₂, a switch S_1SB, a switch S_2SB, a switch S_1S, a switch S_2S, a switch S_1B, and a switch S_2B; wherein:

a first terminal of inductor T_1A, a first terminal of inductor T_1F, and a first terminal of an energy source are coupled;

a second terminal of inductor T_1A, a first terminal of inductor T_1B, and a first terminal of switch S_1SBare coupled;

a second terminal of switch S_1SB, a first terminal of switch S_1S, and a first terminal of inductor T_1Care coupled;

a second terminal of inductor T_1Cand a first terminal of inductor T_1Dare coupled;

a first terminal of capacitor C₂, a second terminal of switch S_1S, and a first terminal of S_2Sare coupled;

a second terminal of inductor T_1D, a first terminal of S_2SB, and a second terminal of S_2Sare coupled;

a second terminal of inductor T_1Eand a second terminal of inductor T_1Fare coupled;

a first terminal of switch S_1Band a first terminal of inductor T_1Gare coupled;

a first terminal of switch S_2Band a first terminal of inductor T_1Hare coupled;

a second terminal of switch S_1Band a second terminal of switch S_2Bare coupled to a first output terminal;

a second terminal of inductor T_1Gand a second terminal of inductor T_1Hare coupled to a second output terminal; and

inductor T_1C, inductor T_1D, inductor T_1G, and inductor T_1Hare magnetically coupled.

15. The DC-DC converter of claim 14, further comprising a capacitor C₁and a capacitor C₃; wherein:

a first terminal of capacitor C₁is coupled the first terminal of inductor T_1Aand the second terminal of capacitor C₁is coupled to the ground terminal; and

the first terminal of inductor C₃is coupled to the first output terminal and the second terminal of inductor C₃is coupled to the second output terminal.

16. The DC-DC converter of claim 14, wherein inductors T_1Aand T_1Bare inductively coupled.

17. The DC-DC converter of claim 14, wherein the first output terminal and the second output terminals are coupled to a load.

18. The DC-DC converter of claim 14, further comprising a commutation matrix coupled to node B, node C, and node E.

19. The DC-DC converter of claim 14, further comprising a controller configured to provide a signal to switch S_1SB.

20. A DC-DC converter, comprising:

a switch S_1SB, a switch S_2B, a capacitor C₂, an inductor T_1A, an inductor T_1B, and an inductor T_1C; wherein:

a second terminal of switch S_1SB, a first terminal of inductor T_1C, and a first terminal of switch S_2Bare coupled;

a second terminal of inductor T_1Cis coupled to a first output terminal;

a first terminal of capacitor C₂and a second terminal of inductor T_1Bare coupled;

a second terminal of capacitor C₂, a second terminal of switch S_2Bare coupled to a second output terminal.

21. The DC-DC converter of claim 20, further comprising an inductor T_1D, wherein a first terminal of inductor T_1Dis coupled to the first terminal of inductor T_1C, and a second terminal of inductor T_1Dis coupled to the second terminal of inductor T_1C.

22. The DC-DC converter of claim 20, further comprising a capacitor C1 and a capacitor C3; wherein:

a first terminal of capacitor C₁is coupled to the first terminal of inductor T_1Aand a second terminal of capacitor C1 is coupled to the second output terminal; and

a first terminal of capacitor C₃is coupled to the second terminal of inductor T_1Cand a second terminal of capacitor C₃is coupled to the second output terminal.

23. The DC-DC converter of claim 20, wherein the first output terminal is coupled to a load.

24. The DC-DC converter of claim 20, further comprising a commutation matrix coupled to the second terminal of inductor T_1A, the first terminal of inductor T_1C, and the second output terminal.

25. The DC-DC converter of claim 20, further comprising a controller configured to provide a signal to switch S_1SB.