US20120193030A1

US20120193030A1 - Silicon electrode plate for plasma etching

Info

Publication number: US20120193030A1
Application number: US13/330,110
Authority: US
Inventors: Takashi Komekyu; Kota TAKABATAKE
Original assignee: Mitsubishi Materials Corp
Current assignee: Mitsubishi Materials Corp
Priority date: 2011-01-31
Filing date: 2011-12-19
Publication date: 2012-08-02
Also published as: JP2012160570A; TWI547981B; TW201241889A; JP5713182B2; KR20120088595A; CN102623285A; KR101926859B1

Abstract

[Problems] To provide a silicon electrode plate for plasma etching that suppresses the unevenness of the surface caused by plasma etching so as to ensure uniform etching.

[Means for Solving the Problems] The silicon electrode plate for plasma etching is constituted by single-crystal silicon in which B and Al have been added as dopants, wherein the concentration of Al is equal to or greater than 1×10¹³atoms/cm³. In the silicon electrode plate for plasma etching, the electrical characteristic of single-crystal silicon is made uniform in a plane. Thus, the occurrence of unevenness of the surface may be minimized when the surface is depleted during plasma etching, and the occurrence of cracks may be suppressed.

Description

BACKGROUND OF THE INVENTION

1. Field of the Invention
The present invention relates to a silicon electrode plate for plasma etching that improves the in-plane uniformity of the silicon electrode plate during plasma etching.
2. Description of the Related Art
In general, in a plasma etching apparatus that etches a silicon wafer for use during a step of manufacturing a semiconductor integrated circuit, a silicon electrode plate 2 and a rack 3 are placed spacing from each other in a vacuum vessel 1 as shown in FIG. 1. In the plasma etching apparatus, a silicon wafer 4 is placed on the rack 3, a radio-frequency voltage is applied between the electrode plate 2 and the rack 3 by a radio frequency power source 6 while an etching gas 7 flows towards the silicon wafer 4 through a penetrated pore 5 provided in the silicon electrode plate 2, and a plasma 10 is generated in a space between the silicon electrode plate 2 and the rack 3 by the application of the radio-frequency voltage, whereby the surface of the silicon wafer 4 is subject to etching through the physical reaction caused by the plasma 10 and the chemical reaction caused by the silicon-etching gas 7 (see Patent Document 1).
Conventionally, an electrode plate constituted by carbon atoms has been employed for the silicon electrode plate 2. However, in recent years, a silicon electrode plate consisting mainly of single-crystal silicon, polycrystalline silicon, or columnar crystal silicon has been employed.

PRIOR ART DOCUMENTS

Patent Document

[Patent Document 1] Japanese Unexamined Patent Application Publication No. 2003-51491

SUMMARY OF THE INVENTION

Problems to be Solved by the Invention

The following problems still remain in the conventional techniques described above.
In the conventional silicon electrode plate, the surface thereof is gradually depleted and becomes uneven due to plasma generated between the silicon electrode plate and an opposing object to be etched during plasma etching, resulting in the occurrence of an undesired abnormal discharge due to the unevenness. If such an abnormal discharge occurs, etching uniformity may be deteriorated disadvantageously.
Such unevenness in the surface caused by plasma etching is considered to be generated by uneven plasma density between the silicon electrode plate and the opposing object to be etched because of variations that exist in the in-plane specific resistance value. Therefore, the in-plane variations in the specific resistance value need to be suppressed in order to suppress the unevenness of the surface. However, since the in-plane difference of the dopant content exists, it is difficult to suppress the in-plane variations in the specific resistance value. In particular, the in-plane difference of the dopant content greatly affects on a high specific resistance value, and thus, it is difficult to suppress the in-plane variations in the specific resistance value. Heretofore, it is difficult to hold the plasma density between the silicon electrode plate and the object to be etched in a uniform manner, and thus, the etching rate in a wafer plane, i.e., an object to be etched, is difficult to be made uniform.

Means for Solving the Problems

The present invention has been made in view of the above problems, and it is an object of the present invention to provide a silicon electrode plate for plasma etching that suppresses the unevenness of the surface caused by plasma etching so as to ensure uniform etching.
The present inventors have studied to obtain a silicon electrode plate that has a good in-plane uniformity of the specific resistance value and improves the in-plane uniformity of the etching rate during plasma etching. Consequently, the present inventors have found that the doping of B (Boron) as well as Al (Aluminum) in silicon enables to suppress the occurrence of unevenness on the surface during plasma etching.
Therefore, the present invention has been made on the basis of the finding, and adopts the following configuration in order to overcome the aforementioned problems. Specifically, the silicon electrode plate for plasma etching of the present invention is characterized in that the silicon electrode plate is constituted by single-crystal silicon in which B and Al have been added as dopants and the concentration of Al is equal to or greater than 1×10¹³atoms/cm³.
Since the silicon electrode plate for plasma etching is constituted by single-crystal silicon in which B (Boron) and Al have been added as dopants, the electrical characteristic of single-crystal silicon is made uniform in a plane. Thus, the occurrence of unevenness of the surface may be minimized when the surface is depleted during plasma etching. This is for the purpose that, if Al having a greater diffusion coefficient than that of B is added, Al is readily diffused faster than B, and thus, the in-plane uniformity of the specific resistance value is improved. In this way, the in-plane uniformity of the specific resistance value is improved, and thus, the plasma density between the silicon electrode plate and the opposing object to be etched is made uniform. Consequently, the depletion state of the surface of the silicon electrode plate is also made uniform so as to almost eliminate the occurrence of unevenness thereof, whereby etching may be made uniform while suppressing the occurrence of abnormal discharge. Further, since the covalent bonding radius of Al to be added is substantially the same as that of Si, lattice strain associated with impurity doping hardly occurs, and thus, strain inherent therein may be suppressed, resulting in the prevention of cracks.
The reason why the concentration of Al to be added is set to a value equal to or greater than the lower-limit value is that the effect of the in-plane uniformity of the specific resistance value described above is not clearly obtained if the concentration thereof is less than 1×10¹³atoms/cm³.
Also, in the silicon electrode plate for plasma etching of the present invention, it is preferable that the concentration of Al be equal to or less than 5×10¹³atoms/cm³.
Specifically, in the silicon electrode plate for plasma etching, the concentration of Al is equal to or less than 5×10¹³atoms/cm³. Thus, a reduction in a single crystallization rate may be suppressed. The reason why the concentration of Al to be added is equal to or less than the upper limit value is that the concentration of Al exceeding 5×10¹³atoms/cm³may disrupt Si single crystallization, and thus, the single crystallization rate (the proportion of the single crystal portion in ingot) may be reduced, resulting in a reduction in manufacturing yield.

Effects of the Invention

According to the present invention, the following effects may be provided.
Specifically, the silicon electrode plate for plasma etching of the present invention is constituted by single-crystal silicon in which B and Al have been added as dopants, and thus, the electrical characteristic of single-crystal silicon is made uniform in a plane. Consequently, the unevenness of the surface caused by plasma etching may be minimized, and strain inherent therein may be suppressed. Therefore, abnormal discharge may be suppressed by adopting the silicon electrode plate for plasma etching of the present invention to the plasma etching apparatus. Further, plasma etching may be performed while ensuring high in-plane uniformity and the occurrence of cracks and chips may also be suppressed.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a cross-sectional view for illustrating a plasma etching apparatus using a silicon electrode plate for plasma etching according to one embodiment of the present invention and an exemplary conventional silicon electrode plate for plasma etching.

DESCRIPTION OF THE EMBODIMENTS

Hereinafter, a description will be given of a silicon electrode plate for plasma etching according to one embodiment of the present invention in conjunction with a method for manufacturing the same.
As shown in FIG. 1, for example, a silicon electrode plate for plasma etching 12 of the present embodiment is formed with a plurality of penetrated pores 5, and is disposed above the silicon wafer 4, which is placed on the rack 3 in the vacuum vessel 1 of the plasma etching apparatus, in an opposing relationship.
In the plasma etching apparatus, a radio-frequency voltage is applied between the silicon electrode plate 12 and the rack 3 by the radio frequency power source 6 while the etching gas 7 flows towards the silicon wafer 4 through the penetrated pores 5, and the plasma 10 is generated in a space between the silicon electrode plate 12 and the rack 3 by the application of the radio-frequency voltage, whereby the surface of the silicon wafer 4 is subject to etching through the physical reaction caused by the plasma 10 and the chemical reaction caused by the silicon etching gas 7.
The silicon electrode plate for plasma etching 12 of the present embodiment is constituted by single-crystal silicon in which B (Boron) and Al have been added as dopants, wherein the concentration of Al is set to be equal to or greater than 1×10¹³atoms/cm³. Also, it is preferable that the concentration of Al is equal to or less than 5×10¹³atoms/cm³.
A specific description will be given of a method for manufacturing the silicon electrode plate for plasma etching 12 of the present embodiment below.
Firstly, Si is dissolved in a quartz glass crucible. At this time, B and Al are added so as to obtain a predetermined concentration. Since the amount of Al to be added is very small, a polycrystalline Si ingot in which Al is contained in Si at a high concentration (approximately from 1×10¹⁶to 1×10¹⁷atoms/cm³) is prepared in advance. The polycrystalline Si ingot is fragmented to obtain Al-containing polycrystalline Si powder. Then, Al-containing polycrystalline Si powder is weighed to obtain a required Al concentration thereof and then is added to Si in the quartz glass crucible.
Next, for example, a single-crystal silicon ingot having a diameter of 300 mm is prepared from the quartz glass crucible described above, and the ingot is sliced with the thickness of 4 mm using a diamond band saw to thereby prepare a disk-shaped single-crystal silicon substrate. The single-crystal silicon ingot is the resultant of crystal growth in the state in which B (boron) has been added at a dopant concentration of from 1×10¹⁴to 5×10¹⁴atoms/cm³and Al has been added at a dopant concentration of from 1×10¹³to 5×10¹³atoms/cm³. The dopant concentration of B and Al is adjusted such that the ingot is a p-type single-crystal silicon ingot as a whole. The single-crystal silicon substrate may also be obtained by heating a silicon substrate having a predetermined B concentration in contact with Al to thereby allow the heat diffusion of Al.
Furthermore, the top and bottom surfaces of the single-crystal silicon substrate are surface-grinded, and the thickness thereof is uniformed by removing warping. Then, mounting openings and the penetrated pores 5 are formed therein. For example, the penetrated pores 5 having an inner diameter of 0.5 mm are formed with 8 mm pitch between pores. Then, the single-crystal silicon substrate is further subject to surface grinding to obtain a product having a predetermined thickness.
Since the thus prepared silicon electrode plate for plasma etching 12 of the present embodiment is constituted by single-crystal silicon in which B (Boron) and Al have been added as dopants, the electrical characteristic of single-crystal silicon is made uniform in a plane. Thus, the occurrence of unevenness of the surface may be minimized when the surface is depleted during plasma etching. This is for the purpose that, if Al having a greater diffusion coefficient than that of B is added, Al is readily diffused faster than B, and thus, the in-plane uniformity of the specific resistance value is improved.
In this way, the in-plane uniformity of the specific resistance value is improved, and thus, the plasma density between the silicon electrode plate 12 and the opposing object to be etched (the silicon wafer 4) is made uniform. Consequently, the depletion state of the surface of the silicon electrode plate 12 is also made uniform so as to almost eliminate the occurrence of unevenness thereof, whereby etching may be made uniform while suppressing the occurrence of abnormal discharge. Further, since the covalent bonding radius of Al to be added is substantially the same as that of Si, lattice strain associated with impurity doping hardly occurs, and thus, strain inherent therein may be suppressed, resulting in the prevention of cracks.
Additionally, since the concentration of Al is in the range of from 1×10¹³to 5×10¹³atoms/cm³, the good in-plane uniformity of the specific resistance value is obtained and the single crystallization rate is also reduced, whereby the reduction in the manufacturing yield may be suppressed.

EXAMPLES

Next, the silicon electrode plate of the present invention will be specifically described with reference to the evaluation result of the actually produced silicon electrode plate by way of Examples, based on the aforementioned embodiment.
In Examples, the silicon electrode plates of the present invention were prepared by changing the amount of Al added as shown in Table 1, and then, the in-plane distribution of the specific resistance value, the number of cracks during processing (the number of cracks per 100 plates), and the Si single crystallization rate were examined. These results are shown in Table 1. As a Comparative Example, a silicon electrode plate in which Al has been added at a concentration less than 1×10¹³atoms/cm³was also prepared and evaluated in the same way, and the result is shown in Table 1 as well. In both Examples and Comparative Example, the amount of B added was 2×10¹⁴atoms/cm³.

TABLE 1

			THE NUMBER OF CRACKS	Si SINGLE
		IN-PLANE DISTRIBUTION OF	DURING PROCESSING	CRYSTALLIZATION
	AMOUNT OF Al ADDED	SPECIFIC RESISTANCE VALUE	(THE NUMBER OF	RATE
TYPE	(×10¹³atoms/cm³)	(%)	CRACKS PER 100 PLATES)	(%)

COMPARATIVE	0.5	5.5	6	97
EXAMPLE
EXAMPLE 1	1.0	2.8	1	97
EXAMPLE 2	2.8	2.5	0	95
EXAMPLE 3	5.0	2.3	1	93
EXAMPLE 4	7.8	2.3	1	86

As can be seen from the evaluation results, the numerical value of the in-plane distribution of the specific resistance value in Examples of the present invention is approximately decreased by half as compared with that in Comparative Example. Also, the number of cracks during processing in Examples is significantly reduced as compared with that in Comparative Example. In Example 4 in which the amount of Al added (Al concentration) exceeds 5×10¹³atoms/cm³, the Si single crystallization rate is decreased less than that in other Examples and Comparative Example. However, in Examples 1 to 3 in which the amount of Al added is equal to or less than 5×10¹³atoms/cm³, the Si single crystallization rates equal to or greater than 93% are obtained.
In this way, the silicon electrode plates of Examples exhibit the high in-plane uniformity of the specific resistance value, and the occurrence of cracking during processing may be suppressed.
The technical scope of the present invention is not limited to the aforementioned embodiments and Examples, but the present invention may be modified in various ways without departing from the scope or teaching of the present invention.

REFERENCE NUMERALS

1: vacuum vessel, 2, 12: silicon electrode plate, 3: rack, 4: silicon wafer, 5: penetrated pore, 6: radio frequency power source, 7: plasma etching gas, 10: plasma

Claims

1. A silicon electrode plate for plasma etching,

wherein the silicon electrode plate is constituted by single-crystal silicon in which B and Al have been added as dopants and the concentration of Al is equal to or greater than 1×10¹³atoms/cm³.

2. The silicon electrode plate for plasma etching according to claim 1, wherein the concentration of Al is equal to or less than 5×10¹³atoms/cm³.