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Publication numberUS2920193 A
Publication typeGrant
Publication dateJan 5, 1960
Filing dateMay 7, 1956
Priority dateMay 7, 1956
Publication numberUS 2920193 A, US 2920193A, US-A-2920193, US2920193 A, US2920193A
InventorsJack Breckman
Original AssigneeJack Breckman
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Precise analogue store and impedance transformer
US 2920193 A
Abstract  available in
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Claims  available in
Description  (OCR text may contain errors)

Jan. 5, 1960 .1. BRECKMAN 2,920,193


JACK BRECKMAN ATTORNEY U i ed S ates Pat n PRECISE ANALOGUE STORE AND IMPEDANCE TRANSFORMER Jack Breckman, Haddonfield, N.J., assignor to the United States of America as represented by the Secretary-of the Army The invention described herein may be manufactured and used by or for the Government for governmental purposes, without the payment of any royalty thereon.

The invention relates generally to apparatusemployed for computation and control purposes, and relates specifically to a circuit for storing information.

It frequently happens in computational, processing, or control circuitry that one or more of the following situations arise:

(a) It is necessary to store each of'several voltage outputs which appear serially, so that they are all simu1 taneously availablej (b) It is necessary to use a voltage, only briefly present in the circuit, for a longer interval of time, or perhaps at some later time.-

(c) It is necessary to control accurately some low impedance device with a voltage from ahigh impedance source. y Y

(d) It is necessary to use or measure a voltage, that appears only as a charge on a condenser.

These cases overlap somewhat and severalmay be present at once. Functions (4) and (b) require an analogue store, while (0) and (d) require an impedance transformer. In all cases it is desired that the voltage available at the output of whatever device is 'used be a precise replica of the input voltage, including polarity. This invention relates to such a device, which is an analogue store and impedance transformer simultaneously.

Examples of the requirement for voltage storage and impedance matching are already very numerous and will be increased in the near future by the advent of parametric computation, which almost always results in the answer appearing as a charge on a condenser. Another class of equipment that contributes to this need are some digital-to-analogue decoders which terminate digital computing or processing circuits, such as pulse code modulation systems. I

Prior solutions of this problem sacrifice either simplicity to achieve precision, using many added tubes and parts, or they sacrifice precision to achieve simplicity, thus making the output circuit the weakest link in the chain of computation. Where they are both cheap and precise, their design is generally tailored to the particular circuit with which they are associated, thus limiting their general application. i

7 It is an object ,of the invention to provide a simple analogue store and impedance transformer in which the stored output voltage more closely follows the input voltage.

In accordance with the invention herein, a voltage corresponding to the natural cathode follower rise is subtracted from the input voltage, whereby the resultant reduced voltage appearing atthe input will be supplerriented by the cathode follower rise, so that the output .voltage will more closely follow the input voltage.

;1o r a better understanding ofthe ,inventiomreference 2,920,193 Patented Jan. 5, 1960 2 V is had to the following description taken in connection with the attached drawings wherein:

Figure 1 is a schematic diagram of a basic cathode follower circuit of the prior art;

Figure 2 is a schematic circuit of the invention showing the grouping of the components during the initial operating state;

Figure 3 is a schematic circuit of the invention showing the grouping of the components during the final operating state; and r 7 i (Figure 4 shows a completeschematic circuit of the in vention. e

In the various figures similar components are indicated by similar reference numerals. I

In Figure 1, there is shown a basic circuit of a conventional cathode follower stage, including a triode 12 having an anode, a grid, and a cathode. The cathode is connected to B- through resistor 20, and the anode is connected directly to B+. The output V0 appears between cathode and ground and is applied to a utilization circuit. The input Vi is connected through a switch 10 between the grid and ground. Capacitor 14 is connected between grid and ground.

In operation, the input voltage Vi which is to be stored is allowed to charge the capacitor 14 through the initially closed switch 10. The switch is now opened and the voltage is stored at the cathode output circuit as the output voltage V0. If the tube and the capacitor are carefully selected with respect to the supply voltages, the rise in voltage may be quite small, and the output voltage V0 will remain relatively unchanged for many seconds.

The deficiency of this circuit for precise Work as an accurate analogue store is .due to the fact that there is a rise in voltage at the cathode relative to the grid voltage. As an example of this, consider the following table which shows typical figures for a. circuit including a 5755 triode, B+=+300 volts, B'=200 vo1ts,and the cathode resistor 220,000 ohms, all voltages being The table shows that as the input voltage varies from volts to +100 volts the cathode follower rise (d) changes from 3.4 volts to 0.1 volt. For applications Where the output voltage may be required to be, say within 0.1 volt of the input voltage, the above circuit is entirely inadequate. Even'the expedient of biasingthe output voltage with the average rise is insufficient, because the error is still large. Moreover, there is difliculty in applying bias without raising the output impedance, and the bias requirements'will change with tube changes, with aging, andwith cathode supply fluctuations.

The above table also shows that there is very little variation in the rise (d) when the input voltage is changed by only a small amount. This relativev constancy of the rise for small input dilferences is the key to the present invention and may best be explained by using an example. If the input voltage is 25.0 volts, then the voltage finally appearing at the output must also be 25.0

,v'olts, plus or minus 0.1 volt, which has arbitrarily been selected as the criterion for good precision. This goal can be realized if the voltage on the grid can be lowered by an amount just suflicient to cancel the effect of the rise through the cathode follower. In this case, the rise corresponding to an original grid voltage of 25.0 volts is 1.1 volts. Hence it is necessary to change the 'grid voltage to (25.01.1) or 23.9 volts. This is within the required precision. In general, if the grid voltage is lowered by an amount equal to the natural cathode follower rise, the resulting output voltage will be equal to the input voltage with very small error, and 'the invention herein accomplishes this function.

Figure 2 shows the initial arrangement of the components of the present invention. The circuit of Figure 2 differs from the basic circuit of Figure l, in that two condensers 16 and 18 have been added. Capacitor 16 is connected in parallel with capacitor 14, and capacitor 18 is connected between cathode and ground.

When switch 10 is closed, the input voltage Vi charges the grid circuit capacitances, which now include capacitors 14 and 16. The switch 10 is then opened. At this moment the input voltage on the grid is Vi and the voltage on the cathode is (Vi+d), where (d) is the natural rise through the cathode follower. The voltage drop across each capacitor is now as indicated inFigure 2. The plates of the capacitors have been marked with their polarity to help trace the action through the figures that follow.

After the capacitors are charged as shown in Figure 2, they are rearranged as shown in Figure 3, without altering the charges thereon. It will be noticed that the charge on capacitor 18 is in opposition to the charges on capacitors 14 and 16. The overall voltage between grid and ground is now the algebraic sum of the voltage drops across capacitors 14, 16, and 18, viz.,

The cathode follower now adds a voltage very nearly equal to (d) to this new grid voltage and the final output voltage V becomes very nearly equal to Vid+d which equals Vi, the desired value.

Figure 4 shows the complete circuit of this invention. In addition to the elements above discussed in connection with Figures 2 and 3, it includes a double throw relay switch including an actuating coil 32, which actuates three armatures 34, 36, and 38. In the rest position as shown, these armatures respectively contact with rest contacts 22, 26, and 28. When the coil 32' is energized from a source of current (not shown), the armatures move out of contact with the above contacts and into contact with circuit contacts 24 and 30, while the circuit connected to armature 36 will be opened.

An inspection of Figure 4 will show that with the armatures in the rest position, the capacitors components are connected as shown in Figure 2, and momentary closing of switch 10 will charge the capacitors as shown in Figure 2. When relay coil 32 is operated, the armatures will reconnect the condensers as shown in Figure 3, and the circuit will yield the corrected output V0 as above described.

Being so lightly loaded, the relay may be operated quite rapidly, and relays with the required spring capacity, which can operate in about 2 milliseconds, are no longer unusual in the art. Furthermore, the order in which the several armature springs leave their respective back springs has been found to be unimportant, it being only required that the back contacts be broken before the capacitors are reconnected. However, this is how a standard general purpose relay will operate anyway. Finally, further refinements in the switching are possible with no important increase in the spring load. These may include, for example, provision for a dummy load in the cathode circuit to simulate the output circuit load when the relay is deenergized.

The circuit shown has been constructed with a, switching time of about 2 milliseconds, and found to operate over an input range from -l00 volts to volts with an average error of about 0.05 volt and a maximum error of about 0.1 volt.

The above method is valid regardless of the exact characteristic of the particular triode used. Furthermore, the accuracy is not afiected by aging, and is practically independent of even momentary changes due to variations in the heater supply.

While there has been described what is at present considered a preferred embodiment of the invention, it will be obvious to those skilled in the art that various changes and modifications may be made therein without departing from the invention, and it is aimed in the appended claims to cover all such changes and modifications as fall within the true spirit and scope of the invention.

What is claimed is:

1. A combined impedance transformer and analogue store comprising an electron tube having at least a cathode, a grid, and an anode, a load resistor connected between the cathode and ground, an input circuit connected between the grid and ground, first, second, and third capacitors, and switching means which in one condition connects said first and second capacitors in parallel between said grid and ground, and the third capacitor between said cathode and ground, whereby upon the impression of a direct current voltage upon said input circuit all condensers are charged, said switching means when in another condition connecting all three capacitors in series between said grid and ground, the connection of said capacitors being in such direction that the charges on said first and second capacitors are additive and the charge on the third capacitor is in opposition.

2. A combined analogue store and impedance transformer comprising a first storage means upon which a voltage is stored, an impedance transformer means having its input circuit connected to said storage means to provide in the output circuit of said transformer a voltage which equals the stored voltage plus an incremental voltage produced by said impedance transformer, a second storage means initially connected to the output circuit of said impedance transformer for storing the output thereof, means which in one condition is adapted to disconnect said second storage means from said output circuit and said first storage means from said input circuit and in another condition connects both of said storage means together and impress their cumulative voltage on said input circuit to substantially cancel said incremental voltage.

3. A combined analogue store and impedance transformer comprising capacitor means in which a voltage is stored, a cathode follower circuit having its input circuit connected to said capacitor means to provide in its output circuit a voltage which equals the stored voltage plus a voltage representing the cathode follower rise, means including a capacitor initially coupled to said output circuit of said cathode follower for storing the output thereof, switch means which in one condition is adapted to disconnect said capacitor from said output circuit and capacitor means from said input circuit and in a second condition connect said capacitor in series with said capacitor means, the connection of said capacitor and said capacitor means in said second condition being in such direction that the charge on said capacitor is in opposition and the charge on said capacitor means is additive and to impress their cumulative voltage on said input circuit to oppose said cathode follower rise.

References Cited in the file of this patent UNITED STATES PATENTS 1,907,279 Blomberg May 2, 1933 2,016,147 La Pierre et a1. Oct. 1, 1935 2,471,252 Toulon May 24, 1949 2,741,756 Stocker a Apr. 10, 1956 2,771,575 Hampton Nov. 20, 1956

Patent Citations
Cited PatentFiling datePublication dateApplicantTitle
US1907279 *Apr 10, 1930May 2, 1933Ericsson Telefon Ab L MElectrical timing arrangement
US2016147 *Jul 21, 1934Oct 1, 1935Gen ElectricElectric valve tripping circuit
US2471252 *Apr 30, 1947May 24, 1949Gabriel Toulon Pierre MarieSingle-stage high-gain amplifier
US2741756 *Jul 16, 1953Apr 10, 1956Rca CorpElectrical data storage device
US2771575 *Jan 22, 1954Nov 20, 1956Marchant Calculators IncDiode capacitor regenerator
Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US3168655 *Apr 20, 1962Feb 2, 1965Sperry Rand CorpPulse averaging device
US3241555 *Jun 25, 1962Mar 22, 1966Mine Safety Appliances CoCharging and discharging circuit for ventricular defibrillator
US4951668 *Jul 18, 1989Aug 28, 1990Reed Don RElectrical impulse apparatus
U.S. Classification315/76, 365/45, 315/238, 365/149
International ClassificationG11C27/02, G11C27/00
Cooperative ClassificationG11C27/024
European ClassificationG11C27/02C