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Publication numberUS3153520 A
Publication typeGrant
Publication dateOct 20, 1964
Filing dateSep 6, 1960
Priority dateSep 6, 1960
Publication numberUS 3153520 A, US 3153520A, US-A-3153520, US3153520 A, US3153520A
InventorsMorris Harold D
Original AssigneeSystron Donner Corp
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Inertially based sequence programmer
US 3153520 A
Abstract  available in
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Claims  available in
Description  (OCR text may contain errors)

Oct. 20, 1964 H. D. MORRIS INERTIALLY BASED SEQUENCE PROGRAMMEE 2 Sheets-Sheet l Filed Sept. 6, 1960 vm mm mm mm Attorneys Oct 20, 1964 H. D. MORRIS INERTIALLY BASED SEQUENCE PROGRAMMER 2 Sheets-Sheet 2 Filed Sept. 6. 1960 INVENTOR.

BY Harold D. Morris 7% @2&3

E/sClron/c. Ramer- F I g. 3 E/ecron/c Power Rearl/ Attorneys United States Patent 3,153,520 INERTIALLY BASED SEQUENCE PROGRAMMER Harold D. Morris, Orinda, Calif., assignor, by mesne assignments, to Systran-Donner Corporation, Concord, Calif., a corporation of California Filed Sept. 6, 1960, Ser. No. 54,281 19 Claims. (Cl. 244-14) This invention relates to an inertially based sequence programmer and more particularly to an inertially based sequence programmer particularly adapted for use on a missile.

In the ring of certain types of missiles, a need has developed for providing arm and tire signals within the missile after the missile has been launched.

In general, it is an object of the present invention to provide an inertially based sequence programmer for use in generating signals after a missile has been launched.

Another object of the invention is to provide a programmer of the above character in which two separate channels are provided and in which each channel produces arm and fire signals.

Another object of the invention is to provide a programmer of the above character in which each channel provides signals having the same identical function as the signals produced in the other channel.

Another object of the invention is to provide a programmer of the above character which is maintained in a reset condition until the missile is launched.

Another object of the invention is to provide a programmer of the above character in which a ramp function of voltage is generated commencing at near zero time and increasing linearly towards the maximum voltage available.

Another object of the invention is to provide a programmer of the above character which can operate satisfactorily on widely varying input voltages.

Another object of the invention is to provide a programmer of the above character in which separate accelerometers are utilized for generating the arm and lire signals.

Another object of the invention is to provide a programmer of the above character in which the arrangement is such so as to minimize the possibility of misiiring.

A further object of the invention is to provide a programmer of the above character which can operate directly off of a battery supply without use of stabilization amplifiers, chopper stabilizers, and the like.

A further object of the invention is to provide a programmer of the above character in which means is provided for simulating acceleration on the programmer so that the programmer can be artiiically sequenced without actually accelerating the programmer.

A still further object of the invention is to provide a programmer of the above character in which the linear range of the integrators utilized extends over the total voltage supplied to the integrators.

Another object of the invention is to provide a programmer of the above character in which the arm and re signals are generated independently within a single channel.

Additional objects and features of the invention will appear from the following description in which the preferred embodiment is set forth in detail in conjunction with the accompanying drawings.

Referring to the drawings:

FIGURE l is a block diagram of an inertially based sequence programmer incorporating my invention.

FIGURE 2 is a schematic diagram, partially in block form, showing one channel of the inertially based sequence programmer shown in FIGURE 1.

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FIGURE 3 is a circuit diagram, partially schematic, in one plane of the diagram shown in FIGURE 2.

In general, my programmer consists of a time base integrator which generates a ramp function of voltage. Means is provided for generating a first reference voltage which represents a predetemined time. A first voltage comparator means is connected to this rst reference means and the time base integrator and produces an output when the output voltage of the time base integrator exceeds that of the reference voltage. The programmer also includes at least one accelerometer with a second integrator connected to the output of the accelerometer to produce an output which represents velocity. A second reference voltage is provided.Y Second comparator means is connected to this second reference voltage and the output voltage of the second integrator and produces an output when the output voltage of the second integrator exceeds the second reference voltage. Switching means is connected to the second voltage comparator and is adapted to be operated by the output of the second voltage comparator. The output of the first voltage comparator is connected to the second voltage comparator to prevent operation of the second comparator when there is an out-put from the lirst comparator. Means is also provided for applying an initiate bias to the integrators to maintain said integrators in a reset condition While the initiate bias is applied thereto. Means is also provided for removing the initiate bias to permit the operation of the integrators and to permit the programmer to run through its predetermined program.

In FIGURE l I have shown in block diagram form an inertially based sequence programmer incorporating my invention. The programmer consists of -two channels, identified as channel 1 and channel 2, respectively. Each channel operates independently of the other and generates Arm 1, Fire 1 and Arm 2 and Fire 2 signals which are tied together in such a manner that in the event one of -the channels fails to generate one or more of the signals, the signals will still be supplied by the other channel. The Arm 1 and Fire 1 signals are connected into the tiring circuits for the first stage engine or engine No. 1 of a missile 11, whereas the Arm 2 and Fire 2 signals are tied into the tiring circuits for the second stage engine, or engine No. 2, of the missile 11.

Each of the channels of the sequence programmer is provided with two input signals. One is an initiate signal which starts the computer operating in the channel as hereinafter described. The other signal is a physical input of acceleration acting upon the accelerometers provided in each of the channels.

Both of -the channels are designed so that they can arm and fire both stages of the two-stage missile. It is readily apparent that, if desired, and as hereinafter described, that missiles having more than two stages can be operated with ya similar programmer merely by causing each channel to generate additional arm and lire signals in the proper sequence.

One of the channels of the inertially based sequence programmer is shown in FIGURE 2. FIGURE 2 is a combination block diagram and circuit diagram to facilitate the explanation and operation of the channel. It will be noted that the circuitry for each channel has been divided into two planes with the electronic parts lying in an upper plane A and with the relays lying in a lower plane B. This has been done to facilitate the explanation of the operation of each channel. However, it is to be understood that this does not represent the exact positioning of the components of each channel in a physical embodiment of the programmer.

Each channel, as shown in FIGURE 2, consists of a suitable electronic power supply such as 28 volts D.C. which is connected to the input electronic power line 16.

This power line 16 is connected to conductors 17 and 18 with conductor 17 supplying the power to the electronic components and with conductor 18 supplying the power to the relays. The power is supplied to a current regulator which is connected to ground through three Zener regulator diodes 19, 20 and 21 that provide various desired voltages such as +12 volts on line 22 and -I-l6 volts on lines 23 and 24 as required for the operation of the electronic apparatus as hereinafter described.

This channel also includes a time base generating system 26 which in operation serves as a time delay unit, an arm command generating system 27, and a iire command generating system 28. The time base generating system 26 consists of a time base integrator 31 which includes a capacitor 32 and a resistor 33. The output of the time base integrator 31 is supplied to a voltage comparator 34 which can be termed the T1 second voltage comparator. The reference voltage on line 22 is also supplied to the voltage comparator 34 and represents a predetermined time. The output of the voltage comparator 34 is connected to the winding of relay RE-4 which is adapted to be operated When the voltage comparator 34 produces an output. The output of the time base integrator 31 is also connected to an additional voltage comparator 36 which can be termed the T2 second voltage comparator. The reference voltage on line 22 is also connected to this voltage comparator 36 and serves as a reference for an additional predetermined time after T1. The output of this voltage comparator 36 is connected to the Winding of relay RE-S which is adapted to be operated by the output of the comparator 36. The output of the time base integrator 31 is also connected to another voltage comparator 37 Which can be identified as the T3 second voltage comparator. The reference line 22 is also connected to this comparator. Although line 22 carries the same reference voltage to comparators 34, 36 and 37, the different times or time delays are obtained by modification of the reference by resistive attenuators which are a part of the comparators. Although separate comparators have been shown, comparators 36 and 37 can be combined into a single device utilizing a common amplifier with two sets of comparator diodes. The output of comparator 37 is connected to the voltage comparator 36 by a conductor 38.

The arm command generating system 27 consists of an accelerometer 41 of the type described in my copending application Serial No. 794,487, led February 4, 1959, now Patent No. 3,074,279, entitled Position Detecting Transducer. As described in that application, the accelerometer includes a restoring coil 42, a paddle 43, a pickoi coil 44, and an amplifier 46 connected to the pick-off coil. A one G bias reference is applied to the terminal 48. The resistor 49 permits individual adjustment of the one G bias. As shown in the drawing, the one G bias reference is supplied to one end of the restoring coil 42, whereas the other end ofthe restoring coil is connected to the output of the amplifier 46. An additional bias can be placed on the accelerometer 41 by a switch 50 connecting the lower end of the restoring coil 42 to ground through a resistor 51 for a purpose hereinafter described.

The output of the accelerometer 41 is connected through a resistor 52 to the input of a velocity integrator 53 which includes a capacitor 54. The output of the velocity integrator 53 is supplied to a voltage comparator 57 which can be termed the X feet per second voltage comparator. It is connected to the reference voltage on line 23. The output of the voltage comparator 57 is connected to ground through the winding of the relay RE-l. The upper end of the winding of relay RE-l is connected to its contacts 1 by conductor 58 to provide a holding circuit as hereinafter described, The output of the accelerometer 41 is also connected to the input of another voltage comparator 59 which can be termed the ZG voltage comparator. The reference voltage on line 22 is also connected to this voltage comparator.

Attenuator means is provided Within comparator 59 t0 permit calibration of the comparator. The output of this voltage comparator 59 is connected to ground through the Winding of relay R13-3. The upper end of the Winding of relay RE3 is connected to its contacts 1 by a conductor 61.

The fire command generating system 28 consists of an accelerometer 62 which is identical to the accelerometer 41. It also is provided with a one G bias reference and a switch 50 facilitating programming of the apparatus without actually applying acceleration to the apparatus as hereinafter described. l

The output of the accelerometer 62 is fed through a resistor 60 to the input of a velocity integrator 63 which includes a capacitor 64. The output of the velocity integrator 63 is supplied to a voltage comparator 67 which can be termed the X feet per second voltage comparator. The voltage in line 24 is used as a reference. The output of this voltage comparator is connected to ground through the winding of relay RE-7. The upper end of the winding of relay RE-7 is connected to its contacts 1 by conductor 68.

The output of the accelerometer 62 is also connected to another voltage comparator 69 which can be entitled the YG voltage comparator. The voltage on line 22 is used as a reference. The output of this voltage comparator is connected to ground through the winding of relay RE-6 which is connected to its contacts 1 by conductor 71.

The fire command system 28 also includes a time-base integrator 72 which includes a capacitor 73. The timebase integrator is supplied with a voltage from the line 22 through a resistor 76. The output of this time-base integrator or generator 72 is supplied to a voltage comparator 77 which can be termed the TD2 or T4 second voltage comparator. The comparator 77 uses as a reference the voltage on line 22. The output of comparator 77 is connected to permit conductors 81 and 82 which are connected to the voltage comparators 59 and 69 in the arm and iire command systems 27 and 28.

The output of the voltage comparator 34 is connected to two inhibit conductors 83 and 84. These inhibit conductors are connected to the voltage comparators S7 and 67 as shown in the drawing.

An initiate bias is supplied on the line V85 and is connected to the time base integrator` 31 through a diode 86 and a resistor 87. This same initiate bias is connected to the velocity integrators 53 and 63 through diodes 88 and resistors 89. The initiate bias can be in any suitable forrn such as 28 volts D.C. which is removed at the time it is intended to place the circuitry shown in FIGURE 2 in operation.

Each channel also includes a plurality of relays RE-l through RE-10 as shown on the drawing, each of which is provided with a plurality of contacts for purposes hereinafter described.

Operation of one channel of the programmer may now be briefly described as follows. Let it be assumed that the channel is in the reset condition with the initiate bias applied to the line 85. Then let it be assumed that it is desired to place the programmer in operation and iire the missile. The initiate bias is removed in any suitable manner such as by breaking the conductor connecting the bias to the conductor 85.

As soon as the initiate bias is removed, the time-base integrator begins generating a ramp function of voltage which begins at near-zero and runs up linearly towards the maximum range available which, for example, may be 20 volts utilizing transistorized circuitry. The signal input to the time-base integrator 31 is derived from the Zener voltage regulator 21 so that a constant reference Voltage is supplied to the analog integrator 31. Since the integrator 31 is tied to the reference line 22, the grounded input resistor 33 represents a xed negative input signal causing the integrator 31 to integrate in a positive direction. It is for this reason that the integrator generates a slow ramp voltage that goes from a fraction above zero to the full voltage of 20 volts.

Although the time-base integrator has only been shown in block form, it is of a transistorized type which is Well known to those skilled in the art. In general, the operation is such that when the initiate bias is applied to the integrator, a heavy current is owing in the diode S6 and resistor 87, and the amplifier 31 is saturated in the negative direction. The amplifier is held to close to zero voltage as determined only by the saturation voltage of the output transistor of the amplifier. The integrator remains in this reset condition so long as the initiate bias is applied to the same. As soon as the initiate bias is removed, a constant current is pulled away from the integrator and the output of the integrator must go up on a constant slow ramp in order to supply the current being drained away. The diode 86 in series with the initiate bias line prevents spurious current ow in the initiate bias line.

As explained above, the time-base integrator generates a ramp function of voltage beginning from near-zero and running up linearly towards the maximum voltage available. The time-base integrator runs through this ramp function of voltage in a period of time which, for example, may be three seconds, and for that reason it covers a series of voltages which represent particular times after time zero (the time when the initiate bias is removed).

As pointed out above, the output of the time-base integrator is supplied to voltage comparators 34, 36, 37, and 77 which represent T1 seconds, T2 seconds, T3 seconds, and T4 seconds, respectively. The parameters of the voltage comparators are set so that the reference voltage connected to each represents a particular time after time zero. As the voltage generated by the timebase integrator passes through the reference voltages for the respective voltage comparators, the relays RIE-4 and RE-S are operated. For example, if the time T1 is in the order of one second, the comparator will be adjusted so that the reference voltage represents approximately one-third of the total ramp voltage so that the ramp voltage will pass through the reference voltage at the desired time. This time is appropriate for the generation of the first arm signal as hereinafter described. The time T2 is also set in a similar manner so it is appropriate for the generation of the first fire signal as hereinafter described.

The voltage comparator 37 is set so that it causes deenergization of the relay RE-S, connected to the voltage comparator 36, at a predetermined time. This third voltage comparator 37, therefore, acts as a time delay and serves to open relay RE-S to prevent the continuous application of a fire signal to the missile in the event the missile is malfunctioning and failed to properly ignite.

Now let it be assumed that the missile has been launched by means other than its own powerand that at the same time the initiate bias has been removed from the line 85. This launching of the missile will cause acceleration forces to be applied to the accelerometers 41 and 62. As explained previously, the accelerometers have a one G bias applied to them so that the output acceleration signal of the accelerometers represents the actual acceleration of the vehicle or missile with vrespect to earth, or in other words, inertial acceleration independent of the eiect of earths gravity. This acceleration is generated independent of any information from the kearth and, therefore, represents the actual acceleration of .the missile and makes the missile independent of the launching station immediately after launching. In the fire command system, this acceleration is supplied through a resistor 52 to the input of a velocity integrator 53 which, on its output, gives a signal which represents the inertial velocity of the vehicle or missile with respect to earth. The same is true with respect to the output of the velocity integrator 63 in the fire command system 23. The voltage comparators 57 and 67 are adjusted so vthat the reference voltages represent the minimum acceptable velocity which must be attained by the vehicle or missile before certain operations can take place. If these velocities are not met, the launching has not been successful.

These velocities which have been preset into the voltage comparators 57 and 67 must be met within a predetermined interval of time which is represented by the time interval preset into the voltage comparator 34. I f these velocities are not met within this predetermined interval of time, the voltage comparators 57 and 67 are locked out by a signal applied to the inhibit conductors 83 and 84 connected to the voltage comparators 57 and 67. If this occurs, the relays RE-l and RIE-7 cannot be energized by the comparators.

It should be noted that the initiate bias is also utilized for resetting the velocity integrators 53 and 63 to maintain them at zero or substantially at zero to represent a starting point of zero velocity of the missile or vehicle with respect to the earth. At time zero, the Velocity integrators 53 and 63 will, therefore, start at near-zero and integrate upwardly according to the velocity reached by the vehicle and, therefore, will have an output which represents the velocity of the vehicle with respect to earth and will at a certain time give a voltage which determines whether or not the vehicle has reached a velocity suitable for a minimum acceptable launch condition.

Now let it be assumed that the minimum acceptable velocity has been exceeded by the vehicle. When this is the case, the Voltage comparator 57 will cause operation of the relay RE-l before the time T1 represented by the voltage comparator 34. Operation of relay RE-1 causes closing of its normally open sets of contacts 1 and 2. Set 1 of the contacts establishes a holding circuit for relay RE-l. Set 2 of the contacts of relay RE-l establishes a circuit to both sets 1 and 2 of relay RIE-4. Thus, relay RE-l will remain in an energized condition so that when the time T1 represented by the voltage comparator 34 arrives to cause energization of the relay RE-4, an arm signal or arm command is generated. Energization of relay RE-4 closes both of its sets of normally open contacts 1 and 2 to establish a path for current flow from the conductor 18, through both sets of contacts of relay REI-4, through set 2 of the contacts' of relay RE-1, through the coil of relay RIE-2 to ground. Energization of relay RE-Z establishes a circuit through its contacts 2 from the load power supply connected to the line 91 and to the arm command conductor 92 which is connected to the firing circuits of the missile.

From the foregoing, it can be seen that an arm command signal is generated only if the vehicle has achieved the correct velocity before time T1 and that the arm command signal is then generated only at the time T1. If the vehicle has not achieved the correct velocity before T1 time, as pointed out previously, the relay RE-l will not be energized, and hence the subsequent operation of relay RE-4 cannot cause the generation of an arm command because the relays R-E-l and RE-4 are in series. This is the correct decision for the circuitry because if the vehicle has not achieved the proper launch velocity, then the missile should not be fired. If the vehicle had achieved the proper velocity within the required time but no arm command was generated because malfunctioning of the circuitry of the arm command generator system 27, then the arm command would be supplied by the other operating channel.

Now let it be assumed that an arm command has been properly generated and applied to the firing circuits for the first stage of the missile and that it is now desired to generate a re command. The fire command is gated through relay RE-7 which is energized by the voltage comparator 67. Energization of relay RE-'7 closes both of its sets of contacts 1 and 2. Set 1 establishes a holding circuit for relay RE-7, Whereas set 2 energizes the winding of power relay RE-S. Energization of relay RE-8 causes closing of its contacts 3 which are in series with the contacts of relay RE-S. Relay RE-S is not energized until the time T2, represented by the voltage comparator 36, arrives. Upon the energization of relay RE-S, its sets of contacts 1 and 2 are closed to apply power to the contacts of relay RE-S and to cause energization of the winding of relay R13-9 through the contacts 3 of relay RE-S. Energization of the relay RE-9 causes generation of a fire command signal by permitting the application of load power from conductor 91 through the contacts 1 and 2 of relay RE-S, contacts 3 and 4 of relay R15-9 to the re command line 93 which is connected to the firing system in the first stage of the missile. The ground return for the re command is supplied to the line 94 which is connected to contacts 1 and 2 of relay RIE-9 and to the load power return line 96. The first stage engine is thus fired by the application of a firing signal to the tiring circuits of the rst stage engine.

At the time T3 represented by the Voltage comparator 37, a signal will be generated which will be applied to the line 38 and voltage comparator 36 to cause deenergization of the relay RE-S. As pointed out previously, this is for the purpose of terminating the lire command after a certain period of time. 1n this way, if by accident the irst stage of the missile does not fire, the fire command will be removed after a suitable period of time such as one second.

It will be noted that at the time relay RIE-9 is energized, the winding for relay RIE-10 is energized through a diode 97. The energization of the firing relay RE9 of the other channel will also cause energization of the relay 12E-10 through the application of a signal to the conductor 98 through a diode 99. The diodes 97 and 99 serve to prevent the lire signal from an adjacent channel from going through and operating both re relays simultaneously. Therefore, the relay REI-10 will be energized when the firing relay of either of the channels is energized. Operation of the relay RIE-10 closes its contacts 2 and opens its normally closed contacts 1. Its contacts 2 establish a holding circuit for relay R-10, whereas contacts 1 open the circuit across the time base integrator 72 which supplies its output to the voltage comparator 77. Thus, a time delay signal is generated in both channels regardless of which one sends out the tiring signal.

The comparator 77 is preset so that the reference voltage appearing on line 22 represents the time T4. The output of the comparator 77 serves to lock out the acceleration sensing comparators 59 and 69 until a predetermined minimum time such as 60 seconds after time zero as determined by the time delay represented by comparator 77 has passed. When this minimum time has passed, the voltage comparators 59 and 69 are permitted to operate as the predetermined acceleration criteria are met.

As soon as the voltage comparator 59 is permitted to operate, it compares the signal from the accelerometer 46 with a preset voltage parameter representing a predetermined acceleration Z G as supplied by the reference voltage on line 22 and determines whether or not the lirst stage engine has fired properly. If the acceleration is above the Z G acceleration, which, for example, may be any acceleration above 3G, then the relay RE-3 Will be energized by the output of voltage comparator 59. Energization of the relay RIE-3 causes closing of its contacts, sets 1 and 2. Closing of set 1 of its contacts establishes a holding circuit for relay R13-3. Closing of set 2 causes a second arm command to be sent out on the conductor 101 to the iiring circuits of the second stage of the missile. This circuit is established from the power conductor 91 through contacts 2 of relay RE-3 to the conductor 101 to the arm circuit of the firing circuits of the second stage engine.

During the time that this is occurring, the acceleration of the missile is being measured by the accelerometer 62 whose output is being supplied to the voltage comparator 69 which also is supplied with a preset voltage parameter. This voltage parameter is preset so that an attenuated reference voltage from line 22 represents Y G acceleration which, for example, may be 1G. A signal is generated by the comparator 69 when the voltage from the accelerometer 62 drops below the voltage parameter. This indicates that the first stage engine is burning out. When this occurs, the relay RE6 is energized to close its contacts 1 and 2. Its contacts 1 establish a holding circuit for relay 11E-6, whereas closing of its contacts 2 sends out the second tire command to the firing circuits for engine No. 2. Thus, the engine No. 2 of the missile, or the second stage engine of the missile, will be tired. The first stage will then be separated from Ithe second stage and the programmer will be dropped from the missile with the rst stage since it has completed all of its functions.

Relay RE-4 is not provided with holding contacts because the time base generated by the integrator 31 preceding the voltage comparator 34 runs through the switching point of the T1 second comparator 34 yand right on up to saturation which is at the plus Voltage or very near the maximum plus voltage available from Ithe regulator 18. For that reason, relay R13-4 will be held in energized condition for 4all of the time until the integrator is reset. No holding contacts are provided on relay RE-S because it is provided with means so that it will drop out after Ithe time provided by lthe T3 Voltage comparator 37.

Although holding or latching contacts are not absolutely required on the relays RED-3 and R13-6, it is desirable to provide such contacts to prevent possible chattering of the contacts. Chattering could result from variations in accelenation which could cause comparators 59 and 69 to go back and forth through their switching points.

In certain other relays such as the power relays, RE-S and RE-9, two sets are often provided in parallel for maximum reliability .and to ensure complete contact closure. In relay REL-9 both the lire command line and the ground return line are opened so that any voltage that may appear on the tiring line cannot accidentally cause firing of the first stage engine of the missile.

The switches 50 in the arm and fire command systems 27 and 28 have been provided to make it possible to simulate acceleration for the programmer so that the programmer can be artificially sequenced without physically accelerating the programmer. The resistance 51 lla-s been chosen with a Value so that a suitable acceleration such .as an acceleration of 4G is applied to the accelerometers. When this switoh 5t) is closed and the initiate bias is removed, the programmer will operate as though the missile is accelerating at the rate of 4G and will permit the programmer to cycle through its complete program. It is readily apparent that this switch is useful for testing the programmer before it is used in an .actual missile tiring.

It is apparent from the foregoing that I have provided an inertially based sequence programmer which has extreme reliability and which can operate satisfactorily over a widely varying input voltage. In fact, it can be operated directly from a battery supply without stabilization.

I claim:

1. In a programmer, time relay means for generating outputs at rst and second interval-s of time, arm command signal generating means for generating at least one arm command signal, re command generating means for generating at least one tire command signal, means connecting said time delay means to said arm command generating means and lsaid lire command generating means whereby said time delay means serves to prevent the generation of a first arm command signal prior to the generation of the first output signal from the time delay means and to prevent the generation of a rst lire command signal prior to the generation of the second output 4from the time -delay means.

2. A programmer as in claim 1 wherein said 'arm command generating means includes comparator means for generating an output when a predetermined parameter independent of said rst and second intervals of time is met and wherein said tire command means includes comparator means rfor generating an output when a predetermined parameter independent of said first and second intervals of time is met together with means connecting the iii-st output of the time delay means to the two last named comparator means for preventing both of said two last named comparator means from producing an output when either of said two last named comparator means fai-1s to generate an output Within the time the irst output is generated by the time delay means.

3. A programmer as in claim 1 together with means for terminating the first re command signal after a predetermined interval of time.

4. A programmer as in claim 1 wherein said arm command generating means and said iirst command generating means each includes: an accelerometer, 'an integrator connected to the output of the accelerometer to produce an output representing velocity, -a comparator, a reference representing a predetermined velocity connected to the comparator, said comparator producing an output when the output of the accelerometer exceeds the reference, and means connecting the first output of the time delay means to the comparator of the arm command generating means and lto the comparator of the `tire command generating means to prevent both Icomparators from producing an output if either comparator has not produced an output by the time the irst output is generated by Ithe time delay means.

5. In a programmer, time delay means for genenating first, second and third outputs at the completion of firs-t, second and third intervals of time respectively, arm command generating means for generating at least two arm command signals, tire command generating means for generating at least two iire command signals, means connecting said time delay means, said arm command generating means and said iire command generating means whereby said time delay means serves to prevent the generation of a rst arm command signal prior to the generation of the first output from the :time delay means, to prevent the generation of the first lire command signal prior to the generation of the .second output from .the time delay means, and to prevent the generation of the second arm command signal .and the second fire command signal prior to the generation of the third output from the time delay means.

6. A programmer as in claim 4 wherein said time delay means includes means for generating a fourth output at a fourth interval of time, together with means for terminating the iirst fire command signal upon the generation of the fourth output from the time delay means.

7. A programmer as in claim 5 wherein said arm command generating means and said iire command generating means each comprises an accelerometer, an integrator connected to the output of the accelerometer to produce an output representing velocity, a rst comparator connected to the output of the integrator, a second comparator connected to the ouput of the accelerometer, a rst reference representing predetermined velocity connected to the iirst comparator, and a second reference representing a predetermined acceleration connected to the second comparator.

8. A programmer as in claim 5 together with means for preventing operation of said time delay means, said arm command generating means and said iire command generating means prior to time zero.

9. In a programmer, time delay means for generating rst, second, third and fourth outputs at iirst, second, third and fourth intervals of time respectively, arm command generating means for generating at least two arm command signals, iire command generating means for generating at least two re command signals, said arm command generating means and said iire command generating means each comprising an accelerometer, an integrator connected to the output of the accelerometer to produce an output representing velocity, a iirst comparator connected to the ouput of the integrator, a second comparator connected tothe output Yof the accelerometer, a iirst reference representing a predetermined velocity connected to the first comparator, a second reference representing a predetermined acceleration connected to the second comparator, means connecting the iirst output of the time delay means to the first comparator of the arm command generating means and the iirst comparator of the tire command generating means to prevent the operation of the rst comparators if either of said first comparators has not produced an output by the time said iirst output is generated by said time delay means, and switching means connecting said time delay means, said arm command generating means and said lire command generating means, said time delay means in conjunction with said switching means serving to prevent the generation of a iirst arm command signal prior to the generation of the iii-st output from the time delay means, to prevent the generation of a iirst fire command signal before the generation of the second ontput from the time delay means and to prevent the generation of second arm and the second fire command signals prior to the generation of the third output from said time delay means, and to terminate the rst re command signal upon the generation of the fourth output from the said time delay means.

10. A programmer as in claim 9 together with means for preventing operation of said time delay means, said arm command generating means and said iire command generating means prior to time zero.

l1. A programmer as in claim 9 together with means for applying bias to the accelerometer in the arm command generating means and to the accelerometer in the re command generating means, the bias compensating for the effect of earths gravity upon the accelerometer.

12. A programmer as in claim 9 wherein said last named means includes a relay connected to the output of each 0f the iirst and second comparators of the arm command generating means and the lire command generating means.

13, In a programmer, at least two channels, each channel comprising time delay means for generating iirst and second outputs at rst and second intervals of time respectively, arm command generating means for generating at least one arm command signal, lire command generating means for generating at least one lire command signal, means connecting said time delay means to said arm command generating means and said fire command generating means whereby said time delay means serves to prevent the generation of a iirst arm command signal prior to the generation of the rst output from the time delay means and the generation of the first lire command signal prior to the generation of the second output from the time delay means, and means connecting said channels so that in the event one of said channels fails to generate either an arm command signal or a iire command signal the missing command signal is supplied by the other channel.

14. A programmer for actuating the tiring circuits of a. missile, a pair of sequence programmer channels, each channel comprising time delay means for generating first and second outputs at iirst and second intervals of time, arm command generating means for generating at least one arm command signal, lire command generating means for generating at least one fire command signal, means connecting said time delay means to said arm command generating means and said tire command generating means whereby said time delay means serves to prevent the generation of a first arm command signal prior to the generation of the iirst output from Vthe time delay means and the generation of a iirst lire command signal prior to the generation of the second output from the time delay means, means adapted to connect each of said channels to the tiring circuits of the missile, said last named means also interconnecting said channels so that in the event that if either the arm command' signal or the fue command 11 signal is not supplied by one of the channels, the missing command signal is supplied by the other channel.

15. In a programmer, a time base integrator generating a ramp function, a rst reference representing a predetermined time, rst comparator means connected to said rst reference and said time base integrator and producing an output when the output of said time base integrator exceeds that f the first reference, an accelerometer, a second integrator connected to the output of said accelerometer to produce an output representing Velocity, a second reference representing a predetermined Velocity, second comparator means connected to the second reference and producing an output when the output of the second integrator exceeds the reference, irst switching means connected t0 the second comparator and being operated by the output of said second comparator, means connecting the output of said rst comparator to said second comparator to prevent the operation of said second comparator when there is an output from the said rst comparator, and bias means connected to said time base integrator and said second integrator for preventing operation of the time base integrator and said second integrator before time zero.

16. A programmer as in claim 15 together with bias means for applying a bias to the accelerometer so that the output of the accelerometer represents inertia1 acceleration.

17. A programmer as in claim 15 together with an additional accelerometer, a third integrator connected to the output of said additional accelerometer to provide an output representing velocity, a third reference, a third comparator connected to said third reference and the output of said third integrator and providing an output when the output of said third integrator exceeds the third reference, second switching means connected to said third comparator and adapted to be operated when there is an output from said third comparator, and means connecting the output of said rst comparator to said third comparator to inhibit the operation of saidV third comparator when there is an Output from said first comparator, and means connecting said bias means to said third integrator for preventing operation of said third integrator before time zero.

18. A programmer as in claim 17 wherein said first switching means causes the generation of a rst arm command and wherein the operation of said second switching means causes the generation of a rst fire command, together with means for preventing said second switching means from generating the first re command before the rst arm command has been generated.

19. A programmer as in claim 18 together with a fourth reference, a fourth comparator connected to said fourth reference and to said time base integrator and means connected to the output of said fourth comparator to terminate the first re command after there is an output from said fourth comparator.

References Cited in theffile of this patent UNITED STATES PATENTS 2,845,004 Johnson July 29, 1958

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US2845004 *Jul 7, 1954Jul 29, 1958Johnson Quinton CRocket launching system
Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US3500746 *Apr 17, 1968Mar 17, 1970Lear Siegler IncWeapon system with an electronic time fuze
US3876169 *Aug 1, 1962Apr 8, 1975Us ArmyMissile booster cutoff control system
US4096802 *Nov 26, 1976Jun 27, 1978The United States Of America As Represented By The Secretary Of The NavyMotion-induced stimuli initiation system
US4137850 *Oct 11, 1977Feb 6, 1979The United States Of America As Represented By The Secretary Of The NavyDestruct initiation unit
US5245926 *Mar 11, 1992Sep 21, 1993United States Of America As Represented By The Secretary Of The ArmyGeneric electronic safe and arm
US5756927 *Feb 16, 1995May 26, 1998Bofors AbMethod of arming and arrangement for carrying out the method
US5886285 *Dec 28, 1964Mar 23, 1999The United States Of America As Represented By The Secretary Of The NavyVariable range timer impact safety system
US5886286 *Jul 26, 1965Mar 23, 1999The United States Of America As Represented By The Secretary Of The NavyMonitoring safety system
US5886287 *May 26, 1965Mar 23, 1999The United States Of America As Represented By The Secretary Of The NavyGuidance information analyzer
WO1995022738A1 *Feb 16, 1995Aug 24, 1995Bofors AbMethod for arming and arrangement for carrying out the method
Classifications
U.S. Classification102/215
International ClassificationF41G7/00, F41G7/36
Cooperative ClassificationF41G7/36
European ClassificationF41G7/36