|Publication number||US3158837 A|
|Publication date||Nov 24, 1964|
|Filing date||Feb 9, 1961|
|Priority date||Feb 9, 1961|
|Publication number||US 3158837 A, US 3158837A, US-A-3158837, US3158837 A, US3158837A|
|Inventors||Zinn Leon, Bodin Milton|
|Original Assignee||Zinn Leon, Bodin Milton|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (10), Referenced by (3), Classifications (10)|
|External Links: USPTO, USPTO Assignment, Espacenet|
Nov. 24, 1964 M. BoDlN ETAL PULSE TIME DECODER 5 Sheets-Sheet 1 Filed Feb. 9, 1961 Nov. 24, 1964 M. BODIN ETAL PULSE TIME DECODER Filed Feb. 9. 1961 5 Sheets-Sheet 2 INVENTORS MILTON BODIN LEON ZINN ATTORNEYS.
Nov. 24, 1964 M. BoDIN ETAL PULSE TIME DECODER 5 Sheets-Sheet 5 Filed Feb. 9, 1961 F lG. 3C.
FIG. 3A. FIG. 3B.
RIGGER [TRIGGER LEVEL INVENTORS MILTON BODIN LEON ZINN ATTORNEYS.
M. BODIN ETAL PULSE TIME DECODER Filed Feb. 9, 1961 TIME FIG. 5.
sLOwING PULSE IN CIRCUIT TEGRAOR GENERATOR "AND" Y 4 26\ CIRCUIT 25 0 II DIFFEREN- TIATOR I-Ta-T 'l I* AwT H SLOWING s R pSLOSTE CLIPPER CIRCUIT O GENERATOR L22 L40 4lj l IIANDI n,` 42` CIRCUIT 25 T I DIEFEREN- TIATOR OUTPUT INvENTOR MILTON BODIN I EON zINN I-LI 5 Sheets- Sheet 4 OUTPUT ATTORNEYS.
Nov. 24, 1964 M. BODIN 4ETAL PULSE TIME DECODER 5 Sheets-Sheet 5 Filed Feb. 9, 1961 MILTON BODIN Y LEON ZINN ATTORNEYS.
United States Patent O 3,153,837 PULSE TME DECODER Milton Bodin, 176 Copley Ave., Temeck, NJ., and Leon Zinn, 8 Circle Drive, Hicksville, NSY. Filed Feb. 9, 1961, Ser. No. 88,264) 8 Claims. (Cl. 34h-167) This invention relates to improvements in communication systems having multiple stations, and in particular relates to improved means for response by one station only to a signal meant only for that station.
By way of example, the invention can be applied to a radio telephony dialing system, wherein each station of the system will be responsive to a speciiic code number and to no other number.
One object of this invention is to provide means for detecting a selected number of pulses, without being responsive to a number of pulses which is either less than or greater than the selected number. Another important object of the invention is to provide a detector of this type which can be readily set for response to a diiiering number of pulses. Another object of the invention is to provide a detector or decoder which will respond to a series or" signals, each containing a selected number of pulses.
By way of example, but without limitation thereto, a decimal numbering system may be employed. Thus, by way of example, if there are ninety-nine or fewer stations, each station may be responsive to a rst number of pulses, corresponding to the tens digits, and then to a second number of pulses, corresponding to the ones digit. Thus, if some station tirst dials two pulses, and then dials four pulses, by way of example, as may be done on an ordinary telephone dial, the decoder at the station whose code number is twenty-four will automatically respond to rst the two pulses and then, the four pulses and will produce an audible signal or other indication that the number twenty-four has been dialed.
As an important feature of the invention, the electric circuitry is relatively simple, and relatively minor modivication is required for each additional digit which is to be dialed. Thus, by way of example, a seven digit number can be decoded, utilizing relatively simple circuitry.
As examples of other applications of the invention, it can be utilized to reduce the wiring in conventional telephone systems. Thus, only two wires would be needed in a telephone dialing system to carry the signal from one telephone set to all of the others.
Among other applications of this invention, the decoder may be used for selective paging systems, for selection of pulses to ring bells in various buildings, for selection of pulses in intercommunication systems, for selection of pulses in a lire alarm system or a call system, for an automatic combination lock system, for control of lighting systems, for general computer operations in counting of pulses and selection of desired pulses for digital computer systems. I y
In accordance with preferred embodiments of the invention, each station of a communication has an electric system for reception of input signals each comprising a varying number of electric pulses of relatively uniform duration and frequency which number may be less than, the same as or more than, a pre-selected number for which the system is set.y This input signal may correspond to the pulses produced in ordinary telephone dial systems and may be supplied to the station by any suitable means.
Said station electric system has first circuit means receiving the input pulses and adapted to produce a rst circuit output if and as soon as the number of pulses reaches the pre-selected number, or alternatively at the end of the time interval after the iirst pulse is received when the pre-selected pulse is due to be received. Said ICC station electric system has second circuit means also receiving the input pulses and adapted to produce a second circuit output at the conclusion of the pulses. Optionally, the second circuit means may not produce any output if the number of pulses received is less than the pre-selected number.
The system also includes output signal means coupled to the iirst and second circuits and adapted to produce at output signal when said first and second circuit outputs are in time co-incidence. If the received number of pulses is less than the pre-selected number, then either or both of said iirst and second circuit means produces no output at all; or if they both produce an output, the outputs are not in time co-incidence because the output of the iirst circuit means cannot occur before the conclusion of a time interval corresponding to the duration of the preselected number of pulses. 1f the received number of pulses is greater than the pre-selected number, then the outputs of the rst and second circuit also cannot be in time co-inciclence. The iirst and second circuit outputs can only be in time co-incidence when the system receives the pre-selected number of pulses.
As will be explained in detail in the speciiication, appropriate modification of the circuit may be incorporated in the event that the receiver is to respond to the dialing of two or more digital numbers.
Other objects and advantages of this invention will become apparent from the following description, in conjunction with the annexed drawing, in which preferred embodiments of the invention are disclosed.
In the drawing:
FIG. 1 is a block diagram of a first embodiment of the invention.
FIG. 2 is a detailed electric circuit diagram of the embodiment shown in FIG. 1.
FIGS. 3A, 3B and 3C are diagrammatic views showing the output wave forms of the various stages of the decoder, under illustrative conditions. The assumed illustrative conditions are that the decoder is set to respond to a two digit number, the first digit being 3. In FIG. 3A, it is illustratively assumed that the first digit actually dialed is less than three. ln FIG. 3B, it is illustratively assumed that the first digit actually dialed is greater than three. In FIG. 3C, it is illustratively assumed that the first digit actually dialed is three, the decoder being thereby actuated so as to be in condition to be actuated by the correct dialing of the second digit.
FIG. 4 is a block diagram, also showing output wave forms, of the various stages of a second embodiment of the invention.
FIG. 5 is a block diagram, also showing output wave forms, of the various stages of a third embodiment of the invention.
FIG. 6 is a block diagram, also showing output wave forms, of the various stages of a fourth embodiment of the invention.
General Description of F rsz Em'bodvz'ment FIG. 1 is a block diagram of a first embodiment of the invention. Illustratively, but without limitation thereto, FIG. 1 shows a two-stage decoder for decoding two digit numbers.
Stage 1 of the decoder, labeled DIAL represents a receiver for a series or pulses such as those produced on the ordinary telephone dial. Said stage one may include a source of such pulses, or may be a'receiver i'or such pulses which are produced at a remote source and are transmitted by telephone or radio to said stage 1. The condition of the system is that said pulses of stage 1 be discrete, of relatively uniform amplitude, of relatively uniform duration in time and ofl relatively uniform frecritical.
i of the two digit number is being dialed, relay K is not energized and relay contacts K1 are closed. Integrator stage 2a is -adjustable so that when the number of pulses equals or exceeds the selected iirst digit value, theY output of stage 2a is suihcient to trigger stage 3 so thatit produces an output pulse which is slightly longer in duration than'the duration of an input pulse of the system. In the event that the number of pulses dialed is greater than the number selected for response by the decoder,
' so thattheoutput of integrator 2 remains above the selected triggering level for a duration of more than one pulse, a pulse of longer time duration is produced by one- Vshot multivibrator 3'..
The output of multivibrator stage 3 is divided and is fed respectively to a diierentiator stage 4 and'dilierentiator stage SA. Optionally and preferably, said differentiators stages 4 and 5A are out of phase wtihreachother. VIn other Words, by way of example, differentiator 44 may produce a negative pulse corresponding to the beginning of the 'signal received thereby, and -a positive -pulsecorresponding to the ending of the signal received thereby. Conversely, diie'rentiator stage 5A may produce a positive pulse corresponding to the beginning of the input signal received thereby, and a negative pulse corresponding` to the conclusion ofthe input signalvreceived thereby;
The output of stage Y4 is fedto stage 5, which is a No. 2 one-shot multivibrator stage. VThe negative differentiated output pulse of diierentiator stage 4, correspondingto the beginning of the signal of stage 3,-triggers a pulse output of one-shot multivibrator stage 5. The output 'pulse of one-shot multivibrator stage 5 is negative. 'I'his 'pulse is fed to the input of a back-biased diode stage 5B. The negative output pulse Vof diiferentiator 5Ais also fed to the input of said stage 5B. If the pulses of stages 5 and SAreach diode 5B at the same time, they are together suicient in amplitude to overcome the back biasr of diode 5B, and diode 5B produces a negative output pulse.
The negativeoutput pulse of diode 5B is amplied by Vamplifier 6, and the output'of amplifier 6 is fed through Vnormally closed relay contacts YK7 of relay K to stage 8,
which is the` first digit' neon memory. Said first digit neon memory, stage 8, has a positive bias, foreXample of 105 volts, supplied thereto through line 32,2 and normally closed reset switch 31.v Accordingly, stage 8 produces an youtput signal which is fed through amplifier 12 to relay Saidjneon memory 8 remains energized until reset switch 31is opened.
The energization of relay K causes the relay contacts of stage 2 to beset for 'actuation of integrator stage 2b corresponding'to the second digit, and similarly lcauses -relay contacts K7 towbe opened and relay contacts K9V to be closed. Y Y
Stages 1-67' operate as previously, for reception of the second set 'of pulses corresponding Vto the second digit,
Vexcept thatintegrator stage 2b is set to cause response of stage 3 to the number of pulses corresponding to the vsecond digit of Vthe number. However, the Voutput of ampli- Y iier 6 .is in this case led through relay contacts=K9 to stage 1, .which is the second digit neon memory. This memory is connected through'line 33 and Ythe aforesaid `reset i switchv 31 to thefsource. of positive' voltage. The two Y neon memories operate inthe same manner.V The output. 4Vof the second digit neon memory Iltis fed to ar biased .Haudiofoscillator stage 11, which-oscillator yonly operates",
-to produce an output signal when it receives all. 'llp .4 signal from the stage lil. The output of stage 11 is fed to stage 13, which is a speaker or'other appropriate signaling device. Y i
If only a single digit response is required, Yamplitier 12, relay K, and integrator 2b and memory 10 may be omitted and memory 8 may be connected Ydirectly to Voscillator 11. Y Y
Y Electric Circuit ofFrst Embodiment FIG. 2 shows an illustrative electric circuit for theY embodiment shown in block diagram form in FIG. 1.
Stage 1 comprises switches 50 and 51 and associated elements. Switches 50 and 51 are switches of a telephone dialing system. Switch 5t) is normally closed. When a number is dialed on the telephone dial, switch50 is Airnme- Y turn is Vconnected to a Ysource of -221/2 v.V The other Y side of.switch 51 is connected through adjustable resistors 54 and 55 and switch 50 in series to line 53 which is grounded. Relay contacts K2 are connected across resistor 54. Relay contacts K1 are connected across resistor V55. Resistor 56 and condenser 57 are connected across ber dialed) to travel from the -221/2 v. source throughY line 52, switch 51, resistor 54 and resistor 56 and condenser 57 inparallel (switch 50 being open) toground.V
The voltage built up across condenser 5 7 depends upon `the setting of resistor 54. At the conclusion of the pulses,
switch 50 closes, 'and condenser 57 is shorted. However, prior to the 'closing offswitch 50, the voltage across condenser 57 applied tothe cathode of diode S8 causes current to ilow to the base of transistor 5,9.
The operation whenjcontacts KZare closed does not' require extended description.V f
Transistor 59 and the further PNP transistor 60 (all 'n transistors in the circuit are PNP transistors), with associated circuitry, serves as the No. 1 one-shot multivibrator stage 3. VThe Vemitters of transistors 59 and 60 are Vcon-k The collectors of transistors 59 and 60 are respectively connected by resistors 59a and 60a to nected together.
line 52. The collector of Vtransistor 59 is connected by condenser v62 to the base of ktransistor .60. The collector of transistor 60 is connected by condenser 63 :to the cathode of diode'65V and also to resistor 64 which is in` turn connected to grounded line 53.r The base of transistortl Y is connected by resistor 60b to voltage line 52,.
`Condenser 63 and resistor -64 together serve as dier'- Ventiator stage 4. TheY resistance between base and col` lector of transistor 59, together with'condenser 61 which is connected between the collector of transistor S9 and the cathode of diode 5B, together serve as diiferentiator stage 5A. v Y
The plateof diode 65 isconnected by resistor 65a to Y grounded Vline 53` and is also connectedfto'the base of"l transistor 66. Transistors 66 and-67, with associatedr circuitry, serve as No. -2Y one-shot multivibrator' stage 5.V
The collectors of transistors .-66V and 67 are respectively connectedY by resistors 66u and 67u to kvoltage line'52.
The emitters 'of transistors 66 and-65 are connected by "resistor 66b to grounded line 5 3.Y The` emitter of transis-V f 'tor' 66 is connected by condenser 6ta*v '-to theba'selof For example, if the number 5 is dialed, n
transistor 67. The base oi transistor e7 is also connected by resistor 67h to voltage line 52. The collector of transistor 67 is connected to the cathode of diode 5B.
lf the negative voltage on the cathode of diode 5S becomes suinciently great, transistor :19 conducts current between its collector and plate. The signal is differentiated by condenser el, and at its conclusion a negative pulse is supplied to the cathode of diode 5B.
When transistor 59 conducts current, transistor 6i? conducts less current, causing a negative pulse to be supplied to condenser 63. As a result, the cathode of diode 65 becomes more negative, and transistors 56 and 67 are operative to supply a negative pulse to the cathode of diode 5B.
Ordinarily, the cathode of diode 5B is not sufiicientl negative with respect to the plate for it to conduct a suticient amount ot current to actuate subsequent states oi' the circuit. lf a negative signal through condenser 6l and a further negative signal from the collector of transistor 67 are supplied to the cathode o diode 5B, it conducts a substantial amount of current which is supplied to the amplifier stage 6 consisting of transistors 68 and 59 and associated circuitry.
The plate of diode 5B is connected to the junction between resistor 6851 and condenser b. Resistor 68a is further connected to voltage line 52. Condenser d!) is connected to the base of transistor 6%. Base 68 is con nected by resistor 63C to grounded line 53. The emitters of transistors ed and 69' are connected to grounded line S3. The collectors or transistors 68 and e9 are respectively cormected by resistor 63d and resistor 6Std to voltage line 52. The collector of transistor 6d is connected by condenser @a to the base of transistor o?. The base of transistor 69 is connected by resistor 69h to voltage line 5?..
Line 52 is connected by resistor 52a to ground. lll05 v. source is connected by normally closed reset switch 3l and resistors 72 and 73 in series to ground, and also by switch 31 and resistors 72a. and 73a in series to ground. The collector of transistor 69 is connected through condenser 7i? and normally closed relay contacts K7 to a rst Side of rst digit neon memory S, the other side of which is connected to the junction between resistors 72 and 73. The collector of transistor 59 is also connected through condenser 7l) and normally open relay contacts K@ to a rst side of second divit neon memory it?, the other side of which is connected to the junction between resistors 72a and 73a. Said first sides of memories 5 and lil are respectively connected through resistors 7S and 74, on the one hand, and 75a and 74a, on the other band, to ground line 53. Resistor 74]) and condenser '74C are connected in parallel across resistor '7 4a.
rlhe junction or resistors 74 and '75 is connected by line 75 to the base of transistor 77. Transistors 77 and 78, with associated circuitry, together serve as amplifier stage The bases of transistors 77 and 7S are respectively connected by resistors 77a and '73e to line 52o which is connected to -221/2 v. source. The emitters of transistors 77 and 7S are connected to line 53a which is grounded. The collector of transistor 77 is connected to the base of transistor 78. The collector of transistor '78 is connected by relay coil K to voltage line 52E?. Resistor 73C is connected between lines 52h and 53a.
The junction of resistors 7de and 75a is connected by line 79, to the emitters of transistors and 31, which, together with associated circuitry, serve as audio oscillator stage l. The bases of transistors @d di are respectively connected by resistors Stia and illu to grounded line 53a. The base of transistor 86 is connected by condenser Slb to the collector ot" transistor The base of transistor tl is connected by condenser Sib to the collector ot transistor till. The collector of transistor i is connected by resistor Sile to voltage line 525. The collector of transistor El is connectedby resistor 82 and audio transformer primary S3 to voltage rnecessary to actuate stage 3.
stages e line 52o. The secondary S4 of the audio transformer is connected across voice coil 13a of speaker 13.
When diode 5B receives two signals in time coincidence, its cathode becomes suiiiciently negative relative to its plate so that it passes a signal to amplier stage 6. The transistors 63 and 69 of stage 6 amplify this signal, and an output signal through relay contacts K7 causes the adjacent side of memory S to become more negative. The voltage drop across memory 8 is then suiiiciently great so that the tube lires.
As the result of the tiring of tube 8, a positive voltage drop across resistor 74 is applied to the bases of transistor '77 of ampliiier stage 8. The amplied signal of transistors 77 and 7S, through relay coil K, energizes the relay, causing contacts K2 and K9 to close and K1 and K7 to open.
`When the next series of pulses is received, if tbe number corresponds to the pre-set value (adjustment ot resistor 55), diode 5B again receives two pulses in time coincidence, and memory 1t) lires. The positive voltage drop across resistor 74a is ted to the base ot transistor Sli of audio oscillator stage ll. Oscillator stage 11 is thereby triggered to produce an audio hrequency signal which is applied to transformer 83, Se and hence to speaker 13 to produce an audible signal.
Summary 0f Operation FIGS. 3A, 3B and 3C show diagrammatically the wave forms corresponding to illustrative conditions of operation or the decoder. It is illustratively assumed that the lirst digit integrator stage 2n is set for response to the dialing of three pulses. lt is further assumed that this is a two divit dialing system, corresponding to the assume illustrative condition of FG. l.
FG. 3A shows the condition for the dialing of a first digit of two pulses. The reference numerals under the wave form diagram of each of the views correspond to the reference numeral ot the corresponding stage shown in the block diagram of FlG. l. Thus, the Diagram 1 in FlG. 3A shows two pulses numbered l and 2, correspending to the dialing of two pulses in stage 1. Diagram 2. shows the corresponding output of integrator stage 2a, showing this output to be below the trigger level (broken lines) which is required to energize one-shot multivibrator stage 3. Since one-shot multivibrator stage 3 is not actuated, there are no further signals produced by any of the stages of the decoder.
ln FlG. 3B, it is illustratively assumed that the ilrst digit number dialed has been 4, or one greater than the pre-set'number tor response. Diagram s of FIG. 3B corresponds to the dialing of four pulses in stage 1.
As shown in Diagram 2a ot FlG. 3B, the output oi' integrator stage 2.a is now greater than the trigger level Furthermore, as shown in Diagram 3 of FIG. 3B, since integrator 2a is actuated above the trigger level for a time corresponding to two dial pulses, one-shot multivibrator stage 3 has a negative output of duration equal to the duration of two pulses of stage l.
Diagram 4 of FlG. 3B shows the resulting differentiated output waveform of diiierentiator'stage Ll. This has a negative beginning pulse and a positive concluding pulse.
Diagram S of FIG. 3B s ows. the resulting negative output signal of No. Z oneehot multivibrator stage 5, (slightly longer than the duration of one pulse of stage '1), actuated by the negative initial pulse of ditierentiator stage d, Diagram 5A of FIG. 3B shows the difierentiated output signal or" stage 5A, having a positive beginning pulse and a negative concluding pulse, this negative concluding pulse corresponding in time substantially to the conclusion of the fourth pulse of stage 1. Since the conclusion of the pulse of stage 5 is prior in time to the conclusion of pulse l or" stage il, the output pulses ofy and 5A are not intime co-incidence. Since tratively Yassumed to be the time of four pulses. assumed that the inputsig'nal is in fact four pulses.' FIG. 4 shows a-dialstage` 2.1, similar to dial stage-1 Y of FIG. 1, and shows dagrammatically the resulting pulse Vwave form of said dial stage'l (assuming that four Vpulses .of time duration Tulare dialed). Stage 22is a slowing the amplitude of each pulse by itself is insufficient to overcome the back bias of diode B, ampliiier 6 does not receive an input signal and consequently produces no output signal. Accordingly, stage S receives no signal and relay K remains unenergized. Hence, the ecoder does not respond to the dialed number 4. Y
In FIG. 3C, it is assumed that the correct digit 3 has beenVv dialed, as shown by Diagram 1. Accordingly, as shown in Diagram 2a :of FIG. 3C, the integrator output (stage 2a) is suiiicient inamplitude and in duration to trigger only a single negative output pulse of one-shot multivibrator stage 3. The differentiated output (Diagram 4 of FIG. 3B) of stage 3 produces a negative ou*- put pulse of stage 5 which lasts a time interval slightly greater than the time interval corresponding to one pulse in stage 1, but less than the time interval corresponding to two such pulses. v,
IThe differentiated output signal of stage 5a (diagram 5a of FIG. 3C) has its negative pulse at a time correl sponding to the conclusion of the third pulseV of stage l.
Accordingly, the output of stages 5 and 5A are intime co-incidence, resulting in a negative output pulseV of stage 5b. Asshown in diagram 6, this negative pulse is amplied by amplifier stage 6 and is fed through relay contacts K7 to the first digit neon memory stage 8. Diatime Ta, pulseA generator stage 24 produces a positiveY n pulse. Diilerentiator stage 25 produces a negative output gram 8 of FIG. 3 shows the resulting DC. voltage stepV l of stage S; Diagram-12 of FIG. 3C shows the resulting D.C. current step produced by amplifier 12, which energizes relay K. Y
It will be apparent, without extended showing, that Y.
similar type Wave forms will be produced when the second digit is dialed, and if the second digit is properly dialed, a positive D.C. voltage will be produced in stage v10, similar to that shown in stage 8 in FIG. 3. As stated above, this will result in theV production of a signal of Vstage 11 and corresponding audible signal in stage 13.
When switch 31 is momentarily opened, as bythe oper- Y ator of the station picking up the receiver in response to the audible signal of stage 13, the D C. voltage output of stages 8 and 10 will be eliminated, and the audible signal will stop. ySwitch 31 may then be again closed,
so that the decoder Will be reset for reception of the next signal. Y
In summary, inthe first embodiment, stage 1 receives input signals each comprising avarying number of electric pulses of relatively uniform duration and frequency Y which number may be less than, the same as or more thanV a pre-selected number. Integrator stage 2a, No. 1 oneshot multivibrator lstage 3 and ditferentiaterV stage V5A serve as first circuit means receiving the pulses Vand Vadapted to produce a iirst circuit output when the number of pulses reaches the preselected number. No. 1 one-short multivibrator stage 3, diierentiator stage Y4 and No. 2 one-shot multivibrator stage 5 serve as seci VKand second circuit outputs 'are in time zzo-incidence.
Embodiment of FIG. 4
The block diagram of 4 showsV a circuit setto respond to a single digit input of time duration Ta, illus- It is Integrator stagel 2a,
circuit which produces an output pulse corresponding inAV Yde lration 4(timefTar) vto the number of pulses of lstage21,
v of stage du.
pulse at the conclusion of the signals supplied to differentiator stage 25 (time Ta). Said negative pulse and the outputof pulse generator 24 are compared in AND stage circuit 26.
The signal of the pulse generator 24 takes place as soon as the number of pulses reaches the number for which integrator 23 is pre-set. Accordingly, if the nega- .tive pulse output of ditferentiator 25V takes place at that time, -tne AND circuit 26 is actuated and produces an output. On the Vother hand, if the number of pulses of stage 21 exceeds the pre-set number, then the time of the negative pulse of diiferentiator 25 is Yafter the Vpulse of generator 2d, and AND circuit 26 isnot energized.
In this embodiment, showing stage 22, integrator Vstage 23 and pulse generator stage Z4 serve as the'tirst circuit means and producea firstY circuit output Whenrthe number of pulses reaches the ypre-selectedl number; Stage 22 and diierentiator stage 23 serve as the second circuit means and produce a second circuit output at the conclusion of the pulses. AND circuit 26 produces an output signal when the first andV second circuit outputs are in time co-incidence.
embodiment ,of FIG. 5
In this embodiment, stages 21, 22 and 25 are also employed. However, instead of integrator` Z3 and-pulse generator 24, there are employed a saw-toothed oscillator or pulse generator 49, for reception of part of the signal of lstage 22, and a clipper 41 for reception of thejoutput tage 49 produces output corresponding to the input signal received from stage 22. If the output of stage 40 reaches the pre-set level, a signal is provided which is sutlicient to actuate clipper stage 41, which thereby produces an output signall corresponding to the time incidence of the pulse for which the decoder is set for response. In the meantime, as in the embodiment of FIG. 4, diierentiator 25 produces a negative pulse corresponding toY the conclusion of the actual number of pulses of stage 21. In other Words, the negative pulse of dilerentiator 25 may takev place before, at the same time as or after the time interval corresponding to the number of pulses for which the decoder is pre-set, de-
pending upon whether the'number of pulses of stage 21 is less than, the same as or more than ythe pre-set number.
In any event, the output of stage 25 and theoutput ofstage 41,*wl1ich are together fed Vto AND circuit stage 42, only energize this stage 42 to produce an output if they are in time unison.
. VEmbodnent of'Fz'g. 6 I k Illustratively, a two-digit system is shown, with relays eliminated and with recycling means providedto reset not shown. n'any event, a signal of time duration Ta, corresponding to the time Ta ofthe input pulses, isY shown as being fed'l to differentiator stage 9d. This stage produces a positive pulse at time To (the'start of the pulses) and a negative pulse at time Ta (the end of the pulses);
The positive pulse of differentiatorr stage 910 supplied to controlled one-shot multivibratorv No.l 1-,stage,9'1
- causes it to produce a negative output'pulse of time equal to the duration of the pre-seiectednumber of pulses,
The durationof the pulse Yof-stage 91is control-ledIf-byl regulation offitsV R-C circuit. V The output ofjstages y 91.
goes to ditferentiator stage 92. whichproduces a :positiveY pulse at thefend of the time duration of YVthezdesired or pre-selected number of pulses. The output of stage 92 goes to one-shot multivibrator stage 93 which produces a negative pulse as the result oi the positive pulse of stage 92, of time duration equal to the time duration of one pulse.
The pulse of stage 93 goes to AND gate stage 94. The negative pulse of diiferentiator 9d, corresponding to the conclusion of the input pulses, is also supplied to stage 94. It the two signals supplied to gate 94 are in time cci-incidence, it produces an output.
Accordingly, in this embodiment, the rst circuit means comprising stages 9-9, $1 92 and 93 produce a irst circuit output at the end of the time interval after reception of the first pulse when the pre-selected pulse is due-l to be received. Stage 9@ serves as the secondcircuit means producing a second circuit outputat the conclusion of the pulses.
The output of gate 94 is supplied to the set input terminal S of dip-liep circuit 9S. vibis has two output terminals 95a and 95]). Normally, the output at terminal 95a is high and at 95o low, this condition being reversed when the dip-.flop is redf The signal from gate 94 fires ip-iiop 95.
Terminal 95a is coupled to controlled one-shot multivibrator No. l stage 9i. Terminal 95h is coupled to controlled one-shot multivibrator No. 2 stage 9M. Nhen terminal 55; is high and 951'; low, stage El can produce an output and @la cannot. when terminal 95h is high and @Se lcw, stage 91:: can produce an output and 91 cannot.
Terminal "db is coupled to the following successive recycling stages: diferentiator stage 9d, univibrator stage 97, dirierentiator stage 98 and ampliiier stage il?. When ip-ilop 95 is lire so that terminal @5b becomes luigi-1, a positive step function is applied to diiierentiator 96. This produces a negative pulse which causes stage y? to nre, this being a one-shot multivibrator that generates a pulse or 4 6 seconds duration, At the end of that time, the negative output pulse oi diierentiator causes ampliier 99 to produce an output which is supplied to recycling input terminal R or" dip-flop 95'. L the proper second digit'bas not yet been dialed, dip-flop 95 is reset to its initial position, so that stage 9i can again be active if the proper rst digit is dialed.
li during the 4 6 second interval before recycling, a second signal is received, the positive output pulse of stage 99 is supplied to stage 9M (which is also coupled thereto) and causes it to produce an ouptut of time duration equal to the duration of the pre-selected number of second digit pulses. output of stage flcz is supplied to diilerentiator 92. .Accordingly it the correct second digit number is dim-ed, gate 4- again receives two input signals in time co-incio'ence and produces an output signal.
The output of gate this time produces no effect on ip-ilop 9S which has already been tired. I-lowevcr, terminal 9515 of dip-liep rand gate 94 are both coupled to AND circuit stage. Vhen terminal 95h is high and when gate 94 produces a signal, stage'llil produces an output. Tais is ampli'ied by amplifier stage lill, which thereby lires au io oscillator stage lili, which in turn drives vspeaker rc3 to produce an audible signal.V
Oscillator ltlZ can be set to operate for a selected time interval. l
While preferred embodiments ot the.. invention have been disclosed, and various-possible changes, omissions andadditions have been indicatedtlierein, itv will be apparent that various other changes, omissions and additions may be made in the invention without departing from the scope and spirit thereof.
Thus, each of the circuits shown may be readily moditied to accommodate a dialing system having one, two, three or more digits. instead of discreet input pulses, there may be an input signal of varying durationwhich is an integral multiple of a basic time unit. The various stages of each embodiment may comprise variousknown circuit components. Other modifications are possible.
What is claimed is:
l. ln an intercornrnunication system having a plurality of stations, an electric signaling system comprising operttor-controlled means at each station for transmitting simultaneously to all other stations an operator-selected number of electric signal pulses oi relatively uniform duration and frequency, and means at each station receiving all signal pulses of the system and automatically responsive to a pre-selected number, distinctive for each station, of said pulses, whereby an operator at one station can call another station by transmitting the number of pulses distinctive for such other station, said pulse-receiving and responsive means comprising first circuit means receiving said pulses and responsive to said pulses to produce a lirst circuit output corresponding to the conclusion of tire time interval required for reception of the preselected nurnber of pulses, second circuit means receiving said pulses and responsive to said pulses to produce a second circuit output at therconclusion of the actual pulses received, aridoutput signal means coupled to said iirst and second circuthereof and responsive thereto to produce an output signal when said first and second circuit outputs are in time coincidence.
2. An electric signaling system in accordance with claim l, said irst circuit means producing said irst circuit output when the number of pulses reaches the pre-selected number, said second circuit means producing said second circuit output at the conclusion ot pulses at least equaling the pre-selected number of pulses.
3. Electric signaling system according to claim l, Said first circuit means comprising a signal integrator, a first one-short multivibrator coupled to said integrator and producing pulses corresponding to input pulses starting with when the number or input pulses reaches the preselected number, a iirst difterentiator coupled to said rst one-shot multivibrator and producing an output pulse corresponding to the beginning of the pulses of said first onesnot multivibrator, said second circuit means comprising said int grator and said iirst one-shot multivibrator and also comprisins7 a second signal dilerentiator coupled to said first one-shot multivibrator and producing a pulse cor-l responding to the conclusion oi the pulses of said rst one-shot multivibrator, and a second one-shot multivibrator coupled to said second diterentiator and producing a pulse in response to the pulse of said second differentiator.
4. Electric signaling system according to claim 1, said irst circuit means producing said rirst circuit output when the number of pulses reaches the pre-selected number, said second circuit producing said second circuit output at the conclusion of the pulses.
5. Electric signaling system according to claim 4, said first circuit means comprising a slowing circuit producing a signal or" relatively uniform amplitude and of time duration corresponding to the total tirne duration of the input pulses, a signal integrator coupled to said slowing circuit, and a pulse generator coupled to said integrator and producing a pulse when the output of said integrator reaches a pre-selected value corresponding to the pre-selected nurnber of pulses, said second circuit means comprising said slowing circuit and a dill'erentiator coupled `to said slowing circuit, said diderentiator producing an output pulse corresponding to the conclusion of the signal of said slowing circuit. v
6. AElectric signaling system in accordance with claim 4, said -irst circuit means comprising a slowing circuit producing a signal of relatively uniform amplitude and of time,
duration corresponding to the time duration of `the input pulses, a generator coupled to said lslowing circuit and, vreducing an output signal of amplitude in proportion to j -the duration of the input pulses', and a clipper coupled to said generator `an lproducing a signal when the output of said generator reaches a value corresponding to the reception'of the pre-selected number of pulses, saidsecond circuit means comprising saidsl ing circuit and a difierentiat'orl coupled to said slowing circuit and producing an means for reception of the outputs Y l l; output signal corresponding to the conclusion of said slowing circuit. K A
7.Y VElectric'signaling system according to claiml, said lirst circuit means producing a iirst circuit output at the end of the time interval after reception or" the -irstpulse when the pre-selected pulse is due to be received,rsaid second circuit means producing said second circuit output at the conclusion of the pulses.
8. Electric signaling system in accordance with claim 7, said rst circuit means comprising a slowing circuit producing an output signal of relatively uniform amplitude and of time duration corresponding to the duration of the Vinput pulses, a irst ditlierentiator coupled to said slowing Ycircmlt and producing an output pulse corresponding tothe beginning intime of the input of-said -iirst differentiator,
a first one-shot multivibrator coupled to said yfirst, differcntiator and producing a signal of time duration corresponding Vto Vthe duration of the preselected number of pulses, a second diierentiator coupled to said irst onesllot multivibrator and produciugla signalcorrespondiug lto the conclusion of the signal Vof said first one-shot multi- 2,444,741 7 /4-8Y Loughlin f; 1340-164Y l 2,480,624 8/49.y Barnard et al 340-164 Y 2,564,062 '8/51-j Herrick S40-*164 l2,564,692V 8/5-1 Hoeppner 340-164 2,568,750 9/5'1 l v'Krause etal. 340,-164 2,697,823 12/.54 Undy 340-16472( 2,766,810 4/55 l Jacobsen 340-164 XR 2,955,279 l0/60 Bode et al. Y 340-164 2,96l,609 ll/6O Manring 328-110 XR 2,989,730 5/61` YBl'osh 3407-164 Y l2 l vibrator, and a second one-shot multivibrator coupled to said second diierentiator and producing-`asignal corresponding to the signal of said dierentiator, said second circuit means comprising said slowing circuit and said first y diierentiator, said first diierentiator producing a kfurther signal at the conclusion of the input pulses, said further signal serving as the second circuit output.
References Cited vbythe Examine; l UNITED STATES PATENTS f i i Y NEIL C. READ, Primary Examiner.
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|U.S. Classification||340/12.18, 326/105, 327/18, 327/36|
|International Classification||H04Q1/32, H04W88/02|
|Cooperative Classification||H04W88/028, H04Q1/32|
|European Classification||H04Q1/32, H04W88/02S4P|