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Publication numberUS3320568 A
Publication typeGrant
Publication dateMay 16, 1967
Filing dateAug 10, 1964
Priority dateAug 10, 1964
Publication numberUS 3320568 A, US 3320568A, US-A-3320568, US3320568 A, US3320568A
InventorsLewis K Russell, Wilhelm H Legat, Iii Roy C Hackley
Original AssigneeRaytheon Co
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Sensitized notched transducers
US 3320568 A
Abstract  available in
Previous page
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Claims  available in
Description  (OCR text may contain errors)

y 1967 L. K. RUSSELL ETAL 3,320,568

SENSITIZED NOTCHED TRANSDUCERS Filed Aug. 10, 1964 2 Sheets-Sheet 1 I P B r F 1 F 2 37 F/G. 6 40 r 3/ I/Vl/E/VTORS LEW/.5 A. RUSSELL W/LHELM H. LEG/17' United States Patent 3,32%,568 SENSITEZED NGTCHHLD TRANSDUCERS Lewis K. Rossetti, Livermore, Wiihelm H. Legat, Woodside, and Roy C. Hackiey Hill, San Jose, (Jalifi, assignors to Raytheon Company, Lexington, Mass, a corporation of Deiawarc IFiied Aug. 10, 1964, Ser. No. 388,412 4 Gaiters. (CL 538-2) The present invention relates to semiconductor signal translating devices and, more particularly, to sensitized notched transducers and methods for making the same.

This invention sets forth a semiconductor signal translating device of a new and improved form and is predicated upon the discovery that nonuniform, concentrated, anistropic stress on junctions can be detected and interpreted in terms of the current, voltage or reactance characteristics of such junctions. These types of signal translating devices are described in copending applications, Ser. No. 261,065, filed Feb. 26, 1963 and Ser. No. 268,- 772, filed Mar. 28, 1963. Both of these applications have been assigned to the assignee of the instant application.

The term junction as used herein is defined asa region of transition between semiconducting regions of different electrical properties-which definition was established by IRE standards in the October, 1954 issue of the Proceedings of the IRE.

The term point defects refers to that portion of applicants invention which comprises various imperfections in the crystalline lattice of the semiconductor material. These point defects may be formed by such diverse methods as: scribed lines, rapid quenching from high temperatures, diffusion of various materials (such as gold) with a subsequent quenching, irradiation by particle beams (such as electron beams), sandblasting and even polishing with an abrasive.

In terms of process, the invention relates to the preferential etching of stressed or deformed semiconductor material by an acidic etchant. In terms of structure, the invention comprises a body of crystalline semiconductor material having a junction therein, which material has a plurality of point defects adjacent a first side of the junction and a notch which is adjacent the reverse side of the junction in opposition to the point defects. The opposing notch provides means for producing a concentrated, nonuniform, anisotropic stress within a small region of the junction. The point defects and notch coact to effect a much higher response than previous transducers, e.g., as high as 1.74 mi-croam ps per dyne-centimeters. Thus, the inclusion of these point defects provides a sensitized device, as that term is used herein.

The theory of operation of this invention, however, is not completely known. It is believed that the point defects produce dislocation loops deep within the junction, carrying generation-recombination centers with them. These dislocation loops in the crystalline lattice are prevented from collapsing (With increased temperature) by being pinned to the damaged surface created by the point defects. Under conditions of no bending moment the reverse characteristic of the diode is already degraded; that is, a generation current is superimposed over the normal diode reverse leakage current. Thus, when a bending force is applied to the device such that the notch is narrowed, the dislocation loops are caused to collapse or be forced towards the point defects. This, in turn, pulls generadon-recombination centers out of the depletion layer and decreases the generation current below its zerostress value. When a bending force is applied to in the opposite direction, the notch is widened which causes the dislocation loops to penetrate deeper into and toward the depletion layer carrying with them a greater number of generation-recombination centers. This serves to increase the generation current.

In an illustrative embodiment of this invention a planor, sensitized notched transducer comprises a high resistivity substrate (approximately fifty ohms-centimeter) of single crystalline silicon of one conductivity type about 20 x x 8 mils. An opposite conductivity type layer is produced on the substrate by any well known method such as diffusion. Ohmic contacts are maintained in electrical communication with both the diffused layer and the substrate in a known manner, such as thermocompression bonding. Point defects are then formed in the diffused layer by one of the previously mentioned methods and an opposing back notch is cut into the substrate by an acidic etching technique that will be more fully described below. The resulting device operates at frequencies between zero and forty kc. (it also has D.C. sensitivity). Therefore, this device may be used in any piece of equipment Where it is desired that mechanical force or pressure be converted into an electrical signal. Since the device has high sensitivity, only a small number of amplification steps are necessary to obtain a usuable signal.

It is thereof an important object of the present invention to provide an improved semiconductor transducer having a higher sensitivity than previous transducers.

A further object of the invention is to provide means for producing dislocation loops in a region of a junction within a semiconductor transducer.

Yet another object of the present invention is to provide means for concentrating nonuniform, anisotropic stress in a small region of a junction Within a semiconductor transducer.

A still further object of the instant invention is to provide an acidic etching technique for forming notches in semi-conductor materials.

FIGS. 1-5 represent successive operations in the present improved method of forming a notch in a body of semiconductor material;

FIG. 6 shows a longitudinal sectional view of a sensitized notched transducer according to this invention;

FIG. 7 is an enlarged view of a portion of FIG. 6;

high frequencies;

FIG. 9 depicts a wide-notched or channeled transducer having an opposing sensitized area;

FIG. 10 illustrates a sensitized notch transducer in which an ohmic contact is alloyed into the notch; and

FIG. 11 illustrates a transistor embodiment of the device shown in FIG. 10.

In a previous device utilizing the anisotropic strain employed to, alternatively, rectify material or vary the net resistance of the material. This type of device is more fully set forth in the previously mentioned copending application, Ser. No. 261,065.

Later embodiments of these devices achieved the desired stress concentration by notching the semiconductor element adjacent the P-N junction. These notched devices, together With a method of etching the notches therein by means of a base material such as sodium hydroxide (NaOH), are set forth in the aforementioned copending application, Ser. No. 268,772. However, as more fully set forth hereinafter, the present invention is notched by means of an improved acidic etching tech- The notch formed by this acidic technique is preferred in certain applications due to the fact that it can be one-fourth the width of the notch formed by NaOH and yet remain the same depth. For example, notches have been formed in semiconductor material by the present acidic technique which are 2.2 mils in width at their widest point and 8 mils deep. Notches formed by the NaOH method which are 8 mils deep, are usually over 9 mils wide at their widest point.

Referring now to FIG. 1, there is disclosed a semiconductor body or diode 11 of suitable material, such as silicon, germanium, or gallium arsenide, comprising a junction 12 which separates a region of p-type conductivity material 13 from a region of N-type conductivity material 14. Preferably, body 11 is composed of a chip of 111 crystalographic oriented semiconductor material such as silicon. N-type dopants can comprise boron or iodine. P-type dopants can comprise phosphorous or aluminum.


Junction 12 in body of semiconductor material 11 may initially be formed by the method set forth in US. Patent No. 3,025,589 which issued to J. A. Hoerni on Mar. 21, 1962, entitled, Method of Manufacturing Semiconductor Devices. For example, one satisfactory device may be formed by diffusing a P-type impurity into an N-type silicon wafer. With an N-type silicon wafer, the impurity would be one of the known acceptor impurities, preferably alloyed with silicon. Application of sufficient heat to raise the wafer to an appropriate temperature results in a diffusion of the impurity into the Wafer so as to produce a region or portion of P-type silicon within the wafer. Intermediate the two types of silicons now forming the wafer, there is produced the previously defined junction. As silicon technology is available in the literature, it is here only noted that N-type silicon may be formed by inclusion of an impurity chosen from Group V of the Periodic Table while P-type silicon may be formed by inclusion of an impurity from Group III.

Although the instant inventive process will be illustrated with reference to a diode type semiconductor body, it is within the scope of applicants process that various semiconductor devices, including transistors, could also be utilized.

FIG. 2 shows the semiconductor body 11 after it has been masked with an etch resistant film 16, e.g., beeswax. This masking operation may be performed by dipping semiconductor body 11 in a solution of beeswax and a petroleum solvent, such as toluene =or xylene, until the entire workpiece is covered by the solution. It has been found that this solution best promotes masking at a temperature of about 80 C. The masking operation is then concluded by removing the semiconductor body 11 from the solution and drying it in air at room temperature. Microscopic examination of the work is then conducted to disclose any possible pin holes that may be present in film or coating 16. If holes are observed, the foregoing operation is repeated until a uniform hole-free coating 16 is achieved as shown in FIG. 2. It is to be noted that although beeswax is preferred, it is within the scope of applicants process that coating 16 be composed of any substance which is known to resist etching.

Thereafter, as shown in FIG. 3, a groove 17 is scribed through layer 16. This scribing operation removes a strip of the film 16 down to the surface of P-type conductivity material 13 and at the same time the applied pressure damages body 11 in such a manner that its lattice structure is both deformed and stressed. Damaging is preferably accomplished by scribing with a diamond stylus having a pointed tip. However, this method of masking all of the surface except that portion which is exposed through groove 17 with the etch resistant coating 16 and damaging the semiconductor material 11 is by way of illustration only. A variety of techniques known to the art of manufacturing semiconductor devices 4- may be employed for these purposes without departing from the spirit of the present invention.

As shown in FIG. 4, a notch 18 is next formed in P-type conductivity material 13 adjacent groove 17. Notch 18 is achieved by placing coated and scribed semiconductor body 11 in an etching tank and submerging same in a mechanically agitated, acidic etchant. This acidic etchant may be composed of any of the acidic silicon etches known to the art, such as either 35 or 4-1 ratios of hydrofluoric (HF) and nitric (HNO acids.

In some instances it has been found advantageous to adjust the etching rate by diluting the etchant with deionized water or by adding acetic (HC H O acid. In this manner the etchant preferentially etches semiconductor body 11 along the damage formed by the scribing process rather than laterally across its surface. The width and the depth of notch 18 is dependent upon such parameters as: the composition of the etching solution, the width of scribed groove 17 and the time length of mechanical agitation of the etching solution. When the desired configuration is achieved, NaOH is mixed (in large quantities) into the etchant to quench the etching action. Semiconductor body 11 is then removed from the etching tank and washed in deionized water. The notched device may be then cleaned with a petroleum solvent (to remove etch resistant layer 16) and dried.

In certain applications, however, a kerf-like notch is desired in material 13. As shown by the dotted lines in FIG. 5, the envelope of successively etched grooves 19 form a kerf 21. To form this kerf, the following method and technique is utilized. First, the notch 18, as shown in FIG. 4, is formed by the previously described process. Then, rather than cleaning with petroleum solvent and drying, wax coated semiconductor body 11 is heated until layer 16 flows into notch 18. A portion of the wax now adhered to the bottom of notch 18 is then scribed away and the etching operation is repeated on the thus exposed portion of semiconductor body 11 for a shorter time period than that used to form notch 18. These operations are then repeated as often as required to achieve the desired geometry and dimensions. From the above description, a new technique or method has been described for producing notches or grooves in semiconductor materials.

With reference to FIG. 6, there is shown a cantileveredtype, sensitized strain transducer 31 comprising a body of semiconductor material 41) having a junction 41 therein. and held in a cantilevered position by a support means 32. Support means 32 may comprise a first electrode 33 in contact with a surface 34 of semiconductor body 40. Electrode 33 is maintained in a fixed relationship to a second electrode 35 by means of an insulator 36. The electrodes 33 and 35, together with insulator 36, provide a support means whereby body 40 is held in a cantilevered position and whereby opposing surfaces 34 and 37 of the body are maintained in electrical communication with electrical communication with electrodes 33 and 35, respectively. Support means 32 is shown as an electrode device by way of illustration only; it is entirely within the scope of the present invention that the support means be composed of an electrically insulating material while electrical contact is provided by some other means.

The major contribution of the instant invention resides in the fact that the semiconductor body 40 has both point defects 38 (introduced in a manner to be described hereinafter), adjacent junction 41, and an opposing notch or groove 39 etched into surface 37. As more fully set forth in the previously mentioned copending applications, it is preferred that junction 41 lie within a relatively shallow depth (e.g. 0.00002 inch) of surface 34. Notch or groove 39 may be in the form of a kerf or a V-shaped groove or any other suitable reduction in at least one dimension of body 40, such as perpendicular to the plane of surface 34, so that anisotropic stress will be applied to a small area of junction 41. It is preferable that notch 39 be located relatively close to the clamped end of body 40 with its apex near junction 41 so that a force applied along the line shown by force arrow 42 or 43 will take advantage of the mechanical leverage to cause anisotropic stress to appear in junction 41 at the apex of groove 39. The net effect is a variation in the electrical characteristics of the junction in proportion to the magnitude and direction of the force applied.

As shown in the enlarged portion of FIG. 6 depicted in FIG. 7, strain transducer 31 further comprises a plurality of point defects 38 adjacent the pinnacle of groove 39. These point defects can be engendered by a variety of means. For instance, in the aforementioned x 120 x 8 mils. illustrative embodiment of this invention, point defects 38 were formed in the crystalline lattice of the semiconductor body 40 by scribing a line into (and thus damaging) surface 34 in opposition to notch 39. This produces dislocation loops within the junction and pins these dislocation loops to the damaged surface created by the scribed line.

These point defects can also be formed in such semiconductor materials as silicon by rapidly quenching the silicon from high temperatures. As stated on pages 3663- 3665 of the December 1962 issue of the Russian journal Fizika Tverdogo Tela, volume 4, No. 12, this quenching process can be achieved by quenching the semiconductor material from 1200 C. This process comprises: heating the material to 1200 C., maintaining this temperature for twenty to sixty minutes, and then injecting the material into an oil bath to cool the material at a rate not less than 10 -10 C./second. An alternative quenching proc ess, one in which the semiconductor material is heated in a nitrogen atmosphere for several hours and then quenched rapidly, is described in an article entitled, Quenched-In Recombination Centers in Silicon, by G. Benski which was published in volume 103, No. 3, in the August 1, 1963, issue of Physical Review.

Applicants have also found that point defects 38 may be formed by irradiation with particle beams, e.g., electron beams. As disclosed in Electron-Bombardment Damage in Silicon by G. K. Wertheim which was published in volume ll. 0, No. 6, of Physical Review on June 15, 1958, this irradiation can be accomplished by electron bombardments in the vacuum of a Van de Graaff accelerator at a variety of temperatures and at bombarding energies of 1.0 and 0.7 mev. Applicants have also found that these point defects are enhanced by diffusion of various materials, such as gold or copper, followed by the aforementioned rapid quenching. An illustrative example of this technique is taught by Thermal Generation of Recombination Centers in Silicon by B. Ross and J. R. Madigan published on December 15, 1957, in volume 108, No. 6, of Physical Review. Thus, applicants have found that a variety of means may be used to create the crystalline impurities or interstices within a semiconductor material which comprise point defects 38.

FIG. 8 depicts an alternate embodiment of strain transducer 31. In this embodiment, a semiconductor body 54 having a notch 55 and point defects 56 adjacent a junction 57 is supported at one end by support means 58. A thin vibrating element 51 is adhered to the nonsupported end of the semiconductor body 54 to provide a vibrating element which greatly aids high frequency response. Thus. the device will convert high frequency vibrations (above 25 kc.) along force line 52 or 53 with close to perfect fidelity.

FIG. 9 illustrates yet another embodiment of a cantilevered sensitized strain transducer. In this embodiment, a semiconductor body 69, suitably supported at one end by support means 61 comprises a channel 62 adjacent junction 63 wherein said channel substantially defines a trapezoidal groove having a planar base surface 64 generally parallel to junction 63 across an appreciable area thereof. Thus the term channel, as used herein, refers to a wide-notched groove having at least three sides, one of which is substantially parallel to junction 63. All other elements of semiconductor body 60 are substantially the same as those of strain transducer 31. However, point defects 65 are now formed over an appreciably wider area and may be produced by such methods as sandblasting surface 66 adjacent channel 62 or polishing surface 66 with an abrasive or scribing a plurality of relatively close parallel lines into surface 66 adjacent channel 62.

Referring now to FIG. 10, there is disclosed a sensitized strain transducer according to the present invention in which a semiconductor body 70 has a notch and point defects 76 as described, and in which a notched side ohmic contact 71 is alloyed directly into notch 75. Ohmic contact 72 is then alloyed to the opposing side of semiconductor body 70. This provides a better current path from terminal 73 to terminal 74 by maximizing the current through the sensitized region of the device, thereby avoiding additional recombinations outside the space charge (depletion) region. Terminals 73 and 74 are preferably compression bonded gold lead wires.

FIG. 11 shows an embodiment of a sensitized strain transducer transistor 81 similar to the device of FIG. 10, but wherein the body 82 of semiconductor material has two junctions 83 and 84 therein. Strain transducer 81 employs the ohmic contact arrangement as disclosed in FIG. 10. The notch 86 is located adjacent only the single junction 84. For this reason, when force is applied along either direction indicated by force arrow 87 or 88, the concentrated, nonuniform, anisotropic stress produced by the coaction of this force with notch 86 affects the characteristics of junction 84, only. This provides a higher response for junction 84 without affecting the properties of junction 83. For the PNP transistor shown, it is preferred that alloyed ohmic contacts 89 and 90 are composed of aluminum while base ohmic contact 91 is composed of a gold containing N-type impurity.

It should be noted that many changes in this structure as shown in the drawing and described in the specification may be made within the scope of the present invention. For example, while the above description of the transistor structure has been referenced to a PNP transistor, it will be appreciated that it is equally applicable to a PNP type transistor. Further, while cantilevered embodiments are shown, other configurations such as thin diaphragms are also possible. Accordingly, it is to be understood that the form of the present invention is to be taken as a preferred example of the same and that various changes in the shape, size, material, constitution, and arrangement of parts may be resorted to without departing from the spirit of said invention or the scope of the subjoined claims.

What is claimed is:

1. A device comprising (a) a body of semiconductor material having a first region of selected conductivity type and a second region of opposite conductivity type, said first and second regions having respective first and second oppositely disposed planar surfaces, and a P-N junction therein between said regions and extending in a plane parallel with one of said surfaces,

(b) a groove extending transversely across said first surface into said first region and terminating short of said junction, said second region having sensitivity enhancing point defects in the area of said junction closest to said groove,

(0) first and second electrodes electrically connected respectively to said first and second regions for connection of the device into an external circuit,

(d) and mounting means connected to one end of the body for supporting the body in a cantilevered position for bending movement about the apex of the groove.

2. A device as set forth in claim 1 wherein said groove is channel-shaped in cross section.

3. A device as set forth in claim 1 wherein said groove is V-shaped in cross section.

4. A sensitized strain transducer comprising (a) an axially extending semiconductor body having a first region of selected conductivity type and a second region of opposite conductivity type, said first and second regions having respective first and second oppositely disposed planar surfaces, and a P-N junction therein between said regions extending in a plane parallel with one of said surfaces,

(b) a groove extending transversely across said first surface of said semiconductor body into said first region and terminating short of said junction and oriented perpendicular to the axis of said body,

(c) said second region having sensitivity enhancing point defects therein in the area of said junction closest to said groove, and

(d) electrode support means engaged with the semiconductor body maintaining said body in a cantilevered position and providing electrical contact means for connecting said transducer to an external circuit.

References Cited by the Examiner UNITED STATES PATENTS ANTHONY BARTIS,




Doucette et al. 338-2 Steigerwald.

Wright 3382 Fell 3382 X McLellan 338--4 Rindner 338-2 Primary Examiner.

RICHARD M. WOOD, Examiner.

W. D. BROOKS, Assistant Examiner.

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Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US3444444 *Oct 17, 1966May 13, 1969Matsushita Electric Ind Co LtdPressure-responsive semiconductor device
US3518508 *Dec 1, 1966Jun 30, 1970Matsushita Electric Ind Co LtdTransducer
US3519899 *Oct 9, 1967Jul 7, 1970Sony CorpMagneto-resistance element
US3590336 *May 23, 1968Jun 29, 1971Matsushita Electric Ind Co LtdBending force sensitive mechano-electrical converting device employing a semiconductor diaphragm
US4180422 *Dec 6, 1973Dec 25, 1979Raytheon CompanyMethod of making semiconductor diodes
US4851080 *Dec 14, 1988Jul 25, 1989Massachusetts Institute Of TechnologyResonant accelerometer
US5211060 *Jan 21, 1992May 18, 1993Eastman Kodak CompanyBidirectional force sensor
U.S. Classification338/2, 257/417, 257/773, 148/DIG.159, 257/622, 73/849, 257/586, 148/DIG.510, 148/DIG.115, 73/777, 148/DIG.169
International ClassificationH04R23/00, H01L29/00
Cooperative ClassificationY10S148/051, H04R23/006, H01L29/00, Y10S148/169, Y10S148/115, Y10S148/159
European ClassificationH01L29/00, H04R23/00C