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Publication numberUS3345610 A
Publication typeGrant
Publication dateOct 3, 1967
Filing dateMar 31, 1964
Priority dateMar 31, 1964
Publication numberUS 3345610 A, US 3345610A, US-A-3345610, US3345610 A, US3345610A
InventorsEdgar Wolf
Original AssigneeDigitronics Corp
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Signal detection apparatus
US 3345610 A
Abstract  available in
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Claims  available in
Description  (OCR text may contain errors)

United States Patent 3,345,610 SIGNAL DETECTION APPARATUS Edgar Wolf, New Hyde Park, N.Y., assignor to Digitronics Corporation, Albertson, N.Y., a corporation of Delaware Filed Mar. 31, 1964, Se!- N0. 356,143 4 Claims. (Cl. 340146.1)

ABSTRACT OF THE DISCLOSURE accumulating device.

This invention pertains to signal transfer apparatus and more particularly to apparatus for detecting the simultaneous presence of signals from more than one of a plurality of sources.

Quite often in signal transfer systems wherein there are a plurality of sources which feed a signal utilization device only a signal should be present from one source at a time. If signals are simultaneously present from more than one source there is a malfunctioning of the apparatus and the utilization device receives signals representing erroneous information.

Although such a problem arises in many signal transfer and data processing applications one application wherein such malfunctioning has serious consequences is in a parimutuel system. In such a system, transactions or wagers are entered into the system by a clerk who selects key operated switches on a ticket issuing machine. In each machine are a set of key operated switches, each associated with a particular animal in the contest. When a wager is to be placed on a particular animal the clerk depresses the associated key. The closure of the key causes a signal to be transmitted to a processing unit wherein accumulations of all wagers on each animal are separately accumulated to provide the information required for odds and payoff calculations.

However, if through some malfunction of the system signals representing more than one animal are simultaneously fed to the processing unit it receives erroneous information because the clerk at any one ticket issuing machine can enter a wager on only one animal at a time and the machines are sequentially interrogated. Accordingly, simultaneous acceptance of more than one signal is erroneous and will lead to improper. odds and payoff calculations.

The usual solution to such a problem in digital computer systems is to group the signal lines transmitting the signals in all possible combinations of pairs of lines and feed each pair of lines to a coincidence circuit. However, it becomes immediately apparent that as the number of signal lines increases beyond two or three the number of coincidence circuits become excessive. For example, if five signal lines are involved ten coincidence circuits are required. Accordingly the usual digital techniques for coping with such a problem are expensive.

It is, accordingly, a general object of the invention to provide improved apparatus for detecting for the simultaneous presence of signals on more than one of a plurality of signal lines.

It is another object of the invention to provide im- 3,345,6W Patented Oct. 3, 1967 proved apparatus for detecting for the simultaneous pres ence of signals on more than one of a plurality of signal lines which requires a minimum of equipment.

It is a further object of the invention to provide equipment of the kind described which in addition to detecting such a condition prevents the transmission of the signals to a utilization device.

Briefly, the invention contemplates apparatus which includes a plurality of signal sources which transmit sub stantially equiamplitude signals to a utilization device and includes means for indicating the simultaneous transmission of signals by more than one of the plurality of sources. The indicating means comprises a signal generating means with a plurality of inputs for receiving the aquiamplitude signals from the signal sources. The signal generating means includes means for generating a signal having a first amplitude when a signal is received by only one of the inputs and for generating a signal at least equal to a second amplitude when signals are received by two or more of the inputs. The signal generating means further includes an output for transmitting the generated signals to a signal threshold detection means. The signal threshold means transmits an indicating signal whenever it receives a signal having an amplitude between the first and second amplitudes.

Other objects, features and advantages of the invention will become apparent from the following detailed description when read with the accompanying drawing whose sole figure shows by way of example, and not limitation, apparatus for practicing the invention.

Referring to the sole figure there is shown a plurality of switches 2A to 2N inclusive which are signal sources. Since all the switches are identical only switch 2A will be described in detail. Switch 2A has an input terminal 2A1 connected to source of potential 0V, an output terminal 2A0 connected via hold down resistor 2AR to a source or negative potential 6V, and a bridging contact ZAC. When switch 2A is open, as shown, the output terminal 2A0 is at the negative six volt potential and no signal is said to be transmitted therefrom. However, when switch 2A is closed (bridging contact 2AC connecting input terminal 2AI to output terminal 2A0) output terminal 2A0 is at ground potential and is said to be transmitting a signal.

Switches 2 can, for example, be key operated wherein the switches and associated keys are of a set included in a clerk-operated ticket issuing machine of a parimutual system. Each key is associated with a different animal in a contest.

The output of each switch 2 is connected via line 4, agate 6 and a line 8 to an accumulator 10. During normal operation it can be assumed that there is a direct connection between the lines 4 via the gates 6 to lines 8. Accordingly, each time a switch 2 is closed one of the accumulators 10 associated with the closed switch accumulates a signal. If each signal received represents a transaction then the accumulator keeps a count of the transactions.

The accumulators 10 can be any conventional accumulators such as cascaded binary counters or other registers employed in the digital computer art.

It should be noted that the system as now described will accept transactions made by the simultaneous closing of more than one of the switches 2 or its equivalent, i.e. signals being simultaneously present on more than one of the lines 4. For example, assume switches 2A and 2B are closed. Then the signal on line 4A will pass via gate 6A and line 8A to its accumulator NA, and the signal on line 413 will pass via gate 6B and line 8B to its accumulator 10B. In some cases this is, from a systems point of view, permissible. However there are many times when such a situation is undesirable, one being in the given parirnutuel system example.

Accordingly, the remainder of the apparatus is provided to detect such undesirable operation and to prevent the accumulation of the questionable signals. In particular, there is provided a signal generating means 12 feeding a signal threshold detector 14 which transmits signals to error indicator 16 and via invertor 17 and line 18 to control inputs 20 of gates 6. Wherifa'signal is present on only one of the lines 4 signal generating means 12 transmits a signal of a first amplitude from its output terminal 13 to signal threshold detector 14; however, if signals are present on more than one of the lines 4 signal generating means 12 transmits a signal at least equal a second amplitude to threshold detector 14. Threshold detector 15 normally transmits a signal, i.e. is at ground potential representing logical 1. However, if it receives a signal having an amplitude between the first and second amplitudes it does not transmit a signal from its output terminal 15, i.e. is at a minus siX volt potential representing logical 0. The absence of a signal activates error indicator 1-6 and causes gates 6 to block the transmission of signals received from lines 4.

The details of the apparatus will now be described. Signal generating means 12 includes a plurality of inputs connected to lines 4. Each input has a serially connected diode 22 and resistor 24. The anodes of diodes 22 are respectively connected to lines 4 and the cathodes are respectively connected to one end of resistors 24. The other ends of resistors 24 are connected together at junction 26. Junction 26 is connected via resistor 28 to source of negative potential 26V. A potential divider including serially connected resistors 30 and 32 connect junction 26 to source of positive potential 20V. The output 34 of the potential divider is connected to the input of emitter-follower amplifier 36. Amplifier 36 includes a PNP transistor T1 having a base connected to output 34, a collector connected to source of negative potential 8.2V and an emitter connected via resistor 38 to source of potential V and via resistor 40 to source of positive potential 20V. Junction 13 connected to the emitter of transistor T1 is the output of emitter-follower amplifier 36.

When no signals are present on any lines 4, i.e. they are at a potential of minus six volts, junction 26 is at a potential of less than minus six volts. If a signal is present on one of the lines 4, say line 4A is at ground potential, then by virtue, primarily, of the divider action of resistors 24A and 28, junction 26 will be at a first potential of approximately minus six volts. If signals are present on two lines, say lines 4A and 4B are both at ground potential, then junction 26 is approximately at a second potential of minus 3.6 volts. For good signal discrimination it is desirable to consider the changeover point from the one signal condition to the more than one signal condition to be a potential of about minus five volts. Accordingly, when junction 26 is below a potential of minus five volts this indicates only one of the lines 4 is transmitting a signal and when above this potential more than one of the lines 4 is transmitting a signal. The resistors 30 and 32 are chosen to shift this changeover point at output 34 to a negative potential of about 0.25 volts because of the sensitivity of threshold detector 14. Emitterfollower amplifier 36 merely provides without level shifting or signal attenuation a high impedance load for junction 26.

Threshold detector 14 is designed to transmit a signal (ground potential representing logical 1) as long as it receives a signal of less than minus 0.25 volt potential and to transmit no signal (minus six volt potential representing logical 0) when it receives a signal of greater than minus 0.25 volt potential. Detector 14 includes a transistor T2 having a very narrow active region from the cut-off state to the full-on state. Transistor T2 of the PNP type has a base connected via current limiting resistor 42 to output 13, an emitter connected to ground potential and a collector connected via resistor 44 to source of negative potential 26V and to the output 15 of threshold detector 14. When transistor T2 is cut off diode 46 clamps the output 15 to a minus six volt potential (the so-called signal transmiting state for detector 14). When transistor T2 is full conducting the output 15 is at ground potential (the so-called no signal transmitting state for detector 14).

Therefore, when a signal is present on only one line 4 junction 26 is at a minus six volt level, output 34 and output 13 below the minus 0.25 volt level, transistor T2 is full conducting and output 15 is at ground potential. When signals are present on at least two of the lines 4 junction 26 is at least at a negative potential of about minus 3.6 volts, outputs 26 and 13 are at potentials greater than minus 0.25 volt, transistor T2 is cut off and output 15 is at a minus six volt potential.

The Voltages on line 18 control the action of gates 6. This action will now be described. Consider a typical gate 6N which includes diodes 48N and 50N. The anodes of diodes 48N and 50N are connected together at junction 52N which is connected to line 8N and via resistor 54N to source of positive potential 20V. The cathode of diode 48N is connected to line 4N; and the cathode of diode 50N is connected to the control input 20C of gates 6N. When the signal on line 18 is at ground potential, the gate 6N is open since the signal on line 8N depends on the signal an line 4N. If line 4N is at ground potential (the signal condition) line 8N is also at ground potential (the signal condition) and if line 4N is at a minus six volt potential then line 8N is also at this potential (the no signal condition). On the other hand, when line 18 is at a minus six volt potential an inhibiting control signal is fed to input 20C. The minus six volt potential is transmitted to junction 52C which remains at this level regardless of the level of the signal on line 4N. Accordingly, gate 6N is blocked since line 8N is clamped to the no signal condition. The action of gates 6A and 6B is similar to the action of gate 6N. There has accordingly been shown apparatus which senses for the simultaneous transmission of signals from more than one source and which will block the transmission of such signals to a utilization device.

It should be noted that although only three sources were shown the apparatus will and usually does operate with many more sources. Furthermore, while specific voltage levels and polarities were given it Will be apparent to those skilled in the art that other voltage levels and polarities could be employed.

APPENDIX The following are representative values of certain of the components employed in signal generating means 12 and threshold detector 14:

Diode 22 1N457-A Diode 46 GTDXZ Resistor 24 ohms 1,000 Resistor 28 do 3,000 Resistor 30 do 27,000 Resistor 32 do 115,000 Resistor 38 do 180,000 Resistor 40 do 180,000 Resistor 42 do 10,000 Resistor 44 do 7,500 Transistor T1 GA004 Transistor T2 GA004 While only one embodiment of the invention has been shown and described in detail there will now be obvious to those skilled in the art many modifications and variations which satisfy many or all of the objects of the invention but which do not depart from its spirit as defined by the appended claims.

What is claimed is:

1. Apparatus for detecting the simultaneous presence of signals which swing from a first potential to a second potential from more than one of a plurality of sources, said apparatus comprising signal generating means including a plurality of inputs for receiving the equiamplitude signals from said sources wherein each input is connected to one of said sources, each of said inputs including a unidirectional conducting device and a resistor connected in series, the resistance of said resistors being substantially equal, the ends of said unidirectional conducting devices remote from said resistors being connected to said signal sources and said unidirectional conducting devices being polarized in the same direction, said direction being such that signals from said sources are transmitted to said resistors, the ends of said resistors remote from said unidirectional conducting devices being connected to a common junction, a source of potential, a common resistor for connecting said common junction to a first source of potential, the amplitude of the potential at said source of potential being greater than the potentials through which said signals swing, the resistance of said common resistor being chosen with respect to the resistance of any one said resistor and with respect to the potential of said source of potential such that when a signal having said second potential is received by only one of said inputs said common junction is at a first output potential and when signals of said second potential are received at more than one of said inputs simultaneously said common junction is at least at a second output potential, a signal threshold detection means including an input and an output, said signal threshold means transmitting an indicating signal from its output only when it receives at its input a signal at least equal to a given potential, and coupling means for connecting said common junction to the input of said signal threshold means so that when said common junction is at said first output potential the potential of the signal received at the input of said signal threshold means is at a potential less than said given potential and when said common junction is at said second output potential the signal received at the input of said signal threshold means is at a potential greater than said given potential.

2. The combination of claim 1 wherein said coupling means includes an emitter-follower amplifier means including an input and an output, means for connecting the input of said emitter-follower amplifier means to said common junction and means for connecting the output of said emitter-follower amplifier means to the input of said signal threshold means.

3. The combination of claim 2 wherein said means for connecting the input of said emitter-follower amplifier means includes a resistance potential. divider including first and second terminals and an output, means for conmeeting said first terminal to said common junction, means for connecting said second terminal to another source of potential and means for connecting the output of said resistance potential divider to the input of said emitterfollower amplifier means and wherein said signal threshold means includes a common base amplifier means which switches between a cut-off state and a full conducting state over an input signal range of less than one-half a volt.

4. Apparatus for detecting the simultaneous presence of signals from more than one of a plurality of sources, said apparatus comprising a plurality of gate means, each of said gate means including a first input connected to one of said signal sources; a control input and an output for transmitting a signal from its input to its output only when an inhibiting signal is not present at its control input; a signal utilization means connected to the outputs of said gate means; signal generating means including a plurality of inputs for receiving signals from said signal sources wherein each input is connected to one of said signal sources, said signal generating means including means for generating a signal of a first amplitude when a signal is received by one of its inputs, and for transmitting a signal at least equal to a second amplitude when signals are received simultaneously by two or more of its inputs, and output means for transmitting said generated signals; a signal threshold detection means including an input connected to the output of said signal generating means and an output for transmitting a signal upon receipt of a signal having an amplitude between said first and second amplitudes; and means for connecting the output of said signal threshold detection means to the control inputs of said gate means for transmitting inhibiting signals thereto.

References Cited UNITED STATES PATENTS 2,999,637 9/1961 Curry 235 3,134,032 5/1964 Mann 307--88.5 3,245,033 4/1966 Plouife et a1. 340146.1

MALCOLM A. MORRISON, Primary Examiner.

M. J. SPIVAK, Assistant Examiner.

UNITED STATES PATENT OFFICE CERTIFICATE OF CORRECTION Patent No. 3,345,610 October 3, 1967 Edgar Wolf It is certified that error appears in the above identified patent and that said Letters Patent are hereby corrected as shown below:

Column 2, line 15, "aquiamplitude" should read equiamplitude line 37, "or" should read of Column 3, line S, cancel "invertor l7 and"; line 14, after "equal" insert to line l6. "15" should read l4 Column 4 I ine 34 C" Should read SZN Column 5 line 16, "a first" should read said Signed and sealed this 7th day of October 1969.

(SEAL) Attest:

Edward M. Fletcher, Jr. I

Attesting Officer Commissioner of Patents

Patent Citations
Cited PatentFiling datePublication dateApplicantTitle
US2999637 *Apr 29, 1959Sep 12, 1961Hughes Aircraft CoTransistor majority logic adder
US3134032 *Mar 23, 1962May 19, 1964Westinghouse Electric CorpError canceling decision circuit
US3245033 *Mar 24, 1960Apr 5, 1966IttCode recognition system
Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US4328586 *Nov 28, 1979May 4, 1982Beckman Instruments, Inc.Optically coupled serial communication bus
US4794388 *Feb 12, 1982Dec 27, 1988Summagraphics CorporationMethod of and apparatus for controlling a display
Classifications
U.S. Classification714/813, 340/146.2, 714/E11.31
International ClassificationG06F11/08, H03M11/00, H03M11/22
Cooperative ClassificationH03M11/22, G06F11/085
European ClassificationH03M11/22, G06F11/08N
Legal Events
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Oct 25, 1982ASAssignment
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